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A Survey of Techniques For Improving Energy Efficiency in Embedded Computing Systems
Sparsh Mittal
TL;DR
Embedded systems have become widespread and feature-rich, making power management difficult under stringent energy budgets. This paper surveys and classifies evaluated application- and architectural-level techniques by their research ideas, aiming to clarify the state of the art and guide more energy-efficient designs. Its scope excludes performance-only evaluations and circuit-level techniques, and it discusses representative approaches including DVFS, power modes, component-specific methods, and unconventional cores.
Problem
Embedded systems are increasingly capable and ubiquitous, but their stringent power budgets make managing consumption and sustaining performance challenging.
Method
The paper surveys and classifies evaluated application- and architectural-level power-management techniques according to their key research ideas.
Results
The survey provides insights into the working of power-management techniques and reviews approaches including DVFS, power modes, component-specific methods, and unconventional cores.
Takeaways & Limitations
The survey is intended to help researchers and designers understand power-management techniques and improve the energy efficiency of embedded systems.
Takeaways & Limitations
The review excludes studies that evaluate only performance improvement and excludes circuit-level techniques, focusing instead on application- and architectural-level methods.
Abstract
from arXiv · showhide
Recent technological advances have greatly improved the performance and features of embedded systems. With the number of just mobile devices now reaching nearly equal to the population of earth, embedded systems have truly become ubiquitous. These trends, however, have also made the task of managing their power consumption extremely challenging. In recent years, several techniques have been proposed to address this issue. In this paper, we survey the techniques for managing power consumption of embedded systems. We discuss the need of power management and provide a classification of the techniques on several important parameters to highlight their similarities and differences. This paper is intended to help the researchers and application-developers in gaining insights into the working of power management techniques and designing even more efficient high-performance embedded systems of tomorrow.
1 Introduction
Embedded systems have become ubiquitous and increasingly capable, but their stringent power budgets make energy-efficient operation difficult. The paper surveys and classifies evaluated power-management techniques to clarify their ideas and support future design.
- Portable embedded systems may have 1–2 W power budgets, while wearable systems may have only a few milliwatts.
- A 3G mobile-phone receiver requires nearly 40 GOPS for a 14.4 Mbps channel, demanding 25pJ per operation within a 1 W budget.
- The survey reviews research aimed at improving embedded-system energy efficiency and classifies techniques by their key research ideas.
- The paper aims to help researchers and designers understand power-management state of the art and improve embedded-system energy efficiency.
- The review includes evaluated application- and architectural-level energy-efficiency methods, while excluding performance-only studies and circuit-level techniques.
2 Background
An embedded system is a computing system integrated into a larger device for specific control functions. Unlike general-purpose computers, it performs a limited set of predefined tasks with specific requirements.
- An embedded system is designed for specific control functions and embedded as part of a complete device containing hardware and mechanical components.
- Typical embedded systems include MP3 players, smart cameras, and cellular phones.
2.1 Sources Of Power Consumption
Embedded-system power consumption consists mainly of dynamic and static components. Dynamic-saving methods reduce dynamic energy, whereas low-power modes target leakage energy.
- Dynamic power arises from charging and discharging load capacitance and from short-circuit currents.
- Static, or leakage, power arises from leakage currents that flow even when the device is inactive.
- The dynamic-power relation depends on switching activity, capacitance, operating voltage, and frequency, while leakage power depends on leakage current and voltage.
- With CMOS scaling, leakage power is increasing dramatically.
- DVFS techniques reduce dynamic energy, while transitions to low-power states aim to reduce leakage energy.
2.2 Importance of power management
Power management matters because embedded systems face constrained energy, thermal, reliability, and performance budgets. Improving energy efficiency can reduce system overhead and help sustain performance across ubiquitous deployments.
- Battery-operated embedded systems face limited energy supplies, while small devices have restricted heat-dissipation capacity.
- Lower power consumption can enable smaller power supplies, lower heat-dissipation overhead, and reduced system cost, weight, and area.
- A 15°C temperature increase can raise device failure rates by up to a factor of two, making power dissipation important for reliability.
- Runtime adaptation can exploit idle intervals and slack by trading performance for energy savings.
- Embedded processors increasingly support resource-intensive applications and complex features, shifting design emphasis toward performance rather than low power.
- A technology-imposed utilization wall limits how much of a chip can run at full speed within its power budget.
- Because embedded systems are ubiquitous, their aggregate power consumption can be high despite low consumption by each individual device.
- Power management in embedded systems also supports green-computing goals because ICT contributes nearly 3% of the overall carbon footprint.
3 Overview
The survey classifies embedded-system energy-saving techniques by their main energy-saving approach. The categories span processor scaling and scheduling, low-power modes, component-level microarchitecture, and unconventional cores.
- The survey organizes techniques according to their main energy-saving approach.
- DVFS and power-aware scheduling techniques adjust processor operation and scheduling to reduce energy.
- Power mode management uses low-power operating modes to save energy.
- Microarchitectural techniques target specific components, including main memory, caches, scratchpad memory, TLBs, and memory-hierarchy additions.
- Unconventional-core techniques use DSPs, GPUs, or FPGAs for energy-efficient embedded computing.
4 Power Management Techniques
The surveyed techniques manage energy through voltage and frequency scaling, scheduling, power modes, component-specific designs, and unconventional cores. Their benefits depend on workload characteristics, hardware overheads, timing constraints, and available parallelism.
- 4.1 DVFS and Power-Aware Scheduling based Techniques: DVFS reduces dynamic power by lowering frequency and voltage, but can hurt performance and incurs transition and regulator overheads.For CMOS circuits, dynamic power follows P ∝ FV^2; voltage transitions may take tens of microseconds, and leakage can diminish returns.
- 4.1 DVFS and Power-Aware Scheduling based Techniques: Three or four implemented voltage levels can approach the energy efficiency of an ideal system with arbitrarily variable voltage.The result addresses the overhead of supporting many voltage levels in multiple-voltage systems.
- 4.1 DVFS and Power-Aware Scheduling based Techniques: Variable-voltage scheduling can save more energy than minimum constant-speed execution with processor shutdown during idle periods.The second algorithm produces a constant speed and variable-voltage schedule, and always saves more energy than the first algorithm.
- 4.1 DVFS and Power-Aware Scheduling based Techniques: Scheduling methods exploit reclaimed slack, deadline-aware allocation, and frequency selection to reduce energy while meeting timing requirements.Reported approaches address multiprocessor tasks, precedence constraints, periodic real-time workloads, and discrete-frequency choices.
- 4.2 Using Power Modes: Power-management interfaces let applications identify unused components so individual components, subsystems, or whole systems can enter low-power modes.The interface reduces the need for programmers to manage each component's power consumption individually.
- 4.4 Using Unconventional Cores: Energy-saving comparisons across unconventional cores are workload-dependent: GPUs can outperform DSPs or CPUs in some settings, while FPGAs can outperform DSPs.GPU advantages decrease when applications lack substantial parallelism, and energy efficiency outcomes differ across benchmark and application types.
5 Concluding Remarks
Future mobile embedded systems will require substantially higher energy efficiency as they add high-speed video processing and communication. The survey reviews and classifies power-management techniques to inform energy-efficient embedded-system design.
- Future mobile systems will require at least an order of magnitude better energy efficiency than current state-of-the-art systems.
- Power management is needed across chip-design, microarchitectural, application, and system levels.
- The paper reviews power-management techniques and classifies them by their key research idea.The stated aim is to provide insight that helps researchers address power-consumption challenges and architect highly energy-efficient embedded systems.