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Logic gates at the surface code threshold: Superconducting qubits poised for fault-tolerant quantum computing

R. Barends, J. Kelly, A. Megrant, A. Veitia, D. Sank, E. Jeffrey, T. C. White, J. Mutus, A. G. Fowler, B. Campbell, Y. Chen, Z. Chen, B. Chiaro, A. Dunsworth, C. Neill, P. O`Malley, P. Roushan, A. Vainsencher, J. Wenner, A. N. Korotkov, A. N. Cleland, John M. Martinis

arXiv:1402.4848v1quant-phcond-mat.mes-hallcond-mat.supr-con

TL;DR

The paper addresses characterization of coherence and control errors relevant to fault-tolerant superconducting processors. It combines coherence measurements, crosstalk calibration, response correction, and CZ-gate error budgeting, finding close agreement between calculated and experimental randomized-benchmarking error rates.

  • Problem

    The study addresses how superconducting-qubit coherence and control errors can be characterized for fault-tolerant processor operation.

  • Method

    The authors measure relaxation and dephasing, characterize control-line crosstalk, flatten frequency-control responses, and construct a CZ-gate error budget.

  • Results

    0.0233 calculated and 0.0244 experimental values agree for the interleaved two-qubit randomized-benchmarking error rate.

  • Takeaways & Limitations

    The measurements provide a device-specific basis for evaluating surface-code threshold fidelity beyond nominal assumptions about leakage, dominant errors, and perfect parallelism.

Abstract

from arXiv · show

A quantum computer can solve hard problems - such as prime factoring, database searching, and quantum simulation - at the cost of needing to protect fragile quantum states from error. Quantum error correction provides this protection, by distributing a logical state among many physical qubits via quantum entanglement. Superconductivity is an appealing platform, as it allows for constructing large quantum circuits, and is compatible with microfabrication. For superconducting qubits the surface code is a natural choice for error correction, as it uses only nearest-neighbour coupling and rapidly-cycled entangling gates. The gate fidelity requirements are modest: The per-step fidelity threshold is only about 99%. Here, we demonstrate a universal set of logic gates in a superconducting multi-qubit processor, achieving an average single-qubit gate fidelity of 99.92% and a two-qubit gate fidelity up to 99.4%. This places Josephson quantum computing at the fault-tolerant threshold for surface code error correction. Our quantum processor is a first step towards the surface code, using five qubits arranged in a linear array with nearest-neighbour coupling. As a further demonstration, we construct a five-qubit Greenberger-Horne-Zeilinger (GHZ) state using the complete circuit and full set of gates. The results demonstrate that Josephson quantum computing is a high-fidelity technology, with a clear path to scaling up to large-scale, fault-tolerant quantum circuits.

Fabrication

The devices use a five-step aluminum-on-sapphire fabrication process with crossovers added to suppress stray microwave chip modes. Table S1 reports qubit nonlinearities and coupling strengths, including typical next-nearest-neighbour coupling.

  • Fabrication: Crossovers tie ground planes together through low-impedance connections to suppress parasitic slotline modes.Without them, control wires could segment the ground plane and produce stray microwave chip modes.
  • Fabrication: The process comprises five deposition and etching steps covering control wiring, crossover layers, qubit capacitors, resonators, and Josephson junctions.
  • Qubit Frequencies and Coupling: 1.3 MHz is the typical next-nearest-neighbour coupling strength, consistent with microwave circuit simulations.The coupling strength is measured between 4.2 and 4.7 GHz.

Coherence Times

The processor exhibits typical energy-relaxation times of 20–40 µs, while Ramsey measurements reveal faster dephasing on the order of 10 µs and slower Gaussian dephasing consistent with 1/f noise.

  • Coherence Times: 20–40 µs are the typical T1 energy-relaxation times across the qubits.Variations predominantly arise from incoherent interaction with weakly coupled two-level defects.
  • Coherence Times: Below 10 µs T1 suppressions occurred at certain frequencies in earlier larger Xmon geometries, whereas the present data show fewer such suppressions.The authors attribute the improvement to adding crossovers.
  • Coherence Times: Approximately 10 µs is the fast dephasing timescale measured by Ramsey decay for qubit Q1.The fast component may arise from white noise from room-temperature control electronics.
  • Coherence Times: The slow Gaussian dephasing times are consistent with a 1/f-spectrum with spectral density SΦ(1 Hz) = 1.1 µΦ0/…

Qubit Frequencies and Coupling

The supplementary material identifies qubit frequencies and nearest-neighbour coupling strengths as device parameters, and characterizes frequency-control crosstalk through a flux-response matrix.

  • Qubit Frequencies and Coupling: Qubit frequencies and nearest-neighbour coupling strengths are listed in Table S1.
  • Qubit Frequencies and Coupling: 1–2% frequency-control crosstalk is reduced to below 10^-4 after compensation pulses orthonormalise the control.The crosstalk matrix MΦ relates actual to ideal flux through each qubit’s SQUID loop.
  • Qubit Frequencies and Coupling: The crosstalk matrix is defined by Φactual = MΦΦideal, with Φ denoting flux threaded through each SQUID loop.

EXPERIMENTAL SETUP

The experimental setup includes a wiring diagram and Xmon-qubit energy-relaxation measurements over frequency, with typical T1 values of 20–40 µs and a Q3 defect-induced depression at 4.36 GHz.

  • EXPERIMENTAL SETUP: Fig. S3 presents the wiring diagram and circuit components used in the experiment.
  • EXPERIMENTAL SETUP: Fig. S1 plots T1 versus frequency for all Xmon qubits using 2 MHz frequency steps.
  • EXPERIMENTAL SETUP: 20–40 µs are the general T1 values, with Q3 showing a depression at 4.36 GHz from a coherently coupled junction defect.

FLATTENING THE Z RESPONSE

The experiment characterizes frequency-control distortions and corrects them through response calibration and deconvolution. These corrections suppress residual pulse ripples and support accurate CZ gates.

  • Problem: Control-wiring ripples can significantly reduce gate fidelity by producing single-qubit phase errors.The correction procedure begins by measuring the unit-step response of the room-temperature Z-control electronics.
  • Calibration: The corrected phase measurement probes the transfer function of the fridge wiring, contact pads, and on-chip control lines.The measurement is first-order sensitive to small phase deviations, unlike Ramsey and tomography measurements.
  • Calibration: The wiring transfer function has typical exponential timescales of 100 ns and 5 ns.The longer timescale is consistent with the bias tee, while the shorter timescale is attributed to reflections.
  • Correction: Deconvolving the board response and fridge wiring suppresses residual control ripples below 10^-4.After a 0.5 GHz detuning step, the remaining phase deviation is consistent with a 30 kHz drift.

VERIFYING EXPERIMENTAL FIDELITIES ARE AT THE SURFACE CODE THRESHOLD

The surface-code threshold is evaluated using device-specific assumptions about parallelism, leakage, measurement, initialization, and gate errors. Simulations with these parameters support threshold-level performance across several array sizes.

  • Threshold assumptions: 0.99 is the nominal surface-code threshold fidelity under assumptions of no leakage, dominant two-qubit errors, and perfect gate parallelism.The processor’s complex behavior outside these assumptions requires a device-specific threshold calculation.
  • Threshold assumptions: A 16-step CZ pattern accommodates the constraint that neighboring qubits cannot undergo simultaneous CZ gates.The pattern still measures all stabilizers, using a longest CZ duration of 45 ns.
  • Device parameters: < 0.2% leakage occurs on the measurement qubit, while leakage on the data qubit is practically negligible.The analysis neglects the measurement-qubit leakage and notes that leakage-handling methods for topological codes exist.
  • Device parameters: Measurement and initialization are each assumed to have 0.99 fidelity, while Y/2 gates use 0.9992 average fidelity.The assumptions also include 20 ns Y/2 gates and an identity error of 0.05% per 10 ns.
  • Simulation result: The logical error rate is the same in simulated 5x5, 9x9, and 13x13 qubit arrays.These simulations use the stated parameters and latest correction techniques.

CZ GATE ERROR BUDGET

The CZ error budget separates leakage, decoherence, and control errors using dedicated experimental measurements. These measurements identify the dominant contributors to the two-qubit gate error.

  • Leakage: 2-state leakage is measured from interference-pattern amplitude after preparing |11⟩ and applying two CZ gates.The leakage error is calculated as ∆P/4, with the measured amplitude proportional to |02⟩-state leakage.
  • Gate parameters: CZ gates have durations between 38 and 45 ns across the listed qubit pairs.The pair-specific durations are Q0-Q1: 45 ns, Q1-Q2: 43 ns, Q2-Q3: 43 ns, and Q3-Q4: 38 ns.
  • Error budget: The CZ error budget includes contributions from leakage, decoherence, and control error.The contribution to total error is reported in percent.
  • Decoherence and control: Decoherence is measured by interleaved randomized benchmarking with an idle matching the CZ-gate duration.A separate waveform experiment measures single-qubit phase error, allowing decoherence and phase contributions to be separated.

QUANTIFYING XY CONTROL CROSSTALK USING SIMULTANEOUS RANDOMISED BENCHMARKING

Simultaneous randomized benchmarking quantifies control errors between neighboring qubits and shows that concurrent operation preserves high addressability.

  • Crosstalk results: Added errors per Clifford remain below 2 · 10−4 when nearest- and next-nearest-neighbor qubits operate simultaneously.The measured added errors are 1 · 10−4 or 2 · 10−4 for next-nearest neighbors, with the overall increase below 2 · 10−4.
  • Crosstalk results: XY control crosstalk is a minor error mechanism in this five-qubit architecture.The benchmarking comparison finds only small changes in decay when neighboring qubits are controlled simultaneously.
  • Benchmarking framework: The single-qubit Clifford group C1 contains 24 rotations preserving the octahedron in the Bloch sphere.Its physical implementation uses microwave-pulse rotations around the X and Y axes.
  • Benchmarking framework: The two-qubit Clifford group C2 is organized into single-qubit, CNOT-like, iSWAP-like, and SWAP-like classes.The full group contains 11520 elements, with the CNOT-like and iSWAP-like classes each containing 5184 elements.
  • Benchmarking framework: The Clifford group forms a 2-design, and the generated single- and two-qubit Cliffords were checked against this property.This supports randomized benchmarking as a consistency-checked sampling procedure for the implemented gates.

ESTIMATING THE ERROR PER CLIFFORD

The paper relates randomized-benchmarking error per Clifford to the component single- and two-qubit gate errors using average Clifford compositions.

  • Error model: Error per Clifford r is estimated by combining the average number of constituent gates with their measured gate errors.The approximation assumes gate errors are sufficiently small that composition errors can be added.
  • Single-qubit Cliffords: The single-qubit Clifford group C1 uses 45 physical single-qubit gates across 24 Cliffords.Assuming equal single-gate errors, the resulting average Clifford error is expressed using rSQ.
  • Two-qubit Cliffords: Two-qubit Cliffords are composed from CZ gates and single-qubit gate sets including C1, S1, and SY/2.The four Clifford classes contribute different compositions and associated errors.
  • Interleaved benchmarking: For CZ-interleaved benchmarking, the calculated error per Clifford is rC2+CZ = 0.0233.The expression includes the CZ contribution alongside the two-qubit Clifford composition.

Comparison to Experiment

The benchmarking estimates are self-consistent with experiment, while the GHZ-state procedure uses spin echoes and tomography to characterize multiqubit states.

  • Comparison to Experiment: Calculated rC2 = 0.0173 is close to the experimental rref = 0.0189.This comparison uses single- and two-qubit gate errors of 0.001 and 0.006.
  • Comparison to Experiment: Calculated rC2+CZ = 0.0233 is close to the experimental value 0.0244.The agreement provides the reported randomized-benchmarking self-consistency check.
  • GHZ-state characterization: The five-qubit GHZ pulse sequence uses Hahn spin echoes on idling elements to suppress slow dephasing.Nearest-neighbor qubits are detuned by 0.7 to 1.5 GHz, while next-nearest neighbors are detuned by 0.4 to 0.5 GHz.
  • GHZ-state characterization: Quantum state tomography reconstructs density matrices for Bell and N = 3, 4, 5 GHZ states under physicality constraints.The estimation enforces Hermiticity, unit trace, and positive semidefiniteness.
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