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On-Chip Detection of Entangled Photons by Scalable Integration of Single-Photon Detectors
Faraz Najafi, Jacob Mower, Nicholas Harris, Francesco Bellei, Andrew Dane, Catherine Lee, Prashanta Kharel, Francesco Marsili, Solomon Assefa, Karl K. Berggren, Dirk Englund
TL;DR
Multiple SNSPDs have been difficult to integrate efficiently on a single PIC because low device yield limits scalable detector systems. This paper introduces a membrane-transfer process that selects functioning detectors for PIC integration, assembling ten low-jitter devices with 100% yield and enabling on-chip nonclassical-light correlations.
Problem
Low device yield has limited the system efficiency and scalability of integrating multiple SNSPDs into one photonic circuit.
Method
A membrane-transfer process pre-selects functioning SNSPDs and integrates them onto PIC waveguides.
Results
Ten adjacent waveguide-integrated detectors were assembled with 100% yield and 39–57-ps timing jitter, enabling on-chip g(2)(τ) measurements of nonclassical light.
Takeaways & Limitations
The process supports scalable integration of high-performance SNSPDs into PICs for on-chip quantum photonic measurements.
Abstract
from arXiv · showhide
Photonic integrated circuits (PICs) have emerged as a scalable platform for complex quantum technologies using photonic and atomic systems. A central goal has been to integrate photon-resolving detectors to reduce optical losses, latency, and wiring complexity associated with off-chip detectors. Superconducting nanowire single-photon detectors (SNSPDs) are particularly attractive because of high detection efficiency, sub-50-ps timing jitter, nanosecond-scale reset time, and sensitivity from the visible to the mid-infrared spectrum. However, while single SNSPDs have been incorporated into individual waveguides, the system efficiency of multiple SNSPDs in one photonic circuit has been limited below 0.2% due to low device yield. Here we introduce a micrometer-scale flip-chip process that enables scalable integration of SNSPDs on a range of PICs. Ten low-jitter detectors were integrated on one PIC with 100% device yield. With an average system efficiency beyond 10% for multiple SNSPDs on one PIC, we demonstrate high-fidelity on-chip photon correlation measurements of non-classical light.
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A micrometer-scale membrane-transfer process integrates selected high-performance SNSPDs onto photonic integrated circuits with high yield. The resulting multi-detector PICs provide efficient, low-jitter detection and enable on-chip correlations of entangled photons.
- Integration process: 225 detectors were fabricated on a ∼200-nm-thick SiNx layer, then released as free-standing membranes for testing and transfer.The membranes were connected to the substrate by six narrow bridges, including electrical test connections.
- Integration process: The flip-chip process transfers pre-characterized SNSPD membranes onto PIC waveguides with sub-1-µm alignment accuracy and simultaneous electrical contact.Selected membranes are placed detector-side-down onto target waveguides, while gold pads contact complementary PIC pads.
- Detector performance: 19% SDE for input A and 7% for input B represent a two-order-of-magnitude improvement over previous multi-detector integration approaches.The input-A total comprises 11% for A1 and 8% for A2; input B comprises 3% for B1 and 4% for B2.
- Detector performance: 12%–45% ODE and 42–65-ps timing jitter were achieved by the transferred detectors.ODE is estimated from SDE after accounting for PIC coupling and splitting losses.
- On-chip correlation measurements: g(2)AB(0) ∼6 was observed between inputs A and B but not within individual channels, consistent with an entangled photon source.The lower-than-ideal peak height is attributed to the finite IP/NEIP ratio of the detectors.
- Scaling and significance: The CMOS-compatible integration process may support integration of tens to hundreds of SNSPDs and other heterogeneous circuit elements into high-performance PICs.The authors also identify III-V lasers and single-photon sources as possible additional integrated devices.
METHODS
The methods describe fabrication of suspended NbN SNSPDs and silicon PICs, followed by timing-jitter and correlation measurements using fiber-coupled optical channels and calibrated detection rates.
- Detector fabrication: A ∼200-nm-thick SiNx layer and NbN film were processed with electron-beam lithography and CF4 reactive-ion etching to form hairpin-shaped detectors.Additional dummy structures were exposed to improve electron-beam dose uniformity.
- Detector suspension: XeF2 selectively removed silicon beneath etched trenches, leaving each detector on a suspended SiNx membrane.The detector was first covered with S1813 and patterned to define the trenches.
- PIC fabrication: The PIC used 220-nm silicon on a 2 µm buried oxide layer, with 500-nm-wide waveguides fabricated on a CMOS line.SU8 polymer couplers and gold contact pads were added in subsequent processing steps.
- Timing jitter measurements: The timing-jitter measurement acquired more than 2000 detector–photodiode delays and used the resulting instrument response function to calculate jitter.The electrical signals were recorded with a 6-GHz-bandwidth, 40-GSamples/s oscilloscope.
- Correlation measurements: Correlation analysis incorporated photon and dark-count rates for channels A and B, with ηH defined as the conditional probability that channel B registers a photon given a photon in channel A.The bin duration is denoted by ∆τ.