Source-linked AI summary

Prototyping Real-Time Full Duplex Radios

MinKeun Chung, Min Soo Sim, Jaeweon Kim, Dong Ku Kim, Chan-Byoung Chae

arXiv:1503.03013v3cs.ITcs.NI

TL;DR

Full-duplex radios could improve spectral efficiency under growing traffic demand, but self-interference must be canceled in real wireless environments. The paper prototypes an SDR-based system combining dual-polarization analog cancellation with real-time digital cancellation and reports about 1.9 times the throughput of half duplex.

  • Problem

    Self-interference from a transmitter into its own receiver is the central challenge preventing practical full-duplex wireless operation.

  • Method

    The paper prototypes a real-time full-duplex LTE system on an SDR platform using dual-polarization RF cancellation and a digital canceller that rebuilds and subtracts residual self-interference.

  • Results

    The prototype delivers a throughput increase of 1.9x on the 4, 16 QAM and 1.89x on the 64 QAM compared to conventional half duplex mode.

  • Takeaways & Limitations

    The prototype provides practical insights into developing full-duplex wireless systems for future communications.

Abstract

from arXiv · show

In this article, we present a real-time full duplex radio system for 5G wireless networks. Full duplex radios are capable of opening new possibilities in contexts of high traffic demand where there are limited radio resources. A critical issue, however, to implementing full duplex radios, in real wireless environments, is being able to cancel self-interference. To overcome the self-interference challenge, we prototype our design on a software-defined radio (SDR) platform. This design combines a dual-polarization antenna-based analog part with a digital self-interference canceller that operates in real-time. Prototype test results confirm that the proposed full-duplex system achieves about 1.9 times higher throughput than a half-duplex system. This article concludes with a discussion of implementationchallenges that remain for researchers seeking the most viable solution for full duplex communications.

I. INTRODUCTION

Escalating mobile data demand is intensifying pressure on finite spectrum resources. Full duplex is presented as a candidate technology for increasing spectral efficiency and potentially alleviating this spectrum crunch.

  • Global mobile data traffic was expected to grow nearly tenfold from 2014 to 2019, reaching 24.3 exabytes per month at a 57% compounded annual growth rate.
  • Although additional spectrum cannot be produced, novel technologies may expand the efficiency of scarce spectrum resources.
  • Full duplex is identified as a potential breakthrough for alleviating spectrum crunch by theoretically doubling spectral efficiency.

B. Key Challenge: Self-interference

Self-interference is the central obstacle to full duplex operation because a transmitter’s signal leaks into its own receiver. Real-world hardware impairments make SDR-based prototyping important for validating practical feasibility.

  • Self-interference occurs when a transmitter’s signal reaches its own receiver while that receiver is receiving the other device’s signal.
  • Managing self-interference is essential because its presence traditionally forces same-channel wireless networks into half-duplex operation.
  • Real wireless systems include amplifier nonlinearity, gain/phase offset, I/Q imbalance, quantization effects, and timing jitter that simplified simulations often overlook.
  • Software-defined radio enables rapid prototyping of full-duplex systems, and prior groups have combined RF antennas with SDR platforms for in-band testbeds.

II. PROTOTYPE SETTINGS: SYSTEM SPECIFICATIONS & HARDWARE ARCHITECTURE

The prototype uses an LTE downlink-based PXIe SDR platform with a dual-polarization RF antenna and real-time processing hardware. It was tested over a short full-duplex link in both an exhibition hall and an indoor open space.

  • The prototype follows LTE downlink specifications: 20 MHz bandwidth, 30.72 MHz sampling, 15 kHz subcarrier spacing, 2048-point FFT, and variable 4/16/64 QAM.
  • Its four main hardware elements are a dual-polarization RF antenna, PXIe-8133 real-time controller, NI 5791R transceiver, and PXIe-7965R FPGA module.
  • The PXIe-8133 controller provides a 1.73 GHz quad-core processor and 8 GB of RAM, while the FPGA supports high-speed streaming above 800 MB/s.
  • The communicating nodes were separated by about 1.2 m and tested in an exhibition hall with many people and an indoor open-space environment.

III. PROPOSED FULL DUPLEX SYSTEM

The proposed architecture processes LTE frames through transmission, reception, and self-interference cancellation. It uses a 10 ms frame divided into 20 slots, each containing six OFDM symbols.

  • The system architecture is organized in processing order from transmission to reception and self-interference cancellation.
  • Each LTE downlink frame lasts 10 ms and is divided into 20 slots of 0.5 ms each.
  • Each slot contains six OFDM symbols with a 512-sample cyclic prefix in extended mode.

B. Analog Self-interference Cancellation

The prototype combines dual-polarization isolation, active analog cancellation, and real-time digital processing to suppress self-interference. Its design also coordinates synchronization and channel estimation for desired and self-interference signals.

  • Analog cancellation: The dual-polarization antenna provides 42 dB of isolation between transmit and receive ports.High cross-polarization discrimination preserves polarization purity and improves inter-port isolation.
  • Analog cancellation: Active analog cancellation adds up to 18 dB, reaching 60 dB total analog cancellation through attenuation, phase-shift, and delay tuning.
  • Digital cancellation: Digital cancellation rebuilds residual self-interference from transmitted baseband samples and subtracts it from received samples in real time.The implementation uses handshake protocols, shift registers, shared registers, and dedicated FIFO buffers to maintain data throughput.
  • Synchronization and estimation: The prototype performs separate synchronization operations for decoding the desired symbol and rebuilding self-interference.Timing estimation covers both propagation and sampling offsets between nodes and the offset between a node’s transmit and receive ports.
  • Synchronization and estimation: Different Zadoff–Chu root indices provide orthogonal PSS sequences for the two full-duplex radios, enabling independent synchronization.The prototype uses root indices u1 = 25 and u2 = 29, with PSS transmission every 5 ms.
  • Synchronization and estimation: Channel estimation supports both the inter-node channel for desired-symbol decoding and the local transmit-to-receive channel for self-interference rebuilding.Reference-symbol extraction, least-squares estimation, and interpolation are used in the channel-estimation blocks.

IV. PROTOTYPE TEST RESULTS

The real-time LTE prototype combines analog and digital self-interference cancellation to recover the desired uplink constellation and improve throughput over half-duplex operation.

  • 42 dB of isolation is provided by the dual-polarization antenna, with 60 dB analog and 43 dB digital self-interference cancellation achieved in the prototype.The carrier frequency is 2.52 GHz in LTE bands.
  • The prototype transmits 4 QAM downlink and receives 64 QAM uplink, requiring cancellation of the 4 QAM self-interference signal.
  • Analog cancellation alone leaves self-interference in the constellation, whereas combined analog and digital cancellation shows the self-interference as perfectly cancelled.
  • 1.9x throughput is achieved for 4 and 16 QAM, while 1.89x is achieved for 64 QAM, compared with conventional half-duplex mode.

V. RESEARCH CHALLENGES

The paper identifies unresolved research challenges before a viable full-duplex solution for next-generation communication systems can be achieved.

  • Several research challenges remain before the most viable solution for next-generation communication systems is achieved.

A. Hardware Impairments

Full-duplex performance is strongly constrained by hardware impairments, and addressing their nonlinear and linear effects remains a real-time implementation challenge.

  • Full-duplex performance depends heavily on amplifier non-linearity, gain/phase offset, I/Q imbalance, quantization effects, and timing jitter.
  • Intermodulation distortion raises the noise floor and causes intercarrier interference, degrading full-duplex performance.
  • Cancelling nonlinear as well as linear components is a significant burden for real-time systems, motivating pre-distortion as a research topic.

B. Joint PHY/MAC Prototyping

Physical-layer demonstrations between single link pairs do not directly establish network-level gains, because full-duplex transmissions can create interference outside the link.

  • Most full-duplex implementations focus on physical-layer design for bidirectional communication between a single pair link.
  • Network-level validation requires prototyping MAC protocols that discover and exploit full-duplex opportunities in a distributed manner.
  • Joint PHY/MAC prototyping is identified as another future research direction.

C. Full Duplex System with OFDM and SC-FDMA

Full-duplex implementation studies must address LTE's asymmetric uplink/downlink frame structures, because SC-FDMA is used for LTE uplinks while many studies focus only on OFDM frames.

  • SC-FDMA is used for LTE uplink multiple access because it has lower PAPR than OFDMA.
  • Most full-duplex implementation studies address only OFDM frame structures.
  • LTE's asymmetric uplink/downlink frame structures present potential challenges for full-duplex systems.
  • Comparing full duplex with a comparable LTE-TDD prototype can assess latency, throughput, power consumption, and flexibility.

E. Novel Solution for RF/Analog Cancellation

The prototype combines dual-polarization RF with real-time digital cancellation on an SDR platform, while highlighting unresolved challenges in active analog cancellation and channel reciprocity.

  • RF/analog cancellation must attenuate high-powered self-interference before digital cancellation to avoid receiver saturation and dynamic-range problems.
  • Dual-polarization analog cancellation struggles with real-time active cancellation because estimating cancellation coefficients is difficult.
  • Channel reciprocity cannot be assumed for polarization antennas, leaving link-overhead simplification unresolved.
  • SDR-based prototyping is presented as necessary for validating feasibility and commercial viability under real-world impairments.
  • The prototype combines dual-polarization full-duplex RF with a real-time digital self-interference canceller on an SDR platform.
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