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High-Speed Finite Control Set Model Predictive Control for Power Electronics

Bartolomeo Stellato, Tobias Geyer, Paul J. Goulart

arXiv:1510.05578v3math.OC

TL;DR

Long prediction horizons make direct MPC for current tracking computationally demanding, while faster dynamical systems still require substantially shorter computation times. The paper combines approximate dynamic programming with a switching-frequency estimator to preserve performance at short horizons, which outperform longer-horizon approaches in steady-state simulations and experiments.

  • Problem

    Direct MPC for current tracking remains computationally demanding for long horizons, with achievable computation times still differing by two orders of magnitude from linear-system results.

  • Method

    The method estimates an infinite-horizon tail cost offline using approximate dynamic programming and augments the state with a switching-frequency estimator to reduce horizon length while preserving control performance.

  • Results

    The method achieved better steady-state performance than direct MPC with longer horizons; experiments measured THD = 5.23 % for N = 1 and THD = 5.14 % for N = 2.

  • Takeaways & Limitations

    The predictive behavior of the ADP-derived tail cost enables short-horizon direct MPC to obtain better steady-state performance than long-horizon formulations.

Abstract

from arXiv · show

Common approaches for direct model predictive control (MPC) for current reference tracking in power electronics suffer from the high computational complexity encountered when solving integer optimal control problems over long prediction horizons. We propose an efficient alternative method based on approximate dynamic programming, greatly reducing the computational burden and enabling sampling times below 25 $μ$s. Our approach is based on the offline estimation of an infinite horizon value function which is then utilized as the tail cost of an MPC problem. This allows us to reduce the controller horizon to a very small number of stages while simultaneously improving the overall controller performance. Our proposed algorithm was implemented on a small size FPGA and validated on a variable speed drive system with a three-level voltage source converter. Time measurements showed that our algorithm requires only 5.76 $μ$s for horizon N = 1 and 17.27 $μ$s for N = 2, in both cases outperforming state of the art approaches with much longer horizons in terms of currents distortion and switching frequency. To the authors' knowledge, this is the first time direct MPC for current control has been implemented on an FPGA solving the integer optimization problem in real-time and achieving comparable performance to formulations with long prediction horizons.

I. INTRODUCTION

Direct MPC controls converter switch positions through a discrete optimization problem, but integer inputs and long horizons make real-time computation difficult. The paper uses an ADP-estimated infinite-horizon tail cost to shorten the horizon while retaining performance, and validates the approach on an FPGA-based variable-speed drive.

  • Motivation: Direct MPC combines current control and modulation by optimizing finite-set inverter switch positions directly.The manipulated variables are discrete switch positions rather than continuous signals passed to a separate modulator.
  • Motivation: Integer-valued direct MPC inputs make optimization NP-hard, while enumerating switching sequences grows exponentially with prediction horizon.Long horizons are needed for stability and closed-loop performance, making direct MPC difficult to execute in real time.
  • Proposed approach: The proposed method augments system dynamics with a switching-frequency estimator and uses ADP to approximate the infinite-horizon value function offline.The estimated value function is applied as a tail cost, allowing a shorter controller horizon while preserving good control performance.
  • Case study: The case study uses a three-level NPC voltage-source inverter driving a medium-voltage induction machine in a variable-speed drive.The inverter has discrete phase-leg inputs, with each input taking values in {−1, 0, 1}.
  • Validation: Short-horizon simulations achieved better performance than approaches using much longer horizons.The comparison was made against the approaches in and.

B. Physical Model of the Machine

The drive model represents induction-machine states and inverter switching dynamics in discrete time while balancing current distortion against semiconductor switching losses. THD and switching frequency are incorporated through state-space augmentations so the quantities can be handled by the controller.

  • Physical model: The induction-machine model uses stator current and rotor flux in the αβ plane as state variables, with stator voltage as the input.The output is the stator current, and the model includes electrical, mechanical, and load parameters.
  • Physical model: The continuous-time drive model is discretized exactly while holding the switch input constant over each sampling interval.The discrete matrices are Aph = eD ˆTs, Bph = −D−1(I − Aph)E, and Cph = F.
  • Control objectives: Current distortion and switching frequency are competing objectives because distortion causes machine losses, whereas high-frequency switching increases inverter losses and device stress.The controller therefore must balance low current distortion against low switching frequency.
  • Sampling trade-off: Lower sampling times improve controller accuracy but reduce the computation time available in each closed-loop cycle.For the same switching frequency, longer sampling times produce higher distortion.
  • Control objectives: The switching-frequency penalty targets deviation from a desired frequency f*_sw rather than minimizing switching frequency without a target.This reflects inverter designs intended to operate at a specific nominal switching frequency.
  • Distortion measure: THD is represented through the RMS or mean squared current-tracking error, and the three-phase quantity is averaged across phases.The controller cannot calculate infinite-horizon THD directly because of finite storage constraints.
  • Switching-frequency measure: Switching frequency is estimated from on-transitions, using the 1-norm of successive switch-vector differences over a window and averaging across 12 semiconductor switches.The estimate corresponds to a non-causal FIR filter of order 2M, while the true average is its infinite-window limit.
  • Augmented model: The model is augmented with approximation schemes for THD and switching frequency because direct real-time computation is limited by storage and non-causality.The future-signal component of the switching-frequency calculation cannot be implemented directly in real time.

B. Total Harmonic Distortion

The paper formulates current distortion through stator-current tracking error in the αβ frame. It augments the system with oscillating current references so THD minimization becomes a regulation objective suitable for predictive control.

  • THD formulation: Three-phase THD is proportional to the mean current-tracking error across the phases.The phase-current error is related to the stator-current ripple in αβ coordinates.
  • THD formulation: The stator-current error is defined as ei(k) := is,αβ(k) − i*s,αβ(k).The reference is specified for steady-state operation at rated frequency.
  • THD formulation: The controller minimizes the discounted infinite-horizon sum of squared current-tracking errors to reduce THD.The discount factor γ ∈ (0, 1) prevents the sum from diverging under persistent tracking errors.
  • State augmentation: Oscillating current references are added as uncontrollable states, and the ripple becomes an output formed from differences between state pairs.This augmentation converts the tracking objective into a regulation formulation.

C. Switching Frequency

The controller augments the system with a switching-frequency estimator whose error is penalized alongside current distortion. An IIR filter provides a tunable estimate of switching frequency for MPC optimization.

  • Switching-frequency estimation: The switching-frequency estimate is generated from past phase-switch changes using a causal FIR approximation represented by an LTI IIR filter.Future input sequences remain included inside the controller prediction.
  • Switching-frequency estimation: The second-order IIR filter uses poles a1 = 1 − 1/r1 and a2 = 1 − 1/r2 to shape estimation smoothness and speed.Larger poles produce smoother estimates, whereas smaller poles respond faster but are noisier.
  • Cost formulation: The switching-frequency error is defined as esw(k) := ˆfsw(k) − f∗sw, measuring deviation from the target frequency.The controller minimizes this error through the switching-frequency penalty.
  • Cost formulation: The weight δ controls the relative importance of switching-frequency error against the THD component of the cost.The stage cost combines the THD and switching-frequency penalties.
  • Augmented MPC model: The augmented state includes filter dynamics and the target frequency, while switch positions and auxiliary filter inputs are incorporated into the MPC state and input vectors.The complete augmented state has physical, oscillator, previous-switch, and switching-filter components.
  • Augmented MPC model: The MPC enforces switching constraints that prevent shoot-through and preserve integer-valued switch positions, while the number of sequences grows as 27^N.The exponential growth makes even modest horizons difficult to solve.

E. Control Loop

The paper computes an approximate infinite-horizon value function with iterated Bellman inequalities and uses it as the MPC tail cost. Quadratic candidate functions and semidefinite constraints make the approximation computationally tractable.

  • Control loop: The control loop measures motor variables, estimates physical states, filters auxiliary switching inputs, and feeds delayed switch positions back into MPC.The desired torque initializes oscillator states used to generate current references.
  • Control loop: At each step, MPC optimizes a switching sequence but applies only its first input before resolving the problem with updated states.The complete control algorithm operates within 25 µs.
  • Value-function approximation: The tail cost V(x(N)) approximates the infinite-horizon cost and is computed offline using approximate dynamic programming.The matrices A, B, and C describe the augmented dynamics and output.
  • Value-function approximation: Approximate dynamic programming estimates the optimal value function using system dynamics, fitted data, or iterative simulation-based learning.The integer-switching converter makes exact infinite-horizon optimization intractable because of dimensionality and computation growth.
  • Iterated Bellman inequalities: The Bellman inequality provides a sufficient condition for constructing an underestimator of the optimal value function.Iterating the inequality can reduce conservatism in the approximation.
  • Iterated Bellman inequalities: The iterates are restricted to a finite-dimensional basis-function subspace, with coefficients computed through a semidefinite program.Quadratic candidate functions parameterized by Pi, qi, and ri are used.
  • Semidefinite formulation: The Bellman constraints are transformed into positive-semidefinite matrix conditions over admissible switch combinations, yielding an SDP solved with a standard solver.The state-space enumeration exploits normalized frequency and finite switch-position values.

G. Optimization Problem in Vector Form

For short horizons, the paper condenses MPC into a parametric integer quadratic program whose variables are only the discrete input sequence, enabling direct enumeration of input combinations.

  • Vector-form optimization: The condensed formulation retains only input variables and therefore produces a purely integer program for short horizons.A sparse formulation would instead require a more complex mixed-integer program.
  • Vector-form optimization: The input sequence over horizon N is expressed as a function of the initial state, yielding a parametric integer quadratic program.Straightforward algebraic manipulations provide the vector-form representation.

IV. FRAMEWORK FOR PERFORMANCE EVALUATION

Performance is evaluated on a medium-voltage induction-machine drive with a three-level neutral-point-clamped inverter under rated operating conditions. The simulations use an idealized switching model and report the drive’s rated parameters separately.

  • Drive benchmark: The benchmark uses a 3.3 kV, 50 Hz, 2 MVA squirrel-cage induction machine connected to a neutral-point-clamped voltage-source inverter.The inverter dc-link voltage is fixed at Vdc = 5.2 kV.
  • Drive benchmark: The per-unit base quantities include a rated current of Irat = 503.5 A and a base frequency of fb = frat = 50 Hz.Rated voltage, current, and frequency define the corresponding per-unit quantities.
  • Operating conditions: Unless otherwise stated, simulations use rated torque, nominal speed, and a 50 Hz fundamental frequency.The typical medium-voltage inverter switching-frequency range is 200–350 Hz.
  • Model parameters: Table I presents the rated values and parameters used to specify the drive model.The table is identified as the rated-values and parameters table for the drive.
  • Model assumptions: The evaluation neglects deadtimes, controller delays, measurement noise, observer errors, magnetic saturation, and parameter variations.The semiconductor model assumes instantaneous switching.

V. ACHIEVABLE PERFORMANCE IN STEADY STATE

Steady-state simulations benchmarked the proposed ADP-based controller against DMPC at matched switching frequency, while FPGA implementation details explain how its short-horizon integer search is executed efficiently.

  • Simulation setup: The simulations evaluated THD and switching frequency after reaching steady state, using γ = 0.95 and filter parameters r1 = r2 = 800.The system was simulated for four settling periods and twenty recorded periods.
  • Comparison: The comparison controller was DMPC from, tuned to match the proposed method’s switching frequency by adjusting λu.The integer optimization problems were solved using Gurobi, without changing the reported THD or switching-frequency results.
  • Results: N = 1 improved THD over DMPC with N = 10 while providing drastically better numerical speed.The result supports good control performance without relying on long horizons.
  • Results: N = 10 reduced the proposed method’s THD further to 4.80 %.The paper also compared horizons N = 2 and N = 3.
  • Implementation: The FPGA implementation used a Xilinx Zynq xc7z020 on a Zedboard, with C++ converted to VHDL through Vivado HLS.The controller ran at approximately 150 MHz.
  • Implementation: The algorithm uses exhaustive search because short tail-cost-augmented horizons require few input combinations and FPGA logic supports parallel and pipelined evaluation.Loop 1 evaluates candidate sequences independently, while Loop 2 finds the minimum through a pipelined sequential scan.

C. Circuit Generation

Circuit generation tailored the controller to a 150 MHz low-cost FPGA using pipelined search and parallel preprocessing, with HIL tests executing the controller on the board and the plant on a laptop.

  • C. Circuit Generation: The generated FPGA circuit targeted horizons N = 1 and N = 2 at 150 MHz, with timing estimates and resource usage reported in Table III.Loop 1 and Loop 2 were pipelined, while preprocessing operations were parallelized.
  • C. Circuit Generation: At N = 2, the implementation already used 91 % of the available DSP multipliers.The paper attributes this constraint to the limited resources of the selected low-cost hardware.
  • VII. HARDWARE IN THE LOOP TESTS: The HIL setup executed the fixed-point controller on the FPGA while simulating the plant on a MacBook Pro through the PROTOIP toolbox.The setup used the machine model described in Section IV.
  • C. Circuit Generation: The controller algorithm receives torque and motor states, updates the oscillator and filter, precomputes optimization vectors, evaluates candidate sequences, and returns the minimizing switch position.A torque-reference change resets the oscillator states before optimization.
  • VII. HARDWARE IN THE LOOP TESTS: With N = 1, HIL waveforms showed approximately 300 Hz switching frequency and 5.23 % current THD at full speed and rated torque.The three-phase stator currents, spectra, and input sequences were reported over a fundamental period.

A. Steady State

The proposed direct MPC achieves strong steady-state and transient performance with short horizons, while FPGA execution remains within the 25 µs sampling time.

  • Steady-state performance: THD = 5.23 % for N = 1 and THD = 5.14 % for N = 2 in experimental HIL benchmarks.These results were close to the simulated values, with an approximately 0.01 % difference attributed to fixed-point implementation.
  • Transient performance: 0.35 ms settling time was obtained for the torque step from 1 to 0 in the per unit system.The response used voltage inversion through an intermediate zero switching position because direct −1 to 1 switching was prohibited.
  • Transient performance: Approximately 3.5 ms settling time resulted from the torque step from 0 to 1 because the available voltage was limited.Phases b and c saturated at +1 and −1 for most of the transient, providing the maximum available voltage.
  • Execution time: 5.76 µs and 17.27 µs were the FPGA execution times for horizons N = 1 and N = 2, respectively.Measured times included approximately 3.5 µs of input-output exchange overhead between the FPGA and ARM processor.
  • Execution time: The FPGA control computation was deterministic with zero variance and ran within the 25 µs sampling time.The implementation used fixed-point arithmetic on a small Xilinx Zynq FPGA and achieved almost identical HIL and simulation performance.
  • Steady-state performance: Short-horizon operation produced better steady-state performance than direct MPC with long horizons in the cited formulation.The paper attributes this result to the predictive behavior of the ADP-derived tail cost.

APPENDIX A PHYSICAL SYSTEM MATRICES

The appendix decomposes the physical-system cost representation into smaller matrix blocks and quadratic-form components for each admissible input.

  • Physical system matrices: The continuous-time physical-system matrices are specified for the model.
  • Quadratic-form decomposition: The matrices defining the quadratic form are introduced and decomposed for each admissible input m ∈ M.The decomposition uses the state definition and separates the resulting vectors and matrix blocks.
  • Quadratic-form decomposition: The block-matrix notation omits the dependency M_i,∗∗(u_m) to simplify presentation.The first row and first column blocks have dimensions determined by the associated vector lengths.
  • Quadratic-form decomposition: Using z_upr = u_sw,pr and z_sw,3 = 1, the quadratic form is rewritten through Ψ_i,1 and Ψ_i,2.

APPENDIX C DENSE FORMULATION OF THE MPC PROBLEM

The appendix converts the finite-horizon MPC dynamics, constraints, and cost into dense matrix form, then separates stage and tail-cost contributions.

  • Dense MPC formulation: The input sequence and state sequence over the prediction horizon are combined to form the dense formulation.
  • Dense MPC formulation: The system dynamics and initial-state constraint are expressed using block matrices A and B.The resulting structure contains repeated products such as B, AB, and A^(N−1)B.
  • Cost formulation: The stage cost from 0 to N−1 is separated from the tail cost and rewritten in matrix form using H.Terms depending only on the initial state are collected as const(x_0).
  • Cost formulation: The last stage is used to derive the tail-cost expression through the last row of B, denoted B_end.
  • Constraint formulation: The two families of constraints are rewritten in vector form and merged into A_ineq U ≤ b_ineq(x_0).Matrix G extrapolates all switch positions u_sw(k) from U before the inequalities are combined.
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