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Assessing the progress of trapped-ion processors towards fault-tolerant quantum computation

A. Bermudez, X. Xu, R. Nigmatullin, J. O'Gorman, V. Negnevitsky, P. Schindler, T. Monz, U. G. Poschinger, C. Hempel, J. Home, F. Schmidt-Kaler, M. Biercuk, R. Blatt, S. Benjamin, M. Müller

arXiv:1705.02771v3quant-ph

TL;DR

The paper asks how small trapped-ion processors can demonstrate genuinely beneficial QEC before conventional threshold analysis becomes relevant. It introduces an operational benchmark, develops realistic trapped-ion protocols and error models, and finds that improved two-species segmented-trap systems can reach beneficial QEC in the studied 7-qubit color-code scenarios.

  • Problem

    Small prototype processors need a fair criterion showing that QEC improves encoded information before their sizes justify applying the standard QEC threshold.

  • Method

    The paper combines an operational information-recovery benchmark with a trapped-ion QEC toolbox and physically motivated, operation-specific error models.

  • Results

    Future-improved trapped-ion capabilities achieve beneficial QEC in the analyzed shuttling- and hiding-based 7-qubit color-code protocols, whereas current performance is inadequate.

  • Takeaways & Limitations

    Two-species trapped-ion crystals in high-optical-aperture segmented traps are identified as promising candidates for fault-tolerant quantum computation.

Abstract

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A quantitative assessment of the progress of small prototype quantum processors towards fault-tolerant quantum computation is a problem of current interest in experimental and theoretical quantum information science. We introduce a necessary and fair criterion for quantum error correction (QEC), which must be achieved in the development of these quantum processors before their sizes are sufficiently big to consider the well-known QEC threshold. We apply this criterion to benchmark the ongoing effort in implementing QEC with topological color codes using trapped-ion quantum processors and, more importantly, to guide the future hardware developments that shall be required in order to demonstrate beneficial QEC with small topological quantum codes. In doing so, we present a thorough description of a realistic trapped-ion toolbox for QEC, and a physically-motivated error model that goes beyond standard simplifications in the QEC literature. Our large-scale numerical analysis shows that two-species trapped-ion crystals in high-optical aperture segmented traps, with the improvements hereby described, are a very promising candidate for fault-tolerant quantum computation.

I. INTRODUCTION

Scaling small quantum processors into fault-tolerant devices requires QEC that addresses quantum-specific noise and realistic hardware constraints. The paper proposes assessing beneficial QEC before conventional threshold analysis, using detailed trapped-ion modelling.

  • Quantum processors must scale beyond proof-of-principle prototypes while operating reliably despite noise and processing errors.
  • Quantum noise prevents straightforward reuse of classical error-correction methods, motivating redundant encoding, error detection, and correction.
  • Previous experiments demonstrated small quantum codes and early repetitive, fault-tolerant, color-code, and surface-code operations across several platforms.
  • The envisioned platform co-traps 40Ca+ qubits with 88Sr+ sympathetic coolants in a segmented trap supporting storage, manipulation, and crystal-reconfiguration operations.
  • A complete QEC round must improve the encoded qubit despite introducing additional errors, establishing hardware requirements for gates, measurements, and internal processes.
  • Threshold-based predictions depend strongly on platform capabilities and noise assumptions, so realistic progress assessments require microscopic modelling of operational errors.

Summary of the results of this work

The work builds a trapped-ion QEC toolbox, realistic error model, and operational benchmark for 7-qubit color-code protocols. Its analysis compares shuttling- and hiding-based implementations across different levels of fault tolerance and hardware capability.

  • The paper introduces an operational protocol that quantifies when an imperfect QEC cycle becomes beneficial and benchmarks experimental progress.
  • The trapped-ion toolbox uses Mølmer–Sørensen gates for stabilizer readout and develops circuits compatible with fault-tolerant QEC designs.
  • The study applies the toolbox to 7-qubit color-code protocols with non-fault-tolerant 7+1-qubit and fault-tolerant DVS and DVA stabilizer-readout schemes.
  • Shuttling-based protocols use crystal reconfiguration and may exploit sympathetic recooling, whereas hiding-based protocols use spectroscopic shelving in static crystals.
  • The error model assigns operation-specific microscopic error rates and goes beyond circuit-level models that simplify syndrome-readout and other errors.
  • The analysis evaluates natural error rates, correction speed, and QEC-circuit accuracy as requirements for beneficial trapped-ion QEC.

II. ASSESSING THE PROGRESS ON QUANTUM ERROR CORRECTION (QEC) BY SMALL QUANTUM CODES

Small-code demonstrations do not by themselves establish fault tolerance. The relevant test is whether encoded qubits reduce errors relative to the best available unencoded qubits across representative circuits.

  • Demonstrating fault tolerance with small codes requires showing lower error rates than the best possible unencoded qubits across a large set of representative quantum circuits.

Break-even point for useful QEC

The paper evaluates useful QEC through an operational information-recovery protocol rather than logical-state fidelity alone. QEC is beneficial when an imperfect correction round improves Bob’s ability to identify the encoded state, and it is stronger when the encoded qubit outperforms an unprotected physical qubit.

  • Logical-state fidelity can be misleading because QEC may increase fidelity after complete decoherence without restoring information about the initial state.
  • The protocol instead encodes a random state, applies noise, and measures the probability that Bob correctly discriminates the received logical state.
  • Integrity scales Bob’s success probability so that an error-free qubit has integrity 1 and a completely depolarized qubit has integrity 0.
  • The break-even criterion declares QEC beneficial when Bob performs better after an imperfect correction round than after uninterrupted environmental exposure.
  • The protocol fixes Alice’s encoding and Bob’s decoding while Igor applies the same imperfect correction procedure without knowing the encoded state.
  • Multiple correction rounds divide the total exposure time into intervals and account for the finite duration of each QEC cycle.
  • After beneficial QEC is established, the encoded logical qubit must also outperform a comparable unprotected physical qubit.

A. Experimental Architecture

The proposed architecture uses a cryogenic, segmented high-optical-access ion trap with 40Ca+ data qubits and 88Sr+ ions for sympathetic cooling and mixed-species readout. Its design supports reconfigurable ion crystals, while multiple logical qubits may require junction-based architectures for parallel syndrome measurements.

  • Architecture: The setup uses a cryogenic 1D segmented high-optical-access trap with 40Ca+ qubits and 88Sr+ cooling and readout ions.The ions can be separated and shuttled across the segmented trap array.
  • Architecture: A segmented microfabricated trap is required to provide multiple trapping zones and high-fidelity operations on registers exceeding ten ions.The architecture enables versatile ion-crystal reconfigurations but increases trap complexity.
  • Qubit encoding: 40Ca+ supports optical and Zeeman qubits, with the optical excited state providing a 1.1 s lifetime and the Zeeman qubit exceeding one second of coherence.The two encodings are affected by different control and noise mechanisms.
  • Qubit encoding: Optical-qubit coherence is limited by laser phase noise, whereas spin-qubit fidelity is additionally constrained by off-resonant excitation and difficult 397 nm light control.Mitigating spin-qubit errors requires increasing both Raman intensity and detuning.
  • Scaling: Multiple logical qubits will likely require three- or four-way junctions to create parallel processing regions for syndrome measurements.A single segmented linear trap is expected to suffice for one low-distance logical qubit.

B. Gate Operations

The trapped-ion gate set combines global single-qubit rotations, addressed ac-Stark shifts, and Mølmer–Sørensen entangling gates. Its capabilities include high-fidelity short-register entanglement and dual-species operations, but longer strings and distinct noise sources constrain scaling.

  • Gate set: Global rotations and addressed ac-Stark shifts implement single-qubit operations, while MS gates provide pairwise or multi-qubit entanglement.Rotation parameters are controlled through laser phase, intensity, detuning, and pulse duration.
  • Gate set: Multi-qubit MS gates are defined as MS operations acting on more than two qubits and can generate GHZ states at full entangling angles.The gates use the ion string’s axial center-of-mass mode.
  • Performance: Up to 8-ion GHZ states can be generated in about 50µs, with state fidelities of {98.6, 95.7, 81.7}% for {2,4,8} ions.Ground-state hyperfine entangling operations have also reached infidelities below 10^-3.
  • Performance: Dual-species entangling gates have demonstrated Bell-state infidelities of 2 · 10^-2 and 2 · 10^-3, despite greater motional and cooling complexity.Preliminary dual-species operations also support XX and ZZ stabilizer readout.
  • Error modeling: The noise model distinguishes operation types because idle qubits, single-qubit gates, and entangling operations can have different leading error sources and durations.Gate infidelities determine depolarizing noise, while durations determine dephasing during idling.

C. Dynamic Error Suppression

Dynamic error suppression uses temporally modulated control sequences to reduce gate sensitivity to environmental and control noise. The paper evaluates composite pulses, dynamically corrected gates, and dynamic decoupling using fidelity and filter-transfer-function analyses.

  • Purpose: DES suppresses decoherence and control imperfections through feedback-free temporal modulation of the qubit control field.It complements QEC and can address strongly temporally correlated noise.
  • Protocol design: Control protocols are n-segment unitary sequences whose amplitudes, durations, and phases are chosen to realize target gates while reducing error sensitivity.Composite pulses and dynamically corrected gates use piecewise-constant modulation.
  • Protocol design: Phase-modulated MS gates can simultaneously decouple spectator bosonic modes and suppress control errors in two-qubit operations.Dynamic decoupling also hides idle ions in Zeeman sublevels during QEC gates.
  • Performance analysis: The filter-transfer-function framework quantifies control performance through overlap between noise power spectral densities and control-dependent filter functions.The filter order describes low-frequency suppression when the noise is concentrated near zero frequency.
  • Performance: Error suppression exceeding ∼100× is projected for strongly temporally correlated dephasing and slow amplitude-drift noise using state-of-the-art systems.Added segments can introduce stochastic errors that scale approximately linearly with added gate time.
  • Protocol selection: DES selection must prioritize Magnus-expansion error cancellation because time-domain filtering order alone does not determine residual-error correlations relevant to QEC.This distinction guides the choice of modulation protocol for fault-tolerant operation.

D. Ion Crystal Reconfiguration Techniques

Ion-crystal reconfiguration is central to trapped-ion QEC because shuttling, separation, merging, and reordering must remain fast and low-excitation as registers grow. The paper identifies hardware and modeling requirements for extending these operations to realistic QEC architectures.

  • Reconfiguration requirements: Shuttling must be fast relative to gate operations to limit qubit dephasing, anomalous heating, and motional excitation.The relevant trade-off is between reconfiguration speed and preserving low motional excitation.
  • Scaling constraints: Increasing ion-string size raises addressing errors and adds spectator vibrational modes that reduce entangling MS-gate fidelities.These effects constrain how large crystals can be manipulated coherently without reconfiguration.
  • Future requirements: Future experiments must extend low-excitation shuttling, separation, merging, and reordering beyond two ions and into mixed-species crystals.They must also determine how entangling-gate fidelity scales with register size and improve hide/unhide operations.
  • Noise model: The error model assigns each shuttling operation a fixed energy contribution that accounts for excitation of spectator modes and the gate-mediating bus mode.This provides a simplified model of shuttling-induced errors for numerical analysis.
  • Hardware improvements: Anticipated shuttling improvements include filter un-distortion and increased control-voltage range to improve waveform control.These changes target more accurate manipulation of segmented-trap potentials.

E. Readout and Electronic Control

Reliable QEC requires fast, high-fidelity ancilla readout, real-time feedback, ion-chain cooling, and control electronics capable of low-latency computation. The proposed system combines optical readout and cooling strategies with FPGA-based processing to manage these requirements.

  • Readout requirements: QEC cycles require repetitive ancilla readout and reset, feedback on logical qubits, and likely sympathetic re-cooling of the ion crystal.Readout must be discriminated in real time rather than enhanced through post-processing.
  • Electronic control: M-ACTION provides FPGA-local processing for complex real-time decisions and calculations without communication-bandwidth limitations.This architecture supports low-latency decisions during experimental sequences.
  • Readout requirements: 88Sr+ ancilla readout is predicted to take 100–300 µs with infidelity below 10^-3 under stated optical conditions.The estimate assumes 0.6% collection efficiency, a 10^4/s background count rate, and beam intensities comparable to 40Ca+ experiments.
  • Readout requirements: Increasing photon collection efficiency can reduce 40Ca+ optical readout time below 20 µs while maintaining the stated background-count assumptions.The passage describes a target enabled by 3.5% collection efficiency and a 2 × 10^3/s background count rate.
  • Cooling and latency: After EIT cooling, the mean phonon number is expected below 1, leaving hundreds of microseconds for classical computation and feedback preparation.Cooling only once per several readouts could instead make classical delays the bottleneck.
  • Cooling and latency: Feedback implementation becomes difficult beyond approximately 5–10 cycles with preloaded sequences, while real-time loading can take up to 1 ms for tens of pulses.The authors identify more efficient encoding or higher-bandwidth communication as scalable solutions.

IV. EFFECTIVE ERROR MODELS FOR ELEMENTARY QEC OPERATIONS IN TRAPPED IONS

The paper models QEC operations with distinct, physically motivated noise channels rather than a single uniform circuit-error channel. Idle-qubit dephasing is treated as independent phase-flip noise, with parameters linked to experimentally measurable dephasing rates.

  • Model construction: The error model assigns distinct quantum channels to elementary QEC operations, with parameters determined by microscopic calculations or experimental measurements.The model explicitly goes beyond the common assumption of one channel affecting every operation equally.
  • Dephasing of idle qubits: Crystal reconfiguration, spectator qubits during gates, and data qubits during measurement and re-cooling are modeled as idle periods subject mainly to dephasing.The model assumes temporally and spatially uncorrelated noise for these idle qubits.
  • Dephasing of idle qubits: The dephasing channel is a Kraus map in which p_d denotes the probability of a single phase flip.The paper notes that correlated dephasing could produce different behavior, including nearly decoherence-free subspaces in some codes.
  • Dephasing of idle qubits: Under a Markovian model, the phase-flip probability is related to idle duration and dephasing rate by p_d = 1/2(1 − e^−Γ_dt_i) ≈ Γ_dt_i/2.Using T_2 = 1/Γ_d gives p_d = t_i/2T_2.

B. Depolarizing channel for stabilizer mappings

The paper models stabilizer-mapping errors from trapped-ion MS gates using several depolarizing channels and connects their probabilities to microscopic gate infidelities. The analysis includes thermal motion, dephasing, idle errors, and crystal-reconfiguration effects, while identifying motional infidelity as a possible dominant limitation for same-species protocols.

  • Channel construction: Stabilizer information is mapped onto ancillas using either two multi-qubit MS gates or sequences of two-qubit MS gates, with leading mapping errors modeled by depolarizing channels.The model is applied to five active qubits comprising four data qubits and one ancilla.
  • Channel construction: Three MS-gate noise models are considered: independent single-qubit errors, single- and two-qubit errors, and a worst-case model allowing any five-qubit error.The models are intended to capture increasingly correlated error processes.
  • Fidelity mapping: For independent depolarizing noise, the five-qubit GHZ-state fidelity is approximately F ≈ 1 − 5p_MS for small p_MS.This gives p_MS = (1 − F)/5 at leading order.
  • Fidelity mapping: For two-qubit depolarizing noise, the model gives F = 1 − 95p_MS/105, whereas the five-qubit model gives F = 1 − 1008p_MS/1023.Some Z-type error patterns leave the GHZ state invariant and therefore contribute at the same order as the no-error process.
  • Microscopic error sources: The depolarizing probability is extracted by matching channel-induced GHZ infidelity to microscopic MS-gate infidelity calculations.This incorporates motional excitation and other experimental imperfections that make the evolution depart from an ideal MS gate.
  • Microscopic error sources: Higher mean phonon number makes MS gates slightly slower, while the resulting delay is assumed not to appreciably change idle-qubit dephasing during stabilizer mapping.The gate time is adjusted through laser detuning to preserve closed phase-space trajectories.
  • Protocol limitations: Motional infidelity can become the leading QEC error source when ancillary and physical ions share a species and are shuttled, merged, split, or rotated.In that setting, sympathetic re-cooling through the ancillary ion cannot be used because scattered light would perturb the data qubits.
  • Protocol limitations: The study aims to derive quantitative requirements for the experimental building blocks needed to complete QEC cycles and reach beneficial QEC.The analysis evaluates the operational measures used to assess a logical qubit encoded in the seven-qubit color code.

1. Mølmer-Sørensen (MS) gate error propagation

The section explains how Pauli errors propagate through CNOT and MS gates, then uses these rules to assess stabilizer-readout circuits and identify why single-ancilla schemes are not fault-tolerant.

  • MS-gate error propagation: MS-gate errors that anticommute with the gate basis rotate and propagate to the other qubit, whereas errors in the same basis do not propagate.The propagation is symmetric between the two qubits, unlike CNOT propagation.
  • Stabilizer readout: Multi-qubit MS gates map stabilizer eigenvalue information onto an ancilla through two entangling gates and an intermediate local Z rotation.The ancilla measurement distinguishes the stabilizer eigenvalues ±1.
  • Stabilizer readout: Sequential 2-ion MS gates combined with single-qubit rotations implement a rotated CNOT-like stabilizer mapping between an ancilla and four data qubits.The construction supports both X- and Z-type stabilizer readout circuits.
  • Fault-tolerance limitation: The fault-tolerant construction must ensure that any single physical error does not produce an uncorrectable data error leading to a logical error.Errors that only change the GHZ state's relative sign are treated as non-dangerous in the constructed circuit.
  • Fault-tolerance limitation: A single ancilla error can propagate into two data-qubit errors that become a logical error, so single-ancilla MS-based stabilizer readout is not fault-tolerant.The same problem affects both the 7-qubit and earlier 5-ion schemes.

4. Fault-tolerant DiVincenzo-Aliferis stabilizer readout with 2-ion MS gates

The MS-based DiVincenzo-Aliferis protocol prepares and verifies a four-ancilla GHZ state, couples it transversally to data qubits, and uses check outcomes to detect dangerous error patterns during stabilizer readout.

  • Protocol construction: The DiVincenzo-Aliferis protocol postpones GHZ-state verification until after transversal coupling to the data qubits.This differs from schemes that verify the ancilla before coupling.
  • Fault-tolerance: The protocol is designed so that a single error does not produce an uncorrectable data error that yields a logical error.Errors affecting only the GHZ state's relative sign are classified as non-dangerous for the data.
  • Fault-tolerance: The broader trapped-ion implementation uses a detailed MS-based toolbox and adapts the protocol to the architectural constraints of the experimental system.The study develops both DVS- and DVA-type schemes for the 7-qubit color code.
  • Protocol construction: Four ancilla qubits are prepared as a GHZ state using three 2-ion MS gates and local Z rotations before transversal data coupling.The circuit is the 2-ion-MS implementation shown in Figure 11.
  • Error detection: The first two ancilla measurements reveal the stabilizer eigenvalue through their parity, while the remaining ancillas serve as error checks.In the ideal case, the check outcomes have prescribed values; anomalous outcomes identify dangerous error histories.
  • Error detection: Dangerous two-qubit ancilla errors can reduce to a Za3Za4 pattern that propagates through coupling into two data-qubit bit flips and produces distinctive check outcomes.The encoding, coupling, and decoding stages illustrate this propagation explicitly.

3. Shuttling-based, two-species, two-qubit gate protocol

The two-species, shuttling-based protocol uses sequential 2-qubit MS gates, crystal reconfiguration, sympathetic cooling, and an extra cooling ion to perform stabilizer readout.

  • Protocol operations: Sequential 2-qubit MS gates and data-qubit rotations implement the conditional stabilizer-mapping operations for the protocol.The mapping is applied between the ancilla and each data qubit involved in a stabilizer.
  • Trap architecture: The protocol uses all five segmented-trap regions to reduce crystal-reconfiguration complexity during the QEC cycle.The regions comprise two manipulation zones interspersed between three storage regions.
  • Cooling and species choice: The ancilla and data ions share one species, while an additional ion of another species provides sympathetic recooling during the stabilizer readout.The resulting configuration contains 7 data ions, 1 ancilla ion, and 1 cooling ion.
  • Cooling and species choice: After coupling the four data qubits of a stabilizer, the ancilla is isolated with the cooling ion and measured through state-dependent fluorescence.The measurement infers the stabilizer information after the mapping sequence.
  • Performance trade-off: The protocol avoids collective multi-qubit mapping errors and uses higher-fidelity 2-qubit MS gates, but its complex reconfiguration increases idle-qubit dephasing.The authors therefore do not expect a major improvement for the non-fault-tolerant protocol.
  • Performance trade-off: A significant advantage from the two-qubit-gate approach may arise only when a fully fault-tolerant scheme is implemented.The stated limitation concerns the non-fault-tolerant protocol considered here.

B. Simulation results

The simulations assess beneficial QEC using an Alice-Igor-Bob framework under current and anticipated trapped-ion parameters, with different assumptions for initial encoded states and success-probability ranges.

  • Simulation framework: The simulations use an Alice-Igor-Bob framework in which an encoded qubit experiences environmental exposure and QEC before Bob tests whether its logical state was preserved.The framework evaluates the beneficial character of each QEC protocol.
  • Simulation framework: For multi-qubit MS simulations, Alice chooses the initial encoded state randomly, whereas 2-qubit-MS simulations use the dephasing-vulnerable |+⟩ state.The different choices reflect the simulation setup for the two gate families.
  • Simulation framework: Bob’s success probability ranges from 1 to 0.75 in one representation and from 1 to 0.5 in another, with both ranges representing complete decay from full coherence to total decoherence.The ranges correspond to the success-probability scale used in the simulations.
  • Parameter regimes: Results are presented for current parameters based on reported fidelities and for future parameters anticipated to be reachable in the near term.These cases are labeled “Current” and “Future” or “anticipated” performance.

1. Shuttling- and hiding-based QEC with multi-qubit MS gates

Simulations compare shuttling- and hiding-based QEC protocols using multi-qubit MS gates under current and anticipated future hardware parameters. Current performance is insufficient for beneficial QEC, whereas future two-species shuttling and hiding protocols can cross into beneficial operation and support repeated correction.

  • Simulation setup: The simulations evaluate single-species shuttling without cooling, dual-species shuttling with cooling, and hiding protocols using five-qubit MS gates.Each figure averages at least 40,000 runs per data point; curves compare protected, unprotected, and physical-qubit performance.
  • Evaluation criteria: Beneficial QEC requires the corrected logical-qubit curve to exceed the uncorrected encoded-qubit curve, ideally also surpassing the physical-qubit curve.These comparisons correspond respectively to the paper’s criteria (2) and (3).
  • Current performance: Current gate times, fidelities, and related parameters are generally insufficient to demonstrate beneficial QEC; current shuttling performance is similarly poor.For single-species shuttling without re-cooling, noisy MS gates after a few rounds rule out reaching the break-even point.
  • Future performance: Single-species shuttling without re-cooling crosses into beneficial QEC only after considerable environmental dephasing, and the advantage can disappear under correlated MS-gate noise.This protocol also cannot outperform the unprotected physical qubit for the stated state-discrimination task.
  • Future performance: Future two-species shuttling and hiding protocols show earlier, higher-integrity crossings into beneficial QEC than the least successful single-species protocol.The two-species shuttling results additionally indicate that multiple correction rounds can beneficially extend logical-qubit preservation.
  • Alternative gate strategy: Sequential two-qubit MS gates are considered as an alternative because they offer higher individual fidelity and more restricted ancillary-to-data error propagation, despite requiring more gates.The approach is also relevant to future fault-tolerant QEC implementations.

2. Shuttling-based two-species QEC with 2-qubit MS gates: exploring fault tolerance

The simulations assess when shuttling-based trapped-ion QEC becomes beneficial and formally fault tolerant under current and anticipated hardware performance. Future improvements enable beneficial QEC, whereas current performance cannot support a successful fault-tolerant demonstration.

  • Current hardware: The non-fault-tolerant two-qubit-MS protocol beats the encoded-qubit baseline only after substantial environmental exposure, while remaining below the bare physical-qubit baseline.This establishes break-even only after the encoded qubit has already decayed considerably.
  • Current hardware: Current hardware cannot reach useful-QEC break-even for the fault-tolerant DV-A protocol, despite allowing a basic QEC demonstration.Its performance remains poor even when the protocol duration permits error correction.
  • Future hardware: Future hardware makes non-fault-tolerant, DV-A, and DV-S protocols outperform the no-correction encoded-qubit baseline throughout the studied interval.They also exceed the single-physical-qubit reference over a wide range of environmental exposure times.
  • Robustness to higher errors: Tripling all operational error rates still supports a strong demonstration of beneficial QEC, with the crossing against the physical-qubit curve occurring at 0.894.Under this degraded setting, the non-fault-tolerant protocol is marginally superior to DV-A, which is marginally superior to DV-S.
  • Multiple rounds: Multiple QEC rounds can extend logical-qubit coherence to nearly twice that of the raw physical qubit, although one small-code layer remains insufficient for large-scale computation.Further suppression would require code concatenation or scaling with topological techniques.
  • Approach: The study combines a realistic trapped-ion toolbox, physically motivated error models, and extensive simulations of 7-qubit color-code protocols to quantify hardware requirements.The models incorporate experimental noise sources beyond simplified uniform QEC-operation error channels.
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