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Neuromorphic computing with multi-memristive synapses
Irem Boybat, Manuel Le Gallo, S. R. Nandakumar, Timoleon Moraitis, Thomas Parnell, Tomas Tuma, Bipin Rajendran, Yusuf Leblebici, Abu Sebastian, Evangelos Eleftheriou
TL;DR
Precise conductance modulation over a wide dynamic range remains challenging for memristive synapses. This paper proposes a counter-arbitrated multi-memristive architecture and demonstrates effective learning in simulations and a million-device PCM experiment, with approximately 0.1% of inputs misclassified.
Problem
Memristive synapses face limitations in conductance-response asymmetry, resolution, dynamic range, and device-level variability during neural-network learning.
Method
The paper represents each synaptic weight with multiple PCM-device conductances and uses a global counter-based scheme to select one device for programming.
Results
Approximately 0.1% of inputs were misclassified after training a 144,000-stream correlation-detection network using more than one million PCM devices.
Takeaways & Limitations
The architecture supports crossbar-compatible learning across spiking and non-spiking networks and enables large-scale experimental unsupervised learning with PCM devices.
Takeaways & Limitations
Under significant nonlinear conductance response and drift, an alternative architecture using devices with varying significance may be needed.
Abstract
from arXiv · showhide
Neuromorphic computing has emerged as a promising avenue towards building the next generation of intelligent computing systems. It has been proposed that memristive devices, which exhibit history-dependent conductivity modulation, could efficiently represent the synaptic weights in artificial neural networks. However, precise modulation of the device conductance over a wide dynamic range, necessary to maintain high network accuracy, is proving to be challenging. To address this, we present a multi-memristive synaptic architecture with an efficient global counter-based arbitration scheme. We focus on phase change memory devices, develop a comprehensive model and demonstrate via simulations the effectiveness of the concept for both spiking and non-spiking neural networks. Moreover, we present experimental results involving over a million phase change memory devices for unsupervised learning of temporal correlations using a spiking neural network. The work presents a significant step towards the realization of large-scale and energy-efficient neuromorphic computing systems.
I. RESULTS · A. The multi-memristive synapse
The multi-memristive synapse represents a synaptic weight using the combined conductance of N devices, increasing dynamic range and resolution. Its architectures support counter-controlled plasticity and crossbar-compatible current summation.
- A. The multi-memristive synapse: The synaptic weight is represented by the combined conductance of N devices, increasing the synapse’s dynamic range and resolution.An input voltage corresponding to neuronal activation is applied to all constituent devices, and their individual currents are summed.
- A. The multi-memristive synapse: Additional potentiation and depression counters can control the frequency of corresponding events through enable signals.An event is enabled when its counter value is one and disabled otherwise.
- A. The multi-memristive synapse: The constituent devices can be arranged in either differential or non-differential architectures.The non-differential architecture uses N devices, while the differential architecture contains two device groups representing G+ and G−.
- A. The multi-memristive synapse: In the non-differential architecture, one device is selected and potentiated or depressed to achieve synaptic plasticity.This selection occurs among the N devices constituting each synapse.
- A. The multi-memristive synapse: In the differential architecture, potentiation selects and potentiates one device from the group representing G+, while depression selects a device from the group representing G−.The supplied passage states that a device from the G− group is selected and potentiated for depression.
- A. The multi-memristive synapse: The proposed concept is compatible with crossbar implementation, enabling total synaptic current measurement without additional circuitry in the non-differential architecture.Devices constituting a synapse can be placed along crossbar bit lines, where Kirchhoff’s law sums their currents.
B. Multi-memristive synapses based on PCM devices
This section characterizes PCM devices as memristive synapses and identifies their variability, limited dynamic range, and nonlinear conductance response as challenges addressed by multi-memristive synapses.
- PCM device operation: PCM devices switch between high-conductance crystalline and low-conductance amorphous phases, enabling history-dependent conductance modulation for synaptic operation.A sufficiently high-amplitude depression pulse can induce the phase change.
- Single-device characterization: 9,700 devices were experimentally characterized in a 90 nm CMOS prototype using doped Ge2Sb2Te5, with programming pulse amplitude Iprog varied from 50 µA to 120 µA.The characterization examined mean conductance evolution with successive potentiation pulses.
- Device variability: PCM synapses exhibit significant intra-device and inter-device conductance variability, with higher variability reported for 90 nm devices than for 180 nm devices.The variability appears in conductance distributions under successive potentiation pulses.
- Challenges and proposed approach: Limited dynamic range, asymmetric and nonlinear conductance response, granularity, and random conductance changes challenge neural-network implementations using PCM and other memristive synapses.The section introduces multi-memristive synapses as an approach to address some of these limitations.
C. Simulation results on handwritten digit classification
This section evaluates PCM-based multi-memristive synapses in supervised ANN and unsupervised SNN handwritten-digit classification simulations. In both tasks, the proposed architecture outperforms conventional two-device differential synapses, while non-differential designs achieve comparable performance with lower implementation complexity.
- ANN classification: ANN simulations use a three-layer fully connected network trained by backpropagation for MNIST handwritten-digit classification.The PCM devices follow the nonlinear conductance response model.
- SNN classification: SNN simulations perform the same digit-recognition task with unsupervised learning using an STDP-based weight-update rule.Synapses potentiate when presynaptic spikes precede postsynaptic spikes and depress otherwise.
- Architecture comparison: The multi-memristive synapse significantly outperforms the conventional differential architecture using 2 devices in both ANN and SNN simulations.This comparison illustrates the effectiveness of the proposed architecture across both learning settings.
- Architecture comparison: The non-differential architecture achieves performance comparable to the differential architecture while offering lower implementation complexity.This result is promising for synaptic realizations using highly asymmetric devices.
D. Experimental results on temporal correlation detection
Experiments used a prototype phase-change-memory multi-memristive synapse architecture to train an SNN for unsupervised temporal-correlation detection in event-based streams. The approach was evaluated in a challenging small-scale task and scaled to more than one million PCM devices.
- Experimental setup: A prototype PCM chip trained an SNN to detect temporal correlations in event-based data streams using unsupervised learning.The experiment targets unsupervised learning, a key neuromorphic-processing task for data lacking labeled samples or reliable training sets.
- Experimental setup: The SNN accumulated postsynaptic outputs from plastic synapses receiving event-based presynaptic spikes, with correlated and uncorrelated input streams.The network architecture interfaces a neuron with plastic synapses, each receiving an event-based data stream.
- Small-scale experiments: 1,000 synapses included only 100 receiving temporally correlated inputs with correlation coefficient c of 0.75, making detection difficult.The task becomes harder as the correlation coefficient and the number of correlated inputs decrease; detecting 10% correlated inputs with c <1 is described as fairly difficult.
- Scalability experiment: 144,000 input streams and 7 PCM devices per synapse produced a network containing more than one million PCM devices.The larger experiment achieved well-separated synaptic distributions at the end of the experiment, and a nonlinear PCM device-model simulation was also performed.
II. DISCUSSION
The multi-memristive synapse offers crossbar-compatible, energy-efficient, compact, and more reliable learning hardware despite non-ideal device behavior. Its main limitations arise from nonlinear PCM conductance response and possible weight-dependent plasticity, while conductance drift appears less detrimental under small drift exponents.
- Hardware advantages: Crossbar matrix-vector multiplication achieves O(1) read complexity, while programming at least ten times more power than reading adds no significant energy overhead.Only one device in the multi-memristive synapse is programmed per synaptic update.
- Hardware advantages: Small crossbar footprint and marginal additional neuron circuitry support compact implementation, while a single global counter can arbitrate an entire array.The added circuitry is needed for arbitration.
- Reliability: Device failures can be compensated by other constituent devices, and less frequent programming plus potentiation and depression counters improve synapse lifetime and endurance.The counters reduce the effective number of programming operations.
- Limitations: Arbitration without conductance knowledge can make potentiation or depression pulses ineffective, producing weight-dependent plasticity.The probability to potentiate reduces with increasing synaptic weight.
- Limitations: PCM simulations perform worse than double-precision floating-point simulations even for N > 10 multi-memristive synapses, primarily because of nonlinear conductance response.The reported behavior is not attributed to the scheme’s weight-dependent plasticity.
- Limitations: Conductance drift does not significantly affect the studies when the drift exponent is below 0.1; the devices average 0.05.The experimental SNN results likewise indicate maintained classification accuracy.
III. METHODS · A. Experimental platform
The experimental platform uses a prototype phase-change-memory chip integrating 3 million mushroom-type devices in a four-bank interleaved architecture with 90 nm CMOS technology.
- A. Experimental platform: 3 million devices are integrated into a prototype PCM chip using a 4-bank inter-leaved architecture and 90 nm CMOS technology.The mushroom-type devices use doped Ge2Sb2Te5 (GST), with an approximately 20 nm bottom-electrode radius and approximately 100 nm phase-change-material thickness.
B. PCM characterization
PCM characterization used large device ensembles, controlled initialization and programming pulses, and repeated conductance reads to characterize potentiation and depression. Conductance measurements used a fixed 0.3 V read voltage.
- Fig. 2(b) experiment: 10,000 devices were initialized to approximately 0.1 µS and characterized with 20 potentiation pulses using 50 ns pulses of varying amplitudes.After each pulse, conductance was averaged over 50 reads taken at approximately 5 s intervals.
- Fig. 2(e) experiments: 1,000 devices were initialized to approximately 0.1 µS and exposed to 4 potentiation pulses at Iprog = 100 µA and 50 ns width.After the final two pulses, conductance was averaged over 20 reads spaced approximately 1.5 s apart.
- Fig. 3 experiments: For N = 1,3 and 7, measurements used 1,000, 3,000, and 7,000 devices, respectively, initialized to 5 µS for potentiation and depression experiments.Potentiation used 100 µA, 50 ns pulses, while depression used 450 µA, 50 ns pulses; conductances were read 50 times and averaged after each pulse.
- Measurement method: 0.3 V was applied in all measurements to obtain device conductance from the corresponding current.This fixed-voltage readout was used across the reported characterization measurements.
C. Simulation of neural networks
The simulations evaluate multi-memristive synapses in both non-spiking and spiking neural networks using MNIST classification tasks. They model sequential device-level weight updates, stochastic pulse effects, and differential or non-differential synaptic architectures.
- ANN simulation: The ANN uses 784 input, 250 hidden, and 10 output neurons, training on 60,000 MNIST images for 10 epochs before testing on 10,000 images.Testing is also performed every 1,000 examples during the final 20,000 training images.
- SNN simulation: The SNN contains 784 input and 50 output neurons, with each synapse comprising N memristive devices and training on 60,000 MNIST images over 3 epochs.All 10,000 test images are used, with results averaged from evaluations every 1,000 examples during the final 20,000 training images.
- SNN simulation: The SNN uses 5 ms simulation steps, stochastic pixel-driven input spikes, delta-shaped synaptic currents, and leaky integrate-and-fire output neurons.Synaptic weights are learned with an SDTP rule, and output thresholds are adjusted through homeostasis after the 1,000th input image.
D. Correlation detection experiment
The correlation-detection experiment uses multi-memristive PCM synapses trained with STDP, progressing from a 1,000-synapse network to a large-scale experiment involving 1,008,000 PCM devices. The implementation sequentially reads and programs PCM devices, while the accompanying simulation models PCM conductance evolution under potentiation and depression pulses.
- D. Correlation detection experiment: The correlation-detection network comprises 1,000 plastic multi-memristive synapses connected to an output neuron and learns weights with an STDP rule.Each synapse consists of N devices, and weights lie in [0,1].
- D. Correlation detection experiment: PCM devices are accessed sequentially for reading and programming, with initialization to 0.1 µS followed by one 120 µA, 50 ns potentiation pulse.Weight storage and weight updates are performed on PCM devices.
- D. Correlation detection experiment: 1,008,000 PCM devices are used in the large-scale experiment, comprising 144,000 synapses with N = 7 devices each.Of the 144,000 trained synapses, 14,400 receive correlated inputs; the neuron threshold is set to 7,488.
- D. Correlation detection experiment: The nonlinear PCM simulation uses 100 µA, 50 ns potentiation pulses and models depression as setting conductance to 0 µS.Two consecutive potentiation pulses represent one experimental pulse with 100 ns width.
COMPETING INTERESTS
The authors declare that they have no competing interests.
- The authors declare no competing interests.