Source-linked AI summary
64-Qubit Quantum Circuit Simulation
Zhao-Yun Chen, Qi Zhou, Cheng Xue, Xia Yang, Guang-Can Guo, Guo-Ping Guo
TL;DR
Classical simulation of circuits above 50 qubits is constrained by space and time. This paper partitions circuits at CZ gates and optimizes diagonal-gate processing; it reports a 460-second estimate for a 56-qubit, depth-23 circuit on the IBM team's supercomputer, much shorter than the IBM team's time.
Problem
Classical simulations face space and time limits above 50 qubits, despite proposed methods for low-depth circuits with more than 49 qubits.
Source: §1 · p. 2Method
Results
460 s is the estimated time for a 56-qubit, depth-23 circuit on the IBM team's supercomputer, much shorter than the IBM team's time.
Source: §4 · p. 8Takeaways & Limitations
The scheme is suitable for acquiring a great number of measurement outcomes, and the authors report it is optimal when extracting more than one million outcomes.
Source: §4 · p. 8
Abstract
from arXiv · showhide
Classical simulations of quantum circuits are limited in both space and time when the qubit count is above 50, the realm where quantum supremacy reigns. However, recently, for the low depth circuit with more than 50 qubits, there are several methods of simulation proposed by teams at Google and IBM. Here, we present a scheme of simulation which can extract a large amount of measurement outcomes within a short time, achieving a 64-qubit simulation of a universal random circuit of depth 22 using a 128-node cluster, and 56- and 42-qubit circuits on a single PC. We also estimate that a 72-qubit circuit of depth 23 can be simulated in about 16 h on a supercomputer identical to that used by the IBM team. Moreover, the simulation processes are exceedingly separable, hence parallelizable, involving just a few inter-process communications. Our work enables simulating more qubits with less hardware burden and provides a new perspective for classical simulations.
1. Introduction
Classical simulations above 50 qubits face major space and time demands, while proposed methods target low-depth circuits. The paper introduces a partitioning scheme for large-sample, low-depth simulations and applies it to universal random circuits.
1. Introduction
- Directly simulating 50 qubits requires about 16-PB of RAM, motivating efficient methods for low-depth circuits above 49 qubits.The introduction notes Google and IBM approaches including deferral of entanglement gates [7] and the Feynman path method [8].Source: §1 · p. 2
- The scheme transforms CZ gates into measurement and single-qubit gates, creating separable sub-circuits whose results are summed to reconstruct the final state.For one CZ gate, this scheme creates four sub-circuits, compared with eight in Aaronson's method.Source: §1 · p. 2
- The authors report simulating a 64-qubit universal random circuit at depth 22 with sampling number 228; they use universal random circuits to characterize quantum supremacy in the region of quantum chaos.Source: §1 · p. 2
2. Methods
The methods partition circuits at CZ gates to create independent smaller circuits, then combine their results. They estimate runtime for different circuit sizes and hardware setups, while optimizing diagonal-gate processing to reduce memory traffic.
2. Methods
- Replacing cut CZ gates with measurement and single-qubit operations creates copies whose final states are summed; the separated halves can then be simulated independently.The example divides an eight-qubit circuit into four copies, with qubits 0–3 no longer entangled with qubits 4–7.Source: §2 · pp. 2–3
2.2 Methods to estimate the different qubit counts and depths
- Runtime estimates combine efficient-gate counts by layer, circuit depth, equivalent half-circuit count, average gate time, and node count.For 56-, 64-, and 72-qubit circuits, later-layer counts are 8, 10, and 12, respectively; the first three layers use separate assumptions.Source: §2.2 · p. 3
2.3 Simulation Schemes on Different Hardware Circumstances
- For the sufficient-RAM scheme, 56- and 42-qubit simulations use 65,536 independent copies; a 64-qubit run prepares the first 14 layers before simulating the final eight.The 64-qubit scheme cuts eight CZ gates to generate 256 copies, with 128 GB of initial-state data per copy loaded locally from RAM.Source: §2.3 · p. 4
- When a node lacks RAM for a partition, the 32-qubit circuit uses distributed simulation, including distributed calculation of the upper-lower tensor product.The sampled result is copied to the nodes, which calculate their components and add them to the final results.Source: §2.3 · p. 4
2.4 Methods to optimize simulation of diagonal gates
- Memory reads and writes, rather than arithmetic, bottleneck the simulations, so reducing memory traffic is necessary alongside optimizing read efficiency.Single-precision storage is only twice as fast as double-precision storage, despite the stated 16-fold floating-point speed advantage.Source: §2.4 · pp. 4–5
- Diagonal gates multiply state-vector components without exchanging data, so combining them in a layer can reduce repeated memory traversals.The method reports that applying m T gates costs almost the same as applying one T gate to the same qubit system.Source: §2.4 · p. 5
3. Results
The simulations reproduce the expected output-probability distributions, while partitioning results show that effective split choices depend on circuit depth. The paper also estimates a 72-qubit, depth-23 simulation at 16 hours under specified supercomputer conditions.
3. Results
- For a 56-qubit circuit on a 256-GB-RAM PC, the method yields full state vectors when l≤7, sampled results when 8<l≤38, and fails to compress when l>38.The regimes depend on the equivalent-qubit count relative to device capacity and the original circuit size.Source: §3 · p. 6
- Runtime rises with relative complexity as circuit depth increases, and the partition scheme has an upper bound on optimization for a given depth.The reported runtime comparison covers 6×6, 6×7, 7×7, and 8×7 random circuits simulated on a PC with a GTX-1080Ti.Source: §3 · p. 7
- Dividing the circuit into three or four parts is more effective at small depths, while two parts suit depths around 22 or 30.The authors do not completely solve the combinatorial problem of choosing how to split qubits; the transformed-gate count depends on the partitioning scheme and generally increases with the number of parts.Source: §3 · p. 7
- 16 h are estimated for a 72-qubit, depth-23 simulation using a 24,576-node supercomputer and 228 sampling number.The estimate uses an average gate time of 0.67 s measured for a 36-qubit circuit on a 128-node cluster.Source: §3 · p. 7
- The 56- and 64-qubit output-probability distributions match the Gumbel theory, and samples from full final-state vectors exhibit the predicted Porter–Thomas distribution.The authors report that arbitrary numbers of measurement outcomes can be extracted from the full vector space without extra cost.Source: §3 · p. 7
4. Conclusion
The scheme is estimated to simulate a 56-qubit, depth-23 circuit in 460 seconds, and is suited to extracting large numbers of measurement outcomes. The authors note that simulation complexity grows exponentially with partitioned CZ gates, bounding feasible depth, while low-depth circuits and combinations with other methods remain promising.
4. Conclusion
- 460 seconds is the estimated time for a 56-qubit, depth-23 circuit, much shorter than the time achieved by the IBM team.For depths 30, 31, and 38, estimated times are 2.74, 22.7 hours, and 18.9 days, respectively.Source: §4 · p. 8
- The scheme is reported as optimal for extracting more than one million outcomes, unlike the Feynman path method, which obtains one outcome per run.The experiments obtained 228 components for the 56- and 64-qubit simulations; the cited Google team simulated 200 thousand components for a 56-qubit circuit [8].Source: §4 · p. 8
- Partitioning can be combined with methods such as the Feynman path integral, while exponential growth in partitioned CZ gates or other variables bounds feasible depth.The authors say low-depth, larger-qubit simulations remain relevant to studying algorithms such as QFT and unsupervised machine learning [19].Source: §4 · p. 8
A. Theoretical derivation of qubit partitioning
The derivation partitions the circuit into halves and decomposes cross-partition CZ gates into single-qubit operations, allowing the halves to be calculated independently. The method’s cost grows exponentially with the number of segmented CZ gates, constraining feasible depth.
A. Theoretical derivation of qubit partitioning
- A controlled two-qubit gate is decomposed into a sum of tensor products of single-qubit matrices, and CZ is expressed using projectors with I and Z.The control qubit determines whether the target does nothing or receives a single-qubit gate.Source: A. Theoretical derivation of qubit… · p. 18
- The circuit is divided into upper and lower halves along the center line, with n=r×q qubits arranged in r rows and q columns.The derivation takes r even, r=2p, for its expressions; at least one of r and q is even for equal division.Source: A. Theoretical derivation of qubit… · p. 19
- Cross-half CZ gates occur only in layers a×q+7 and a×q+8, so the first six layers can be divided directly into two half-circuits.The method rewrites the cross-half CZ gates as combinations of single-qubit gates.Source: A. Theoretical derivation of qubit… · pp. 19–20
- After layer six, the state splits into a tensor product of two half-states; transforming cross-half CZ gates in later layers yields independent half-circuits.The same transformation is applied in the eighth layer and remaining layers.Source: A. Theoretical derivation of qubit… · p. 20
- The computation grows exponentially with the number of segmented CZ gates; at 23 layers, it increases sixteen-fold and exceeds the stated computing resources.The authors simulate 22 layers; layers 16 through 22 have no cross-half CZ gates.Source: A. Theoretical derivation of qubit… · pp. 20–21
B. Hardware and software environments
The simulations used a graphics-card PC for smaller circuits and a 128-node cluster for the 64-qubit run. A second 64-qubit run used 64 nodes and took 10 days, with disk read speed limiting performance.
B. Hardware and software environments
- The PC tests took 1,384 seconds for 42 qubits and 44.1 hours for 56 qubits.The passage describes graphics-card simulation as possible for circuits with fewer than 50 qubits, while reporting both test results.Source: B. Hardware and software environments · p. 21
- The 64-qubit simulation used 128 nodes, each with two Xeon E5-2690V4 processors and 256 GB RAM.Each processor had 14 cores, a 35 MB cache, and a 2.60 GHz clock speed.Source: B. Hardware and software environments · p. 21
- A second 64-qubit simulation on 64 nodes took 10 days, with performance limited by reading the sixth-layer state from hard disk.Each node had two Xeon E5-2667V4 processors and 128 GB RAM; the state was stored on disk rather than in RAM.Source: B. Hardware and software environments · p. 21
- The implementation used CUDA for GPU work, OpenMP to accelerate 56-qubit sampling, and MPI to manage 64-qubit runs without inter-process communication.C/C++ was the programming language; partitions were computed independently across nodes.Source: B. Hardware and software environments · p. 21