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ShuffleNet V2: Practical Guidelines for Efficient CNN Architecture Design
Ningning Ma, Xiangyu Zhang, Hai-Tao Zheng, Jian Sun
TL;DR
Efficient CNN design often relies on FLOPs, although practical speed also depends on memory access cost and target-platform characteristics. The paper derives platform-aware design guidelines and introduces ShuffleNet V2, which is faster and more accurate than prior networks on both platforms.
Problem
Efficient CNN design often relies on FLOPs, although practical speed also depends on memory access cost and target-platform characteristics.
Method
The authors evaluate direct metrics on target platforms through runtime experiments, derive design guidelines, and build ShuffleNet V2 accordingly.
Results
ShuffleNet V2 is faster and more accurate than prior networks on both platforms; at 500MFLOPs, it is 58% faster than MobileNet v2 on GPU.
Takeaways & Limitations
The findings support platform-aware network design that evaluates practical speed rather than relying on FLOPs alone.
Takeaways & Limitations
Increasing receptive field for object detection in high-resolution images remains future work.
Abstract
from arXiv · showhide
Currently, the neural network architecture design is mostly guided by the \emph{indirect} metric of computation complexity, i.e., FLOPs. However, the \emph{direct} metric, e.g., speed, also depends on the other factors such as memory access cost and platform characterics. Thus, this work proposes to evaluate the direct metric on the target platform, beyond only considering FLOPs. Based on a series of controlled experiments, this work derives several practical \emph{guidelines} for efficient network design. Accordingly, a new architecture is presented, called \emph{ShuffleNet V2}. Comprehensive ablation experiments verify that our model is the state-of-the-art in terms of speed and accuracy tradeoff.
1 Introduction
FLOPs is an indirect proxy that can diverge from speed because runtime depends on factors such as memory access cost and platform-specific operation efficiency. The paper therefore advocates measuring direct performance on target platforms, derives four design guidelines, and introduces ShuffleNet V2, which improves speed-accuracy tradeoffs.
- Motivation: FLOPs can misrepresent runtime: networks with similar FLOPs may have different speeds, making FLOPs alone insufficient for architecture design.MobileNet v2 is much faster than NASNET-A despite comparable FLOPs.
- Motivation: Memory access cost can substantially affect runtime, especially for operations such as group convolution and on devices with strong computing power.The paper identifies memory access cost as a major factor omitted by FLOPs.
- Design Principles: The paper proposes using direct metrics such as speed instead of indirect metrics such as FLOPs, evaluated on the target platform.These two principles address discrepancies between computation estimates and actual performance.
- Design Guidelines: The work derives four efficient-network design guidelines and validates them through controlled experiments on GPU and ARM platforms with dedicated code optimization.The guidelines are presented as platform independent, while validation is platform specific.
- ShuffleNet V2: At a 40M FLOPs budget, ShuffleNet v2 is 3.5% more accurate than ShuffleNet v1 and 3.7% more accurate than MobileNet v2.The architecture is evaluated for speed and accuracy on both GPU and ARM platforms.
2 Practical Guidelines for Efficient Network Design
Controlled runtime analysis shows that FLOPs alone do not accurately estimate CNN speed because data movement, shuffling, and element-wise operations also consume substantial time. The resulting guidelines favor balanced convolutions, cautious grouping, low fragmentation, and fewer element-wise operations, with effects depending on the target platform.
- Runtime analysis: FLOPs account only for convolution, while data I/O, data shuffle, and element-wise operations also occupy considerable runtime.The study evaluates efficient networks including ShuffleNet v1 and MobileNet v2 under fully optimized settings.
- Guideline 1: Equal input and output channel widths minimize theoretical memory access cost when convolutional FLOPs are fixed.The MAC lower bound is reached when input and output channels are equal, although practical cache and blocking strategies can cause deviations.
- Guideline 1: When FLOPs are fixed, approaching a 1:1 input-to-output channel ratio reduces MAC and increases evaluation speed.Table 1 varies c1:c2 while holding total FLOPs constant.
- Guideline 2: Increasing group count raises MAC at fixed computational cost, making 8 groups more than two times slower than 1 group on GPU and up to 30% slower on ARM.The guideline therefore recommends choosing group count according to the target platform and task rather than maximizing channels indiscriminately.
- Guideline 3: Fragmenting pointwise convolutions reduces speed significantly on GPU, with a 4-fragment structure 3× slower than a 1-fragment structure, while ARM is less affected.The experiment compares sequence and parallel arrangements of 1 to 4 pointwise convolutions at equal FLOPs.
- Guideline 4: Removing ReLU and shortcut operations from a ResNet bottleneck produces around 20% speedup on both GPU and ARM.The broader conclusion recommends reducing element-wise operations alongside balanced convolutions, cautious grouping, and reduced fragmentation.
3 ShuffleNet V2: an Efficient Architecture
ShuffleNet V2 addresses the cost of group convolutions, bottleneck structures, and shortcut additions by using channel split, branchwise processing, concatenation, and channel shuffle. Its efficient blocks enable greater channel capacity and feature reuse, supporting both accuracy and efficiency.
- Design motivation: ShuffleNet V2 seeks wide channels without dense convolution or excessive groups, while avoiding the memory-access and element-wise costs associated with prior designs.Pointwise group convolutions and bottleneck structures increase MAC, while shortcut Add operations are undesirable.
- Channel Split and ShuffleNet V2: ShuffleNet V2 removes shortcut Add, confines ReLU and depthwise convolutions to one branch, merges three element-wise operations, and doubles output channels for downsampling.The downsampling unit removes channel split.
- Analysis of Network Accuracy: Higher block efficiency allows ShuffleNet V2 to use more feature channels and larger network capacity, while half the channels directly pass through each block when c′ = c/2.This direct passage is described as feature reuse, similar in spirit to DenseNet and CondenseNet.
- Analysis of Network Accuracy: The number of directly connected channels between blocks i and i+j is r^jc, so feature reuse decays exponentially with block distance and resembles DenseNet’s reuse pattern.ShuffleNet V2 realizes this reuse pattern by design and is described as more efficient than DenseNet; experiments in Table 8 verify the benefit.
4 Experiment
Experiments on ImageNet and COCO show that ShuffleNet v2 delivers strong accuracy–efficiency trade-offs across lightweight and larger-model settings. It is consistently competitive or superior in accuracy and direct runtime, including on GPU, ARM, and object detection.
- Inference speed: At 500MFLOPs, ShuffleNet v2 is 58% faster than MobileNet v2, 63% faster than ShuffleNet v1, and 25% faster than Xception.The model is especially faster on GPU; on ARM, ShuffleNet v1, Xception, and ShuffleNet v2 have comparable speeds, while MobileNet v2 is much slower.
- Accuracy and speed: ShuffleNet v2 is best on both GPU and ARM when accuracy and speed are considered together.The paper attributes MobileNet v2’s slower mobile-device performance to its higher memory access cost.
- Compatibility with other methods: Adding a Squeeze-and-excitation module improves ShuffleNet v2 classification accuracy by 0.5% at the cost of some speed.This demonstrates compatibility with other techniques while exposing a speed–accuracy trade-off.
- Generalization to Large Models: ShuffleNet v2 also outperforms ShuffleNet v1 at 2.3GFLOPs and surpasses ResNet-50 with 40% fewer FLOPs in large-model comparisons.A 164-layer ShuffleNet v2 with SE components achieves superior accuracy over previous state-of-the-art models with much fewer FLOPs.
- Object Detection: On COCO object detection, ShuffleNet v2 performs best among the compared lightweight backbones, while ShuffleNet v2* has the best accuracy and remains faster than other methods.The classification ranking differs from detection: Xception ranks second or tied in detection, likely because its building blocks have a larger receptive field.
5 Conclusion
The paper argues that efficient network architecture design should prioritize direct platform speed alongside computation complexity, and presents practical guidelines and ShuffleNet V2. Experiments verify the new model’s effectiveness and motivate platform-aware future design.
- 5 Conclusion: The work advocates evaluating direct metrics such as speed rather than relying only on indirect metrics like FLOPs.The authors emphasize that future architecture design should be platform aware and more practical.
- 5 Conclusion: The authors present practical design guidelines and the novel ShuffleNet V2 architecture.These contributions are framed as outcomes of the proposed platform-aware design approach.
- 5 Conclusion: Comprehensive experiments verify the effectiveness of ShuffleNet V2.The paper’s comparison table evaluates classification error and speed across two platforms and four computation-complexity levels.
Appendix
The appendix documents the experimental building blocks, ShuffleNet v2 variants with SE or residual connections, speed-comparison methodology, and architectures for large models.
- Building blocks: Appendix Fig. 1 evaluates five building blocks for guideline 3: 1-fragment, 2-fragment-series, 4-fragment-series, 2-fragment-parallel, and 4-fragment-parallel.These structures are identified as the building blocks used in the guideline 3 experiments.
- ShuffleNet v2 variants: ShuffleNet v2 is shown with residual connections, squeeze-and-excitation (SE), or both SE and residual connections.The variants place SE modules and residual paths into ShuffleNet v2 building blocks.
- Speed comparisons: Appendix Table 1 compares actual speeds for whole architectures and units, stacking 10 units while adjusting other networks’ channels to keep FLOPs unchanged.For 40M-FLOPs models with 320 × 320 inputs, batchsize is set to 8 to ensure GPU utilization.
- Large-model architectures: Appendix Table 2 specifies large-model architectures, including ShuffleNet v1-50, ResNet-50, and SE-ShuffleNet v2-164, with FLOPs of 2.3G, 3.8G, and 12.7G.Downsampling uses conv3_1, conv4_1, and conv5_1 with stride 2; SE modules are placed before residual add-ReLUs in SE-ShuffleNet v2-164.