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Fault-tolerant magic state preparation with flag qubits

Christopher Chamberland, Andrew W. Cross

arXiv:1811.00566v2quant-ph

TL;DR

Magic state distillation is a leading route to universal fault-tolerant gates, but its circuits require encoded Clifford operations whose overhead is often not counted. This paper proposes flag-based direct magic state preparation and compares it with MEK distillation, finding substantially lower overhead in some regimes.

  • Problem

    Magic state distillation circuits are not fault-tolerant themselves, and the overhead of implementing encoded Clifford gates with negligible error is often not included in comparisons.

    Source: §1 · p. 2

  • Method

    The paper designs flag-qubit schemes to fault-tolerantly prepare magic states directly, including a scheme with one extra ancilla.

    Source: §1 · p. 2

  • Results

    In some regimes, the flag-based scheme has qubit and gate overhead several orders of magnitude below the MEK distillation scheme.

    Source: §1 · p. 2

  • Takeaways & Limitations

    The flag-based approach offers an alternative to distillation, with lower overhead in some regimes and potential use in state-injection schemes.

    Source: §1 · p. 2, §6 · p. 10

    At high physical error rates, topological-code MEK may outperform the flag-based scheme, and realistic connectivity constraints remain for future study.

    Source: §6 · p. 10

Abstract

from arXiv · show

Magic state distillation is one of the leading candidates for implementing universal fault-tolerant logical gates. However, the distillation circuits themselves are not fault-tolerant, so there is additional cost to first implement encoded Clifford gates with negligible error. In this paper we present a scheme to fault-tolerantly and directly prepare magic states using flag qubits. One of these schemes uses a single extra ancilla, even with noisy Clifford gates. We compare the physical qubit and gate cost of this scheme to the magic state distillation protocol of Meier, Eastin, and Knill, which is efficient and uses a small stabilizer circuit. In some regimes, we show that the overhead can be improved by several orders of magnitude.

1 Introduction

Fault-tolerant universal computation needs very low logical failure rates, but magic state distillation can carry substantial overhead when encoded Clifford gates are included. The paper proposes flag-based magic state preparation and compares its resource costs with MEK distillation.

1 Introduction

  • Fault-tolerant error correction is motivated by the need for very low failure rates in noisy quantum devices to make computations beyond the shortest depths succeed with high probability.The paper notes that certain quantum algorithms have efficient quantum implementations while the best-known classical algorithms require superpolynomial resources.Source: §1 · p. 1
  • Magic state distillation remains a leading candidate for universal fault-tolerant computation, but its overhead may rise when encoded Clifford operations are included.Distillation studies often assume perfect Clifford operations, while achieving negligible logical Clifford error can require large codes.Source: §1 · p. 1
  • Flag error correction uses extra ancillas to flag when v ≤ t faults cause data errors of weight greater than v, with t = ⌊(d − 1)/2⌋.The paper places its proposal within recent flag-qubit schemes that minimize ancillas for measuring stabilizer generators.Source: §1 · p. 1
  • The proposed flag-based scheme uses one extra ancilla and, in some regimes, has qubit and gate overhead several orders of magnitude below MEK.The comparison uses the same encoded Clifford operations in both schemes, including noisy Clifford gates.Source: §1 · p. 2
  • The paper contrasts its smaller error-correction circuits with AGP’s large cat-state ancillas and Steane error correction, and reports an improved threshold.It also describes an extension to higher-distance color codes, which is not numerically analyzed.Source: §1 · p. 2

2 Basic notation and noise model

This section introduces notation for quantum operations and magic states, alongside the circuit-level noise model used in the paper’s simulations.

2 Basic notation and noise model

  • The Pauli group comprises tensor products of I, X, Y, and Z, together with scalar multiples ±1 and ±i.The supplied notation passage identifies this as the n-qubit Pauli group.Source: §2 · p. 2
  • The |H⟩ state is a magic state that, with stabilizer operations, can serve as a resource for universal quantum computation.Together with Y, CY, and a Y-basis measurement, it can simulate a T gate.Source: §2 · p. 3
  • The circuit-level model assigns probability p to independent Pauli errors after each single- and two-qubit gate location.Single-qubit errors are drawn from {X, Y, Z}; two-qubit errors are drawn from the non-identity elements of {I, X, Y, Z}⊗2.Source: §2 · p. 3

3. With probability

The supplied passages describe simulation assumptions and logical-error estimation under concatenation, while noting a boundary on the idle-error assumption.

3. With probability

  • The simulations use Pauli faults after state preparation and measurement outcomes that flip with probability 2p/3, while idle locations have error probability p/100.The model also replaces |0⟩ preparation with |1⟩ with probability 2p/3 and applies Pauli errors to |H⟩ preparation with probability p.Source: §3 · p. 3
  • The idle-error assumption may not hold for superconducting qubits whose gate infidelities are near the coherence limit.The paper expects comparisons to remain robust because all analyzed schemes use the same code family and Clifford-gate implementations.Source: §3 · p. 3
  • The analyzed encoded gates and resource states use the Steane code, with code distance increased through concatenation.The logical-gate failure probability is bounded using malignant events.Source: §3 · p. 3
  • At the first concatenation level, Monte Carlo simulations estimate the coefficients counting weight-k errors that can cause logical faults.The logical failure estimate uses these coefficients and the number of circuit locations; higher-order terms are treated as relatively small for the physical error rates considered.Source: §3 · pp. 3–4
  • The paper extends the logical-error bound to higher concatenation levels by replacing physical gates with lower-level rectangles.The level-l estimate uses failure probabilities obtained from a level-(l − 1) Monte Carlo simulation.Source: §3 · p. 3

3 Preparing magic states in the Steane code

The paper prepares encoded |H⟩ states using Steane-code flag circuits, with error detection as its focus and concatenation used to increase code distance. It also describes an error-correction variant and a 2-flag extension to the 17-qubit color code.

Steane-code error correction

  • The Steane code supports transversal Clifford gates, while its logical Hadamard is H = H⊗7; the paper uses a three-ancilla flag circuit for stabilizer error correction.The stabilizer circuit detects when a single fault spreads to a data error of weight greater than one.Source: §3 · p. 4, Figure 3 · p. 5

Error detection

  • One extra ancilla enables fault-tolerant logical-Hadamard measurement in a 10-qubit Steane-code error-detection scheme that rejects flagged preparations.The scheme uses the Fig. 3 error-correction circuit and rejects the state when a flag detects a data error of weight greater than one.Source: §3 · p. 4, Figure 5 · p. 5, Figure 3 · p. 5

Error correction

  • The alternative error-correction preparation uses three flag qubits, but its low pseudo-threshold leads the paper to focus on error detection.Its logical-Hadamard circuit localizes errors near the fourth controlled-Hadamard gate and uses the full six-bit syndrome; a flag in the specified third measurement triggers another error-correction round.Source: §3 · p. 5, Figure 6 · p. 6

Concatenation

  • Concatenating the Steane code raises distance while reusing a small-code flag circuit at higher levels, avoiding the need to decode the resulting |H⟩ state before a logical T gate.Finding flag circuits for high-weight operators while preserving error distinguishability is challenging.Source: §3 · p. 5

Color-code extension

  • A 2-flag logical-Hadamard circuit extends the preparation approach to the [[17, 1, 5]] color code, whose stabilizer measurements can use at most four ancillas.The circuit is proposed for error detection and may be useful before concatenation or in a hybrid state-preparation and distillation scheme.Source: Figure 7 · p. 6, §3 · p. 7

4 Meier-Eastin-Knill distillation circuits

The MEK protocol encodes |H⟩ states in the [[4, 2, 2]] error-detecting code and measures H1H2 on pairs. Under the paper’s noisy-gate model, faults in its two-qubit gates can create undetected data errors, so the gates must be encoded for a fair overhead comparison.

Protocol

  • MEK encodes |H⟩ states in the [[4, 2, 2]] code and measures H1H2 on pairs of encoded states.The circuit also measures the code stabilizers and applies a Hadamard to one encoded qubit.Source: §4 · p. 7

Noisy-gate model

  • A single fault in some two-qubit gates can produce undetected multi-qubit data errors, so the gates are encoded in the level-l concatenated Steane code to meet the target output error rate.The target input-state failure probability is O(p^2l).Source: §4 · p. 7

Overhead comparison

  • For a fair overhead comparison, both schemes use the same encoded Clifford operations and include the Fig. 3 error-correction unit in every exRec.These choices affect the MEK qubit and gate overhead evaluation.Source: §4 · p. 7

Twirling

  • Twirling is unnecessary for physical implementation, and the authors report that it increases their logical error rates, so they use input states as they occur.The passage notes that protocols without twirling can use an optimal choice of gates.Source: §4 · p. 7

5 Resource overhead comparison

The flag-qubit preparation scheme has substantially lower qubit and gate overhead than the MEK schemes, while the hybrid scheme costs less than full MEK but more than flag-based error detection. For physical error rates from 4 × 10^-5 to 6 × 10^-5, the flag-based scheme requires fewer qubits by several orders of magnitude to reach a logical failure rate of 10^-9.

5 Resource overhead comparison

  • MEK first teleports physical |H⟩ states to level 2 and distills there, then teleports to level 3 for another round, producing logical error rate a′p^4 + b′p^8.The authors found no advantage to another MEK round for physical error rates p ∈ [10^-5, 10^-4].Source: §5 · p. 7, Figure 10 · p. 9
  • The hybrid scheme prepares a level-2 |H⟩ state fault-tolerantly with flags, then teleports it to level 3 for one MEK round, yielding logical error rate O(p^8).The hybrid scheme has lower overhead than full MEK, but higher overhead than flag-based error detection.Source: §5 · pp. 7, 10, Figure 11 · p. 9
  • The MEK circuit reuses the |H⟩ ancilla rather than parallelizing gates to reduce overhead; measuring H1H2 requires four CH gates.Source: Figure 8 · p. 8
  • The flag-based preparation scheme has substantially smaller qubit and gate overhead than MEK, while hybrid MEK costs less than full MEK but more than flag-based error detection.The comparison covers flag preparation (Fig. 9), full MEK (Fig. 10), and the hybrid scheme (Fig. 11).Source: §5 · pp. 7, 10, Figure 9 · p. 8, Figure 10 · p. 9
  • 4 × 10^-5 to 6 × 10^-5 physical error rates require four concatenation levels for MEK but only three for flag-based error detection to reach pL ≤ 10^-9, yielding several orders of magnitude fewer qubits.The flag-based scheme requires four levels only above 6 × 10^-5; MEK requires four above 4 × 10^-5.Source: Figure 9 · p. 8, Figure 10 · p. 9, §5 · p. 10

6 Conclusion

The paper proposes flag-based magic-state preparation that reduces qubit and operation costs, with overhead savings of orders of magnitude in some error regimes. Its appendices define fault-tolerant preparation criteria and explain how flag outcomes help distinguish and correct errors in the error-correction circuit.

6 Conclusion

  • The flag-based scheme reduces qubit and operation costs by orders of magnitude in some error regimes; its 10-qubit level-1 error-detection circuit accepts around 80% of the time and reaches logical error near 10^-4 at physical error near 3 × 10^-3.Source: §6 · p. 10
  • The scheme relies on transversal Hadamard and a flag circuit, with concatenated Steane codes setting the threshold; realistic connectivity and higher-distance non-concatenated codes remain for future study.Source: §6 · p. 10
  • For distance-three and distance-five color codes, fault-tolerant circuits can produce encoded magic states with logical failure rates O(p^2) and O(p^3), followed by possible lattice-surgery distillation.Source: §6 · p. 10
  • At high physical error rates, magic state distillation might outperform the flag-based scheme when topological codes require many concatenation levels; the flag ideas may also extend to other codes.Source: §6 · p. 10

A Proof of fault-tolerance for the magic state preparation schemes

  • For a distance-d code, t = ⌊(d−1)/2⌋ faults must leave at most t errors and ideal decoding must reproduce the fault-free prepared state.For CSS codes, the criteria apply independently to X and Z errors.Source: A Proof of fault-tolerance for the… · p. 14

A.1 Error correction circuit

  • In the Steane-code error-correction circuit, flag outcomes identify certain single-fault weight-two errors so repeated syndrome measurements can distinguish and correct them.The first-half examples include Z4Z6, Z3Z7, and X3X7.Source: §A.1 · p. 14

A.2 Fault-tolerance proof for the error detection scheme

The proof shows that the three-part error-detection scheme satisfies both fault-tolerance criteria when at most one fault occurs. Accepted states are therefore correct after fault-free error correction.

A.2 Fault-tolerance proof for the error detection scheme

  • The proof analyzes faults in the encoded |H⟩ preparation and the logical-Hadamard measurement, rejecting detected errors and showing accepted states remain correctable.For the first component, the accepted state after a single fault is |H⟩.Source: §A.2 · pp. 14–15
  • A fault in the first component can yield an accepted |H⟩ state with probability 1/2.The accepted branch is the state |H⟩.Source: §A.2 · p. 15
  • A fault in the error-correction circuit that goes undetected leaves only a correctable data error in an accepted state.Errors of weight greater than one trigger a flag; accepted states are corrected to |H⟩ by fault-free error correction.Source: §A.2 · p. 15
  • With at most one fault, fault-free error correction of any accepted state returns |H⟩, satisfying both criteria in Definition 1.The proof considers faults in each of the three components of the scheme.Source: §A.2 · pp. 14–15

A.3.1 Error distinguishability

Logical-Hadamard measurement faults can propagate into data errors that are not distinguishable under any gate ordering. The proposed ordering and extra flags isolate the problematic fourth-gate fault.

A.3.1 Error distinguishability

  • Flag outcomes and a full six-bit syndrome support error correction; when flags occur, correction uses the full syndrome rather than separate CSS syndromes.The method applies Hadamard corrections for specified combinations of flag outcomes and uses a lookup table for flagged errors.Source: §A.3.1 · pp. 15–16
  • Two extra flag qubits isolate faults at the fourth controlled-Hadamard gate, allowing the chosen ordering to distinguish single-fault errors elsewhere.The ordering was found by a numerical search; no ordering distinguished all single-fault errors when the fourth-gate fault was included.Source: §A.3.1 · p. 16
  • No permutation allowed every possible error arising from a single fault to be distinguished; excluding faults at the fourth controlled-Hadamard location, the Fig. 6a ordering distinguished single-fault errors.Source: §A.3.1 · p. 16

A.3.2 Fault-tolerance proof

The proof establishes that the logical-Hadamard measurement and error-correction sequence meets the fault-tolerance criteria for a single fault. The paper also describes teleporting a physical state into an encoded block and simulating that protocol to bound its failure probability.

A.3.2 Fault-tolerance proof

  • Across the analyzed single-fault cases, the measurement outcomes and any needed logical correction yield |H⟩ or leave only a correctable error.When the third measurement circuit flags, an extra error-correction round is performed.Source: §A.3.2 · pp. 16–17
  • Three logical-Hadamard measurements distinguish cases that two measurements cannot, and the final logical correction depends on the three outcomes.Table 2 maps measurement outcomes to corrections; its rows three and five illustrate why three measurements are required.Source: Table 2 · p. 17, §A.3.2 · p. 17
  • For a fault in the second error-correction circuit, the output may retain a correctable error, yet both fault-tolerance criteria remain satisfied.The proof also treats faults in the third Hadamard-measurement circuit, with an extra error-correction round if a flag occurs.Source: §A.3.2 · p. 18

B Teleporting into code blocks

  • Teleportation prepares an encoded |ψ⟩ from a physical |ψ⟩ by preparing a logical Bell state, decoding one block, measuring, and applying a logical Pauli.The paper directly simulates the teleportation circuit to obtain smaller constant prefactors than the cited bounds.Source: B Teleporting into code blocks · p. 18
  • The teleportation failure bound assumes stochastic noise and level-k encoded gates with failure probability at most p(k).The bound also includes faults in the physical part and a bound on decoding-circuit failure.Source: B Teleporting into code blocks · p. 18

C.1 Qubit overhead analysis

The qubit-overhead analysis estimates the average resources needed to prepare encoded |H⟩ states across concatenation levels. It accounts for verification acceptance, encoded-state preparation, and reusable resource states in the logical-Hadamard circuit.

C.1 Qubit overhead analysis

  • At the first concatenation level, the error-correction circuit is the largest component and requires 10 qubits.The physical error rate is denoted p in the depolarizing noise model.Source: §C.1 · p. 18
  • At higher concatenation levels, encoded |0⟩ and |+⟩ preparation uses fault-tolerant stabilizer measurements, with possible repeated measurements depending on outcomes and flags.The Steane-code stabilizer-measurement circuit is identified as fault-tolerant in [21].Source: §C.1 · pp. 18–19, Figure 14 · p. 19
  • The level-l logical-Hadamard circuit uses at most two level-(l−1) resource states per time step, with one needed at its first and last steps.A further resource state is required for the circuit in Fig. 4; the resource states used for T and T† can be reused across parallel implementations.Source: §C.1 · p. 19, Figure 15 · p. 19
  • The analysis numerically selects verification-acceptance probabilities to minimize total average qubit overhead at the second and third concatenation levels.Table 3 lists the selected probabilities; the search varies them over a specified range in increments of 10−2.Source: §C.1 · p. 19, Table 3 · p. 20
  • The average level-l qubit overhead depends on the numbers of level-(l−1) resource states prepared and their verification acceptance probabilities.The analysis defines probabilities for at least one or at least two resource states passing verification, according to the circuit's needs.Source: §C.1 · pp. 18–20

C.2 Gate overhead analysis

The gate-overhead analysis counts the preparation and error-correction circuits recursively, accounting for repeated syndrome measurements and shared error-correction units. It also outlines the corresponding overhead analysis for MEK.

C.2 Gate overhead analysis

  • Monte Carlo estimates track repeated EC1 and EC2 circuits and non-flagged stabilizer measurements when counting gate overhead.The reported averages use 10^6 trials.Source: §C.2 · pp. 20, 22
  • At concatenation levels l ≥2, gate-overhead recursion treats Clifford gates as extended rectangles and avoids double-counting error-correction units shared by consecutive gates.Figure 17 illustrates overlapping EC units between two logical CNOT gates and an idle location.Source: §C.2 · p. 22, Figure 17 · p. 22
  • The analysis computes T and T† overhead recursively and distinguishes error-detection EC overhead from error-correction EC overhead.The distinction matters because higher-level Clifford gates use extended rectangles with error-correction EC units.Source: §C.2 · pp. 20, 22

D Overhead analysis for the MEK scheme

D.1 Qubit overhead analysis

The overhead analysis accounts for teleportation, MEK circuit resources, and state-preparation and distillation simulations. It specifies how comparisons normalize MEK outputs and reports a level-3 state-preparation error relationship.

D.1 Qubit overhead analysis

  • Level-2 teleportation prepares |0⟩ and |+⟩ states using 112 qubits each, while the MEK round also uses two |+⟩ states, one |0⟩ state, and two extra |H⟩ states for CH gates.The analysis assumes teleportation qubits can be reused for later logical gates and ECs; an EC requires 10 qubits.Source: §D.1 · p. 23
  • MEK qubit overhead is divided by two for comparison because each circuit produces two distilled |H⟩ states; architecture-dependent qubit-reuse optimizations are omitted.Source: §D.1 · p. 23

D.2 Gate overhead analysis

  • A level-2 MEK circuit has 48 logical gates and 177 ECs, and its gate overhead is divided by two when compared with preparing one |H⟩ state.The circuit also prepares two level-2 |+⟩ states and one level-2 |0⟩ state.Source: §D.2 · p. 24

E State vector simulations

  • Qiskit state-vector simulations track errors through non-Clifford gates, using between 10^6 and 10^8 Monte Carlo samples per physical error rate.Each sample draws errors at fault locations, and an ideal decoder produces one or two output qubits for preparation or distillation.Source: E State vector simulations · p. 24
  • The level-3 state-preparation error polynomials are similar because level-2 state errors contribute much less than Clifford-operation errors.Table 4 expressions are approximations, and the level-3 expressions are valid for p ≤ 4 × 10^-4.Source: Table 4 · p. 26
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