Source-linked AI summary
Deep Positron: A Deep Neural Network Using the Posit Number System
Zachariah Carmichael, Hamed F. Langroudi, Char Khazanov, Jeffrey Lillie, John L. Gustafson, Dhireesha Kudithipudi
TL;DR
DNNs demand substantial computational and memory resources, and evidence remains limited on realizing low-precision operations for both training and inference. The paper proposes a posit-based DNN architecture with precision-adaptable EMACs for comparing numerical formats. Its preliminary results report better performance for 8-bit posit than 8-bit fixed or floating point, with accuracy comparable to 32-bit floating point.
Problem
Evidence on realizing low-precision operations for both DNN training and inference remains limited, while prior comparisons across differing bit widths do not fairly assess system efficiency.
Source: §I · p. 1Method
Deep Positron embeds exact multiply-and-accumulate units in a DNN and compares posit, fixed-point, and floating-point formats at ultra-low precision.
Source: §I · p. 2Results
8-bit posit achieves better performance than 8-bit fixed- or floating-point and similar accuracy to 32-bit floating point on low-dimensional datasets.
Source: §I · p. 2Takeaways & Limitations
The authors conclude that posit is well suited to DNNs at 8 bits or below and that precision-adaptable EMAC designs are efficient for inference.
Source: §VI · p. 6
Abstract
from arXiv · showhide
The recent surge of interest in Deep Neural Networks (DNNs) has led to increasingly complex networks that tax computational and memory resources. Many DNNs presently use 16-bit or 32-bit floating point operations. Significant performance and power gains can be obtained when DNN accelerators support low-precision numerical formats. Despite considerable research, there is still a knowledge gap on how low-precision operations can be realized for both DNN training and inference. In this work, we propose a DNN architecture, Deep Positron, with posit numerical format operating successfully at $\leq$8 bits for inference. We propose a precision-adaptable FPGA soft core for exact multiply-and-accumulate for uniform comparison across three numerical formats, fixed, floating-point and posit. Preliminary results demonstrate that 8-bit posit has better accuracy than 8-bit fixed or floating-point for three different low-dimensional datasets. Moreover, the accuracy is comparable to 32-bit floating-point on a Xilinx Virtex-7 FPGA device. The trade-offs between DNN performance and hardware resources, i.e. latency, power, and resource utilization, show that posit outperforms in accuracy and latency at 8-bit and below.
I. INTRODUCTION
The paper targets low-precision DNN inference, where prior comparisons across different bit widths do not provide a fair view of system efficiency. It proposes posit-based EMACs and the Deep Positron architecture, with preliminary results favoring 8-bit posit over 8-bit fixed and floating point.
I. INTRODUCTION
- Low-precision quantization can require retraining or substantially more hyperparameters, while earlier comparisons across different bit widths do not fairly assess system efficiency.The paper motivates comparing low-precision numerical formats directly for DNN training and inference.Source: §I · p. 1
- The proposed exact multiply-and-accumulate algorithm targets DNNs at 8 bits or below and compares posit, fixed-point, and floating-point formats at sub-8-bit precision.Source: §I · p. 2
- Deep Positron embeds EMACs in a DNN architecture, and the paper studies hardware resource use and energy-delay product.Source: §I · p. 2
- 8-bit posit achieves better performance than 8-bit fixed- or floating-point and similar accuracy to 32-bit floating point on low-dimensional datasets.The experiments cover multiple low-dimensional datasets.Source: §I · p. 2
II. BACKGROUND
The background describes DNNs as layered predictive models whose weights are updated through backpropagation. It motivates alternatives to conventional floating point by contrasting its broad range with fixed-point quantization error.
A. Deep Neural Networks
- A DNN consists of layers of neurons that compute weighted sums and activations; backpropagation updates weights to minimize prediction cost.Source: A. Deep Neural Networks · p. 2
- 32-bit floating point spans over 80 orders of magnitude, far beyond what the paper says DNNs need, reducing information per bit.Source: A. Deep Neural Networks · p. 2
- Fixed-point representations of DNN weights encounter quantization error, while the paper presents posit arithmetic as a potential fit for DNN training and inference.Source: A. Deep Neural Networks · p. 2
B. Posit Number System
Posits are fixed-size numbers designed to address shortcomings of IEEE-754 floating point. Their regime field has dynamic width, while the format is parameterized by total bit count n and exponent-bit count es.
B. Posit Number System
- A posit uses n total bits and es exponent bits, with a dynamic-width regime field that encodes a signed value using run length.Its representation also includes an exponent, if present, and fraction bits.Source: B. Posit Number System · p. 2
- The format reserves 10...0 for Not a Real, including infinity and exception cases, and 00...0 for zero.Source: B. Posit Number System · p. 2
- For positive posits, numerical value is specified by the decoding rule; negative values are decoded after taking the two’s complement.The rule’s k, e, and f denote regime value, unsigned exponent when es > 0, and remaining bits, respectively.Source: B. Posit Number System · p. 2
III. METHODOLOGY
The methodology uses exact multiply-and-accumulate (EMAC) units to limit local numerical error, particularly for low-precision data. A wide fixed-point accumulator delays rounding until after summation.
III. METHODOLOGY
- EMAC delays rounding or truncation until all products have been accumulated, minimizing local error in low-precision computation.A neuron performs a weighted sum of its inputs, corresponding to a MAC operation.Source: A. Exact Multiply-and-Accumulate (EMAC) · pp. 2–3
- The EMAC converts each number format to fixed-point for accumulation and uses a variant of the Kulisch accumulator.A wide register accumulates shifted fixed-point values and delays rounding until after summation.Source: A. Exact Multiply-and-Accumulate (EMAC) · p. 3
- A D flip-flop separates multiplication and accumulation for pipelining, and can be initialized with the fixed-point bias representation.Floating-point and posit formats use round to nearest, round half to even after accumulation.Source: A. Exact Multiply-and-Accumulate (EMAC) · p. 3
B. Fixed-point EMAC
The fixed-point and floating-point EMACs preserve product precision by accumulating in registers before producing an n-bit output. Their input representations and conversion paths differ.
B. Fixed-point EMAC
- The fixed-point EMAC preserves each product as 2n bits, accumulates k products over k clock cycles, then shifts and truncates the sum to n bits.It clips at maximum magnitude when applicable.Source: Figure 3 · p. 3, B. Fixed-point EMAC · p. 3
C. Floating Point EMAC
- The floating-point EMAC converts products to fixed-point before accumulation, positioning signed mantissas in the register according to product exponents.Inputs have one sign bit, we exponent bits, and wf fraction bits; subnormal inputs receive adjusted hidden bits and exponents.Source: Figure 4 · p. 3, C. Floating Point EMAC · p. 3
- The floating-point EMAC handles subnormal outputs by setting the exponent to 0 and clips the extracted accumulator value at maximum magnitude when applicable.Source: C. Floating Point EMAC · p. 3
D. Posit EMAC
The posit EMAC decodes posit inputs, multiplies their components, converts products to fixed-point, and accumulates them in a quire. It then extracts and encodes the result using scale-factor adjustment and convergent rounding.
D. Posit EMAC
- The posit EMAC decodes each input into sign, regime, exponent, and fraction, then multiplies and converts products to fixed-point for accumulation in a quire.The dynamic-width regime makes decoding nontrivial; two’s-complement inversion lets the regime begin with 0, avoiding separate leading-ones and leading-zeros detectors.Source: D. Posit EMAC · p. 4
- qsize = 2es+2 × (n −2) + 2 + ⌈log2(k)⌉ gives the quire width for n ≥3.Source: D. Posit EMAC · p. 4
- The scale factor is biased before fixed-point conversion to avoid multiple shifters, then unbiased after accumulation before rounding and encoding.Source: D. Posit EMAC · p. 4
- The posit EMAC extracts the result’s fraction and scale factor from the accumulated quire, then performs convergent rounding and encoding.Source: D. Posit EMAC · p. 4
E. Deep Positron
Deep Positron is a parameterized DNN architecture with dedicated EMAC units and local weight and bias memories. Its layers perform inference in a parallel streaming flow controlled by a finite-state machine.
E. Deep Positron
- Each layer has dedicated EMAC units and local memory blocks for weights and biases.The architecture is parameterized by data width, data type, and DNN hyperparameters.Source: E. Deep Positron · p. 4
- Local storage avoids off-chip memory accesses, while each layer begins after its preceding layer finishes an input.The compute flow performs inference in parallel streaming fashion.Source: E. Deep Positron · p. 5
- ReLU is used throughout the network except in the affine readout layer, and a finite-state machine controls data and activation flow.Source: E. Deep Positron · p. 5
A. EMAC Analysis and Comparison
The EMAC comparison shows a hardware trade-off: fixed-point has lower EDP, while posit and floating point provide higher dynamic range. Posit can operate at higher frequency than floating point at a given dynamic range, but generally uses more LUTs.
A. EMAC Analysis and Comparison
- Fixed-point EMACs outperform floating-point and posit EMACs in EDP across bit-widths, while both alternatives offer significantly higher dynamic range at the same bit-width.Fig. 7 plots EDP against n for the Virtex-7 implementations.Source: A. EMAC Analysis and Comparison · p. 5, Figure 7 · p. 5
- At a given dynamic range, posit EMACs can operate at a higher frequency than floating-point EMACs.Fixed-point EMACs achieve the lowest datapath latencies because they have no exponential parameter and use a narrower accumulator.Source: A. EMAC Analysis and Comparison · p. 5, Figure 6 · p. 5
- Posit generally consumes more LUT resources, attributed to more involved input and output decoding and encoding.Fig. 8 plots LUT utilization against numerical precision n.Source: A. EMAC Analysis and Comparison · p. 5, Figure 8 · p. 5
B. Deep Positron Performance
Across three low-dimensional datasets, posit performs uniformly well at 8-bit precision and matches or outperforms fixed-point and floating-point in the reported experiments. Its accuracy degradation is lower than the alternatives at a moderate EDP cost.
B. Deep Positron Performance
- Across three datasets, 8-bit posit performs uniformly well and either matches or outperforms fixed-point and floating-point in all experiments.Table II reports Deep Positron performance on low-dimensional datasets with 8-bit EMACs.Source: B. Deep Positron Performance · p. 5, Table II · p. 5
- At sub-8-bit widths, the best performance drops by [0-4.21]% compared with 32-bit floating-point, while posit matches 32-bit floating-point accuracy on Iris with 24 fewer bits.Source: B. Deep Positron Performance · p. 5
- Posit achieves better performance than floating-point and fixed-point at a moderate cost when comparing lowest accuracy degradation per bit-width against EDP.Fig. 9 presents this comparison; its numbers correspond to numerical-format bit-width.Source: B. Deep Positron Performance · p. 5, Figure 9 · p. 5
V. RELATED WORK
Prior work spans low-precision DNN inference and posit-based designs; this paper compares fixed-point, floating-point, and posit at the same bit-width using a parameterized FPGA soft core. The conclusion presents posit as suited to ultra-low-precision DNNs and reports robustness at 7- and 8-bit widths.
V. RELATED WORK
- Few prior studies compare different number systems at the same bit-width using FPGA soft processors; cited work includes 32-bit fixed-versus-floating-point comparisons and an 8-bit floating-point accelerator.The cited 32-bit comparison reports ∼12% lower energy and <1% accuracy loss with fixed-point; Brainwave's ms-fp8 reports 3× throughput over 8-bit fixed-point on Stratix-10.Source: §V · p. 6
- Prior posit-related DNN work includes 7-bit AlexNet results, posit arithmetic for autonomous driving, and log-float ELMA results for ResNet-50.The cited work reports <1% accuracy degradation for 7-bit AlexNet parameters and for ImageNet classification with ResNet-50; ELMA power reductions are also reported against integer and IEEE-754 operations.Source: §V · p. 6
- This study uses a precision-adaptable, parameterized FPGA soft core to compare fixed-point, floating-point, and posit at the same bit-width for low-dimensional DNN tasks.Source: §V · p. 6
VI. CONCLUSIONS
- The conclusion describes posit as well suited to DNNs at ≤8-bit precision and reports Deep Positron accuracy robustness at 7- and 8-bit widths.It also characterizes reconfigurable exact multiply-and-accumulate designs embedded in a DNN as efficient for inference.Source: §VI · p. 6