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Analog content addressable memories with memristors
Can Li, Catherine E. Graves, Xia Sheng, Darrin Miller, Martin Foltin, Giacomo Pedretti, John Paul Strachan
TL;DR
CAMs offer highly parallel matching but are limited by area, power, and density, while prior memristor designs largely use binary or ternary states. This paper proposes an analog CAM that stores ranges in programmable memristor conductance and accepts analog or digital searches. Experiments, simulations, and analysis report reduced area and power, supporting existing and new computing applications.
Problem
CAMs provide powerful parallel matching but suffer from large area, cost, and power consumption, while prior memristor-based designs largely retain binary or ternary storage and search.
Method
The paper develops an analog CAM that stores value ranges using tunable memristor conductance and compares them with analog or digital search inputs.
Results
The analog CAM reduces area and power while providing higher memory density as a direct replacement for digital CAMs.
Takeaways & Limitations
The design may extend CAM use to associative computing and other applications constrained by conventional CAM density and power requirements.
Takeaways & Limitations
The current implementation is limited to a 1-bit analog CAM cell, although 3-bit or 4-bit cells are described as feasible.
Abstract
from arXiv · showhide
A content-addressable-memory compares an input search word against all rows of stored words in an array in a highly parallel manner. While supplying a very powerful functionality for many applications in pattern matching and search, it suffers from large area, cost and power consumption, limiting its use. Past improvements have been realized by using memristors to replace the static-random-access-memory cell in conventional designs, but employ similar schemes based only on binary or ternary states for storage and search. We propose a new analog content-addressable-memory concept and circuit to overcome these limitations by utilizing the analog conductance tunability of memristors. Our analog content-addressable-memory stores data within the programmable conductance and can take as input either analog or digital search values. Experimental demonstrations, scaled simulations and analysis show that our analog content-addressable-memory can reduce area and power consumption, which enables the acceleration of existing applications, but also new computing application areas.
Introduction
Conventional CAMs provide highly parallel, low-latency matching but are limited by large power consumption and low memory density. The proposed analog CAM uses tunable memristor conductance to store ranges and match analog or digital inputs, targeting higher density and lower energy and area.
- CAMs compare search keys with stored patterns in parallel, supporting high-throughput, low-latency matching operations.
- Conventional CAM performance is constrained by large power consumption and low memory density, restricting use to high-cost niche applications.
- Memristor-based CAM designs reduce area and power, but generally encode only binary states and do not exploit stable intermediate conductance levels.
- The proposed analog CAM stores value ranges in tunable memristor conductance and compares analog inputs against those ranges to determine matches.
- Proof-of-concept experiments and simulations establish the analog CAM’s performance and scalability, while narrow discrete levels can provide a digital CAM replacement.
- Wide continuous intervals and analog input search enable new matching functionality and direct processing of analog sensor signals without analog-to-digital conversion.
Results
The proposed analog CAM uses tunable memristor conductances to search continuous ranges or discrete levels, while simulations and experiments demonstrate matching, stability, scalability, and lower resource use. The design also supports higher-density storage and applications beyond conventional digital CAMs.
- Circuit operation: The 6T2M analog CAM uses two memristor conductances to define lower and upper search bounds, producing a match only within the programmed range.The Data Line supplies the analog search value, while the Match Line reports the result.
- Analog storage and search: The cell supports both arbitrary analog voltage ranges and discrete levels, including at least 3-bit encoding in one cell.Simulations demonstrated eight narrower ranges for representing 3-bit discrete voltage levels.
- Simulation: The simulated cell matched VDL = 0.4 V but mismatched at 0.3 V and 0.5 V, confirming range-selective operation.A representative programmed range was 0.37 V < VDL < 0.42 V.
Methods
The study combines monolithically integrated memristors with CMOS analog CAM circuitry, using electrical characterization and circuit simulation to evaluate devices, cells, and arrays.
- Device fabrication: Memristors were fabricated on CMOS using a tantalum-oxide switching layer with platinum electrodes and passivation.The device stack included a 2 nm tantalum oxide switching layer and tantalum and platinum electrodes.
- Circuit simulation: Analog CAM cells and arrays were designed in Cadence Virtuoso and simulated with HP-SPICE using a TSMC 16 nm library.A custom script generated netlists for arrays with varied dimensions, conductances, and input voltages.
- Array evaluation: Simulations included extracted wire resistance and capacitance, with stimuli applied at the nodes farthest from match-line sensing to represent the worst case.The extracted layout parameters included wire resistances of 1.91 Ω, 2.27 Ω, and 0.85 Ω and intercell capacitances of 0.227 fF, 0.324 fF, and 0.454 fF.
- Electrical characterization: Electrical characterization used a Keysight B1500A semiconductor parameter analyzer and Cascade probe station at room temperature.A custom Python program using PyVISA controlled the equipment.
- Electrical characterization: Conductance was programmed with quasi-static DC sweeps, current-limited by a series transistor, then read with a small voltage.Search operations applied and sensed voltages through a semiconductor parameter analyzer.
Data availability
The data supporting the paper’s plots and other findings are available from the corresponding author upon reasonable request.
- Supporting data for the plots and other findings are available upon reasonable request to the corresponding author.
1 Supplementary Figures
The supplementary figures document programming, search timing, process-corner behavior, measurement setups, device stability, circuit variants, DAC operation, and decision-tree mapping.
- Programming and search: Supplementary figures show the memristor programming operation and search timing in an 86×12 analog CAM array.The match line is pulled down within 100 ps for a mismatch and remains high for a match.
- Process corners: Process-corner simulations evaluate match-line decay at 0.3 V, 0.4 V, and 0.5 V search voltages, representing mismatch, match, and mismatch cases.
- Measurement and stability: Additional figures describe the experimental measurement setup and stability tests under programming, search, and read voltages.The stability tests include voltage-dependent RESET behavior and read-operation stability.
- Device characterization: Supplementary measurements characterize match-line discharge current, analog conductance retention, and multilevel device stability.
- Circuit variants: Further figures present one-bit-mismatch operation, volatile and non-volatile memristor circuit variants, and threshold-switching transient responses.
- Applications and extensions: Supplementary designs cover CAM representations for 385 to 58630, an analog-input DAC, and mapping a decision tree onto analog CAM and memristor RAM.
2 Supplementary Tables
The supplementary tables document the analog CAM cell write operation and energy breakdown during searches in an 86×12 array.
- Supplementary Table 1 documents the write operation of the analog CAM cell.
- Supplementary Table 2 reports the energy breakdown during searches in an 86×12 array.
3 Supplementary Notes
The supplementary analysis describes analog CAM programming and search behavior, quantifies compactness and energy benefits, and identifies word-length and programming constraints. It also shows how transistor characteristics and memristor choice affect matching range and leakage.
- Programming and operation: The analog CAM programs memristor conductance through dedicated row and column signals before search, with readout performed by applying voltages across the source lines and activating the data line.The supplementary material describes set/reset programming, conductance verification, and the voltage signals required for these operations.
- Limitations: Iterative memristor programming may be slow and energy-intensive, but the proposed applications assume infrequent conductance updates; frequent-update uses require optimized peripheral circuitry.Nonvolatile devices avoid frequent reprogramming and standby power once programmed.
- Programming and operation: A matching row remains high only when every cell matches, because each cell’s pull-down path has low conductance for a match and high conductance for a mismatch.The resulting match-line state is sensed by an amplifier attached to the match line.
- Limitations: Longer words can reduce match–mismatch sensing margin because parallel pull-down conductances accumulate, limiting word length through the transistor ON/OFF conductance ratio.Other cells on the same match line can shift the search criterion, and the simulated search-range change is tens of mV.
- Area and energy: The array compresses a 21×16 TCAM function from 336 TCAM cells to 54 3-bit, 24 4-bit, or 6 8-bit analog cells, with a reported 37× transistor-count reduction and 18.8× area reduction.The analog cell uses six transistors compared with 16 in an SRAM-based cell, and the reported analog CAM area is 12.48 µm^2.
- Area and energy: 0.52 fJ per search per cell is estimated for the analog CAM, while the equivalent TCAM function uses 12.48 fJ per search in the 21×16 table versus 0.037 fJ per equivalent TCAM bit in a 6×4 analog array.Reduced cell count and wiring lower capacitance, and direct analog-signal handling can avoid digital-analog conversion.