Source-linked AI summary
Leveraging Secondary Storage to Simulate Deep 54-qubit Sycamore Circuits
Edwin Pednault, John A. Gunnels, Giacomo Nannicini, Lior Horesh, Robert Wisnieff
TL;DR
Classical simulation of large Sycamore circuits is constrained by quantum-state size and difficult entanglement patterns. The paper combines tensor partitioning, contraction deferral, tensor slicing, and secondary storage, estimating complete 20-cycle simulations in 2.55 days for 53 qubits and 5.80 days for 54 qubits on Summit. The estimates cover multiple depths, with execution time growing linearly while required disk space remains constant.
Problem
Simulating Sycamore circuits whose quantum states exceed available primary memory requires a practical way to use secondary storage despite its much lower speed.
Method
The method combines in-memory partitioning, contraction deferral, tensor slicing, and secondary storage, processing circuit slices across Summit.
Results
2.55 days for all 2^53 amplitudes of a 20-cycle 53-qubit circuit and 5.80 days for the corresponding 54-qubit circuit are estimated, with amplitudes stored on disk.
Takeaways & Limitations
Estimated execution time grows linearly with circuit depth, while disk occupation remains constant at 64 PiB for 53 qubits and 128 PiB for 54 qubits.
Takeaways & Limitations
The estimates assume the implementation and performance figures from prior work and rely on benchmark-based Summit communication and I/O assumptions.
Abstract
from arXiv · showhide
In a recent paper, we showed that secondary storage can extend the range of quantum circuits that can be practically simulated with classical algorithms. Here we refine those techniques and apply them to the simulation of Sycamore circuits with 53 and 54 qubits, with the entanglement pattern ABCDCDAB that has proven difficult to classically simulate with other approaches. Our analysis shows that on the Summit supercomputer at Oak Ridge National Laboratories, such circuits can be simulated with high fidelity to arbitrary depth in a matter of days, outputting all the amplitudes.
1 Introduction
The paper extends earlier work using secondary storage to simulate increasingly difficult quantum circuits, motivated by the need to verify superconducting quantum hardware. It applies this approach to Sycamore-circuit simulation and estimates its computational cost.
- Secondary storage can extend supercomputers’ computational reach for quantum-circuit simulation.
- Classical simulation is increasingly difficult as superconducting quantum hardware progresses.
- The paper applies the proposed secondary-storage approach to Sycamore circuits and estimates the resulting simulation time.
2 Brief overview of tensor contraction deferral
The simulation strategy partitions a quantum circuit into independently simulated subcircuits, then recombines them while accounting for entanglement. Contraction deferral and tensor slicing reduce memory pressure and organize data for secondary storage.
- The algorithm partitions circuits into subcircuits, simulates them independently, and recombines them to resolve entanglement.
- The tensor-network representation models tensors as nodes, shared indices as hyperedges, and shared-index summations as contractions.
- Contraction deferral contracts arbitrary tensor sets and uses outer products on non-shared indices, enabling subcircuit strategies with reduced memory requirements.
- Tensor slicing iterates over circuits with selected indices fixed, allowing only selected slices to remain in primary storage.
3 Sycamore circuits
The studied Sycamore circuits alternate single-qubit and two-qubit gate layers, with difficulty determined by the two-qubit-gate pattern after single-qubit gates are aggregated. The 53- and 54-qubit circuits use the ABCDCDAB pattern designed to challenge classical simulation.
- A cycle combines a single-qubit gate layer with a two-qubit gate layer applied across almost all qubits.
- Figure 2 depicts a 20-cycle, 54-qubit circuit as 40 illustrated layers after gate aggregation and layer partitioning.
- Single-qubit gates can be aggregated with neighboring two-qubit gates, leaving an equivalent circuit of potentially unique two-qubit gates.
- The ABCDCDAB two-qubit-gate pattern is used for the 53- and 54-qubit circuits and is intentionally difficult to simulate classically.
4 Proposed simulation strategy
The proposed strategy combines in-memory partitioning, contraction deferral, recursive tensor slicing, and secondary storage to simulate 53- and 54-qubit Sycamore circuits. Slices are repeatedly read, processed, and written back while partitioning is chosen to limit communication and disk access.
- The method applies an earlier secondary-storage scheme to 53- and 54-qubit Sycamore circuits on Summit.
- The strategy combines in-memory methods with secondary storage because quantum states can exceed aggregate primary memory.
- The first phase simulates subcircuits 1 and 2 with in-memory methods and contraction deferral, then writes subcircuit-3 slices to disk.
- Subsequent phases read each slice from disk, apply a subcircuit’s gates, and write the updated slice back to disk.
- The recursive partitioning of subcircuits 3–5 selects different qubit ranges for 53- and 54-qubit circuits to reduce all-to-all communication.
- Disk data are organized as 2^16 logical files for 53-qubit circuits and 2^18 logical files for 54-qubit circuits.
- The first-level partitioning uses 45-qubit disk slices for both circuit sizes and recursively slices additional qubits to distribute work across 4096 nodes.
5 Estimated running times
The paper estimates execution times for simulating 53- and 54-qubit Sycamore circuits on Summit using performance models for computation, communication, and disk I/O. The estimates indicate multi-day simulations with all amplitudes stored on disk, while required disk space remains within Summit’s capacity across the studied depths.
- Performance model: The performance model combines Cori II per-disk-slice costs with Summit scaling based on High Performance Linpack benchmark ratios.The model also accounts for communication and disk I/O costs associated with the simulation strategy.
- Performance check: Estimated gate-operation efficiencies are near or below 11% of Summit’s expected 191 PetaFLOPs/sec peak double-precision performance.The authors identify GPU execution and cuBLAS matrix-vector operations as possible avenues for improving these estimates.
- Runtime estimates: 2.55 days estimates simulating the 20-cycle, 53-qubit circuit and 5.80 days for the corresponding 54-qubit circuit, with all 2^53 amplitudes computed and stored on disk.The estimates use published performance figures and early IBM internal benchmarks.
- Storage requirements: 64 PiB of disk space is required for 53-qubit circuits and 128 PiB for 54-qubit circuits, both within Summit’s 250 PiB capacity.These storage requirements are stated for single-precision amplitude storage.
- Depth dependence: Estimated execution times grow linearly with circuit depth across the studied 10, 14, 20, 24, 28, 32, and 36-cycle circuits.The disk occupation remains constant because only a maximum number of slices is stored at any time.
A Implementation details
The implementation represents the simulation as a sequence of tensor, gate, slicing, communication, disk, and entanglement operations. Synthesized gate operations introduce entanglement indices, which are later eliminated through tensor contractions.
- Operation modes: The listing uses eight operation modes to describe tensors, gates, entanglement indices, slicing, all-to-all communication, disk writes, disk reads, and definitions.The mode column identifies the type of information contained in each listing line.
- Tensor and cache operations: Tensor entries specify local and global qubits, while cache entries partition gates into 5-qubit aggregate kernels.The tensor arguments list local qubits first and global qubits afterward.
- Communication and storage: All-to-all operations rearrange tensor indices or exchange which qubits are local and global, while write and read operations fix indices for disk transfer.These operations encode the data movement required by the storage-based simulation scheme.
- Entanglement operations: Synthesized EI and E2Q gate operations introduce entanglement indices, and the preceding contraction eliminates those indices.The new indices a′′ and b′′ correspond to qubits a and b, while a′ and a are entanglement indices introduced by the synthesized operations.