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A megapixel time-gated SPAD image sensor for 2D and 3D imaging applications
Kazuhiro Morimoto, Andrei Ardelean, Ming-Lo Wu, Arin Can Ulku, Ivan Michel Antolovic, Claudio Bruschini, Edoardo Charbon
TL;DR
Existing time-resolved single-photon cameras face a scaling trade-off between precise timing, pixel circuitry, and megapixel spatial resolution. This paper uses compact in-pixel time gating to build a 1Mpixel SPAD camera, achieving 3.8ns gating, 24kfps operation, and demonstrations of 2D/3D and overlapping multi-object imaging.
Problem
Time-resolved single-photon imaging has been limited by small prior arrays, while TDC-based SPAD arrays require large circuit area and high power for precise timing.
Method
The paper implements compact time-gated SPAD pixels using fewer than 8 transistors, dynamic memory, scanned gate windows, and megapixel parallel readout.
Results
The camera is a 1Mpixel SPAD sensor with 3.8ns minimum gating and 24kfps readout, supporting 2D/3D imaging and spatially overlapped multi-object detection.
Takeaways & Limitations
Compact time gating provides a scalable route to single-photon, readout-noise-free ToF multi-object detection in large arrays.
Takeaways & Limitations
Deconvolution can be degraded by photon-shot noise, ambient light, dark counts, afterpulsing, crosstalk, and timing jitter.
Abstract
from arXiv · showhide
We present the first 1Mpixel SPAD camera ever reported. The camera features 3.8ns time gating and 24kfps frame rate; it was fabricated in 180nm CIS technology. Two pixels have been designed with a pitch of 9.4$μ$m in 7T and 5.75T configurations, respectively, achieving a maximum fill factor of 13.4%. The maximum PDP is 27%, median DCR 2.0cps, variation in gating length 120ps, position skew 410ps, and rise/fall time <550ps, all FWHM at 3.3V of excess bias. The sensor was used to capture 2D/3D scenes over 2m with an LSB of 5.4mm and a precision better than 7.8mm. Extended dynamic range is demonstrated in dual exposure operation mode. Spatially overlapped multi-object detection is experimentally demonstrated in single-photon time-gated ToF for the first time.
1. INTRODUCTION
The paper addresses scalable single-photon imaging by combining SPAD timing resolution with megapixel spatial resolution. It motivates compact time-gating circuitry as an alternative to area- and power-intensive TDCs.
- Research motivation: Time-resolved single-photon sensors support applications including quantum vision, but prior implementations were often limited to single pixels or arrays of at most 1kpixel.Large-format SPAD cameras have addressed this limitation using on-chip time gating or TDCs.
- Research gap: QIS can reach 1 megapixel with 1.1µm pixels, but charge-transfer and sequential-readout timing limits remain above 1µs.The passage contrasts QIS spatial resolution and low-noise advantages with its limited timing resolution.
- Research gap: SPADs provide single-photon detection with timing resolution of up to few tens of picoseconds through fast avalanche multiplication.The paper presents SPAD timing as a complement to QIS spatial scaling.
- Research gap: TDC-based SPAD arrays are difficult to scale because their circuits require large area and high power dissipation.The paper therefore motivates a lower-complexity timing approach.
- Paper direction: The proposed time-gating approach uses less than 8 transistors per pixel to target picosecond timing and megapixel spatial resolution.The contribution is framed as a scalable photon-counting image-sensor architecture.
2. IN-PIXEL TIME GATING
The sensor gates SPAD avalanche signals into in-pixel memory or counting circuitry and scans the gate to infer photon arrival delays. The measured profile is modeled as the gating window convolved with the photon probability density, enabling multi-reflection analysis by deconvolution.
- In-pixel operation: A global gate switch selectively feeds the quenched SPAD output into an in-pixel memory or counter, allowing gate pulses as short as a few nanoseconds.The SPAD is connected to a quenching transistor to prevent self-sustained avalanche breakdown.
- ToF ranging: Time-gated ToF repeatedly sends laser pulses and shifts the gate window across consecutive photon-counting frames to derive a delay histogram.Finer gate scanning improves timing resolution but reduces depth measurement rate or range.
- Signal model: The detected intensity profile h(t) is modeled as the convolution of the gating window f(t) and photon probability density g(t).Integrating h(t) over time gives the total detected photon count in the measurement frame.
- Signal model: For a narrow single Gaussian photon distribution, the measured profile approximates a shifted gating window determined by photon count and delay time.The approximation treats the photon distribution as sufficiently narrow relative to the gate length.
- Multi-object ranging: Multiple reflected peaks produce a superposition of shifted gating windows, whose full profile can be recovered by deconvolution when h(t) and f(t) are known.The model covers reflections through semitransparent materials and spatially overlapping objects.
- Pixel architectures: Pixel A stores the gated voltage pulse in dynamic memory through a gating transistor and follower, while pixel B transfers it through a shared readout configuration.Pixel B includes feedback that prevents subsequent avalanches within a frame; pixel A incurs a 1VTH transfer loss.
3. ARCHITECTURE AND SIMULATION
The architecture implements two compact SPAD pixel variants in a 1Mpixel sensor with parallelized gate control and readout. The design reaches nanosecond-scale gating and high frame rate while supporting distinct pixel-array configurations.
- Pixel design: The designed SPAD pixels are presented as circuit schematics for pixel A and pixel B, accompanied by timing charts for their operation.The figure distinguishes the circuit implementations and their temporal control sequences.
- Sensor architecture: The sensor architecture combines a block diagram with a chip micrograph showing the pixel arrays and magnified array regions.These views connect the circuit-level pixel designs to the fabricated megapixel implementation.
- Sensor architecture: The chip uses two independent sections of 1024×500 pixels and dual binary-tree gate control with a minimum gate length of 3.8ns.Gate-length variation is 120ps FWHM, and each row is read out in 83ns.
- Readout: Parallel buses and bottom-of-chip registers transfer binary pixel data at 24kfps.Pixel A and pixel B use 1024-bit and 512-bit output registers, respectively, scanned in 128-bit words.
A. DCR and PDP
The measurements characterize dark count rate and photon detection probability for both pixel variants across bias, wavelength, and temperature-related conditions. Pixel B reaches higher PDP, while pixel A has lower median DCR at 3.3V excess bias.
- Measurement overview: The figures plot DCR distributions, bias dependence, wavelength-dependent PDP, and maximum PDP versus excess bias for both pixels.These measurements provide the operating-condition context for the reported DCR and PDP values.
- Photon detection probability: 10.5% and 26.7% are the maximum PDP values for pixel A and pixel B, respectively, at 520nm and 3.3V excess bias.PDP non-uniformity is better than 1.4% for pixel A and 3.2% for pixel B at room temperature.
B. Time-gating performance
The sensor combines uniform, fast time gating with 1Mpixel 2D imaging, extended dynamic range, and time-gated 3D ranging. Measurements demonstrate a 3.8ns gate, 24kfps intensity imaging, dual-exposure dynamic-range extension, and millimeter-scale depth sampling over a 2m range.
- Time-gating performance: 160 sampled pixels characterize the gate window, while full-array maps quantify gate-position and gate-length distributions plus rise and fall times.Fig. 5 reports these measurements across the 1024×500-pixel array.
- Time-gating performance: 410ps position skew and 120ps gate-length variation were measured at an average gate length of 3.8ns.These values are reported as FWHM measurements.
- 2D imaging: 1Mpixel monochrome images were captured at 24kfps, with 14-bit intensity images formed by summing 16,320 binary images.Magnified chart regions show line patterns resolved through number 10, indicating 1000-dot spatial resolution.
- Dynamic range extension: Dual exposure extends dynamic range from 96.3dB in single exposure to 108.1dB, although linearity correction amplifies photon-shot noise at higher incident counts.The dual-exposure noise increase occurs later than in single exposure mode.
- 3D imaging: Time-gated ToF uses a 3.8ns window shifted in 36ps steps, providing a 5.4mm distance LSB and measurements over a maximum 2m depth range.Measured distance agrees well with actual distance from 0.2 to 1.6m.
E. Multi-object 3D imaging
The sensor enables scalable, readout-noise-free single-photon time gating for detecting spatially overlapped reflective objects. Experiments reconstruct objects across separate distance ranges using rising-edge analysis of time-gated photon profiles.
- Motivation: Direct ToF can image spatially overlapped reflective objects individually, while prior implementations were limited by TDC area, power, or computational cost.Time-gated ToF is presented as a more scalable alternative using compact pixel circuitry and simpler computation.
- Experimental setup: A transparent plastic plate was inserted between the synchronized SPAD camera and spherical target to create multiple reflections.The setup used a 510nm pulsed laser operating at 40MHz with 130ps optical pulses and 2mW average power.
- Reconstruction: 3D images were reconstructed separately over 0.3-0.6m and 0.6-0.9m ranges, with black pixels indicating no detected reflection in the measured range.The central 700×500 pixels were cropped for reconstruction display.
- Reconstruction: Rising-edge positions were extracted by scanning a 60-point virtual gate window across each measured photon-count profile.The method determines whether a rising edge exists at each non-overlapping scan position for every pixel.
- Result: The experiment demonstrates spatially overlapped multi-object detection with a single-photon time-gating scheme.This capability is identified as experimentally demonstrated for the first time in the paper.
5. CONCLUSION
The conclusion positions the sensor as a megapixel-scale SPAD platform with a large array, small pixel pitch, low dark count rate, and application potential across several imaging domains. Its front-side illumination limits fill factor, although microlenses may improve it.
- State-of-the-art comparison: The sensor array is the largest in the comparison, almost 4 times higher than the state-of-the-art sensor, while retaining one of the smallest pixel pitches.The comparison concerns SPAD pixel pitch and array size.
- State-of-the-art comparison: Median DCR is the lowest among the compared works, attributed to the optimized process and miniaturized active size.The conclusion explicitly links the low DCR to these design and process choices.
- Limitations and outlook: The lower fill factor results from the front-side illuminated configuration, but microlenses can typically improve it by a factor of 2 to 10.The stated improvement is presented as a possible enhancement rather than a measured result for this sensor.
- Applications: The proposed sensor is identified as useful for industrial applications including security, automotive, robotic, biomedical, and scientific imaging.The stated scope also includes quantum imaging and ultra-high-speed imaging.
FUNDING
The supplementary material acknowledges partial funding from the Swiss National Science Foundation through Grant 166289.
- Funding: The research received partial funding from the Swiss National Science Foundation.The funding acknowledgment names Grant 166289.
- Funding: Swiss National Science Foundation Grant 166289 is identified in the funding acknowledgment.The grant number is stated explicitly.
- Funding: The acknowledgment specifies that the Swiss National Science Foundation supported the research in part.The passage does not describe the amount or allocation of support.
A megapixel time-gated SPAD image sensor for 2D and 3D imaging applications: supplementary material
The supplementary material accompanies the paper on a megapixel time-gated SPAD image sensor for 2D and 3D imaging applications. It identifies the authors and gives a posting date of 30 December 2019.
- Document information: The listed authors are Kazuhiro Morimoto, Andrei Ardelean, Ming-Lo Wu, Arin Can Ulku, Ivan Michel Antolovic, Claudio Bruschini, and Edoardo Charbon.The author list includes affiliations or markers only for some names in the supplied passage.
- Document information: The supplementary material was posted on 30 December 2019.The supplied metadata gives the posting date without additional publication information.
1. Supplementary Note S1: pixel circuit operation
The supplementary results describe SPAD pixel implementation, avalanche-region engineering, power behavior, temperature-dependent dark counts, and the projected constraint on further miniaturization.
- Pixel circuit operation: Pixel A uses a dynamic-memory circuit, while pixel B shares MPDO–MSEL readout transistors across a 2×2-pixel array.Both architectures convert avalanche pulses into stored voltage signals for readout.
- SPAD device structure: The p+-i-n SPAD uses a buried implant for field uniformity and a circular guard ring to suppress premature edge breakdown.All layers are standard in the 180nm CIS process used for the chip.
- SPAD device structure: 0.17% and 0.39% are the measured mean crosstalk values for pixel A and pixel B, respectively.The higher pixel-B crosstalk is attributed to its greater proximity to neighboring pixels.
- Power consumption: 0.021W is pixel B’s maximum VOP consumption, approximately 400 times below pixel A under strong illumination.Pixel B’s feedback loop closes the recharging path after the first detected photon, suppressing additional avalanche-induced current.
- Temperature dependence of DCR: 1.1eV is the activation energy extracted above 30 °C for both pixels, while approximately 80% of pixel-A pixels exhibit this value.The results indicate tunneling-dominated DCR at low temperature and diffusion-current-dominated DCR at high temperature.
- Perspectives on pixel pitch reduction: Transistor count and sizes remain the apparent bottleneck for further pixel miniaturization in this CMOS technology node.The authors identify more efficient pixel-area use, pixel sharing, and 3D integration as routes toward smaller pitches.