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t$|$ket$\rangle$ : A Retargetable Compiler for NISQ Devices

Seyon Sivarajah, Silas Dilkes, Alexander Cowtan, Will Simmons, Alec Edgington, Ross Duncan

arXiv:2003.10611v3quant-ph

TL;DR

Quantum algorithms are difficult to translate efficiently onto diverse, noisy NISQ hardware because connectivity, gate, depth, and error constraints vary by device. t|ket⟩ provides a retargetable, language-agnostic optimising compiler with architecture-aware transformations and routing. Across benchmarked restricted-connectivity architectures, t|ket⟩ generally outperforms competing compilers, although the system remains deliberately limited to the NISQ compilation scope.

  • Problem

    Quantum circuits must be adapted to device connectivity and operation constraints, while NISQ noise makes circuit size and fidelity important.

  • Method

    t|ket⟩ uses architecture-independent optimisation, architecture-dependent compilation, and qubit mapping and routing to generate kernels for varied NISQ devices.

  • Results

    Across restricted-connectivity architectures, t|ket⟩ generally ranked first, followed by Quilc, while Qiskit consistently introduced very high gate overhead.

  • Takeaways & Limitations

    t|ket⟩ can improve gate count, gate depth, and performance on realistic circuits and architectures, with differences potentially decisive for NISQ execution.

  • Takeaways & Limitations

    The NISQ-focused system provides no error correction and leaves kernel-to-control-signal translation to hardware implementors.

Abstract

from arXiv · show

We present t$|$ket$\rangle$, a quantum software development platform produced by Cambridge Quantum Computing Ltd. The heart of t$|$ket$\rangle$ is a language-agnostic optimising compiler designed to generate code for a variety of NISQ devices, which has several features designed to minimise the influence of device error. The compiler has been extensively benchmarked and outperforms most competitors in terms of circuit optimisation and qubit routing.

1. Introduction

Quantum algorithms must be compiled from abstract descriptions into machine-specific operations, but NISQ hardware diversity, limited depth, and noise make this translation difficult. t|ket⟩ addresses these challenges with an optimising compiler for multiple devices and runtime support for hybrid algorithms.

  • Quantum compilation translates a high-level algorithm into a machine-specific sequence of physical operations.
  • NISQ devices constrain algorithms through limited qubit counts, shallow executable depths, and hardware errors that accumulate during computation.The paper adopts a broad NISQ definition based on infeasible general-purpose error correction and expected hardware errors.
  • Hybrid algorithms such as VQE and QAOA repeatedly execute circuits inside classical optimisation loops, where device noise can reduce convergence rate and final accuracy.
  • t|ket⟩ is a flexible optimising compiler supporting multiple programming frameworks and quantum devices, with features intended to minimise device-error effects.
  • The system focuses on generating the indispensable quantum kernel while decoupling this process from higher-level architecture and low-level hardware-specific components.

2. System Overview

t|ket⟩ uses a retargetable, language-agnostic architecture built around an intermediate representation and configurable circuit transformations. Its NISQ-focused design produces executable kernels while omitting error correction and some lower-level compilation responsibilities.

  • t|ket⟩ combines a C++ optimising compiler with a Python interface and runtime for circuit definition, compilation, execution dispatch, and variational-loop management.
  • The architecture translates inputs from lightweight front-ends into a general intermediate representation based on hierarchical non-planar maps.
  • t|ket⟩ is retargetable and language agnostic, allowing code generation for many quantum devices from inputs supplied by major quantum software platforms.
  • The transformation engine applies user-configurable rewrites in architecture-independent and architecture-dependent phases before producing a target-device kernel.
  • The NISQ-focused system excludes error correction and leaves translation from kernels to hardware control signals to hardware implementors.

3. Front-ends and Back-ends

t|ket⟩ connects multiple quantum programming front-ends to hardware and simulator back-ends through a common compilation interface. Back-ends enforce platform constraints, dispatch kernels, and collect results.

  • Front-ends: Front-ends support OpenQASM, Quipper, Qiskit, Cirq, pyQuil, and other quantum software systems through source-file input or Python converters.
  • Front-ends and back-ends: Figure 5 illustrates reading a QASM circuit, appending operations through pytket, compiling for a back-end, and executing it.
  • Back-ends: Each back-end generates circuits respecting platform constraints, dispatches kernels for execution, and collates results.
  • Back-ends: t|ket⟩ provides a uniform interface across hardware and simulator back-ends so users can change targets without changing experiment code.

4. Representing Circuits

t|ket⟩ represents circuits as structured, compositional graphs that support diverse operations, hierarchical subcircuits, and symbolic parameterisation for NISQ workflows.

  • Circuit representation: The standard intermediate representation is a labelled directed acyclic graph whose vertices are operations and whose edges track computational resources.Port labels distinguish inputs such as control and target qubits, while paired ports trace resource paths through the circuit.
  • Circuit representation: Circuits support registers, ordered resource units, and sequential or parallel composition through explicit input and output boundaries.This structure applies to quantum resources and, with model-specific constraints, classical operations.
  • Boxes and operations: The operation model includes native one- and two-qubit gates, arbitrary quantum controls, classical control, and primitive classical logic, with unsupported gates later decomposed.Classical control can restrict rewrite optimisation.
  • Boxes and operations: Boxes encapsulate whole circuits or other representations, enabling hierarchical high-level subroutines while keeping parent circuits opaque during subroutine optimisation.Box contents are decomposed at kernel generation, and the paper notes future optimisation directly on boxes.
  • Parameterised circuits: Symbolic parameters allow a parameterised circuit to be compiled once and reused across variational iterations.Partial compilation precompiles unknown parameters, then applies simple rewriting after substitution before backend execution.

5. The t|ket⟩Transform System

The transform system composes verified circuit rewrites into configurable compilation flows, progressing from unconstrained optimisation toward hardware-valid circuits.

  • Backend constraints: Backend constraints include supported gates and, often, a qubit-connectivity graph requiring circuit rewriting during logical-to-physical mapping.Only circuits satisfying the resulting backend properties can execute on target hardware.
  • Transform composition: Transform passes rewrite circuits, and sequential composition creates larger passes for staged compilation.Typical flows optimise without hardware constraints before applying gate-set and connectivity-specific transformations.
  • Contracts and predicates: Each pass is specified by preconditions and postconditions expressed as predicates over circuit properties.This forms a Hoare triple that guarantees the postcondition when the precondition holds.
  • Contracts and predicates: Hoare triples can be composed into valid custom rewriting sequences when adjacent conditions do not conflict.The transform engine uses an expression language based on contract-style composition.
  • Contracts and predicates: Loop combinators can repeatedly apply rewrite sequences until no further rewrites are possible, but termination is not guaranteed.This is an explicit boundary of the transform-composition system.

6. Circuit Optimisation Methods

t|ket⟩ combines architecture-independent and architecture-aware circuit optimisation, targeting lower two-qubit cost and depth while preserving retargetability. Its macroscopic methods include Clifford simplification, decompositions, and Pauli-gadget rewriting, with the latter achieving depth reductions greater than 50%.

  • Optimisation framework: Circuit optimisation in t|ket⟩ uses composable passes across architecture-independent and architecture-aware stages, including procedures applied after routing.This design is intended to provide retargetability without sacrificing performance.
  • Optimisation objectives: Two-qubit gate count is the primary optimisation focus because multi-qubit operations are slower and less accurate than single-qubit rotations.CX-count denotes the number of maximally-entangling two-qubit gates, while omitting single-qubit gates improves device-independence.
  • Optimisation objectives: CX-depth provides a device-agnostic estimate of execution time because short coherence times make circuit fidelity strongly related to runtime.Circuit depth is the maximum gate depth, and CX-depth restricts that calculation to maximal two-qubit gates.
  • Local and macroscopic methods: Peephole passes replace local patterns with equivalent lower-cost or lower-depth subcircuits, while macroscopic analysis identifies larger structures for synthesis.The implementation includes redundant-gate elimination, commutation, Euler and KAK decompositions, and Clifford identities.
  • Local and macroscopic methods: Euler and KAK decompositions scan one- and two-qubit gate sequences and replace them when this reduces CX count or overall gate count.Symbolic circuits are supported for Euler-angle single-qubit reduction, but not for KAK decomposition with symbolic parameters.
  • Local and macroscopic methods: Macroscopic representations enable non-local optimisation before efficient synthesis back to primitive gates that reduces CX gates, improves parallelism, or enables further peephole rewrites.Future versions were intended to add phase polynomials, ZX-diagrams, Clifford tableaus, and linear-reversible functions.
  • Pauli gadgets: Pauli gadgets target multi-qubit subcircuits common in chemistry circuits, using commutation, merging, and Clifford-interaction rules.Recognising, optimising, and resynthesising these gadgets achieved depth reductions greater than 50% in electronic-structure circuits.

7. Mapping to Physical Qubits

t|ket⟩ maps logical circuits onto hardware connectivity using dynamic placement and routing, adding SWAPs or, for some CX gates, distributed implementations. Its heuristics target high-fidelity, low-overhead circuits, although minimizing SWAP overhead generally outperformed the tested fidelity heuristic.

  • Connectivity constraints: Hardware connectivity is represented by an undirected device graph, and routing maps every logical multi-qubit operation to connected physical qubits.The routing problem is finding a mapping of logical operations to allowed physical operations.
  • Placement and routing: t|ket⟩ uses a dynamic two-step strategy: initial logical-to-physical placement followed by SWAP insertion as the circuit executes.This contrasts with static approaches that partition circuits into slices and use SWAP networks between placements.
  • Initial placement: Initial placements maximize expected circuit fidelity using routing-overhead and device-error heuristics, with candidate placements selected through graph matching.Partial placements are allowed, and unmapped qubits can be placed near their next interactions during routing.
  • Routing procedure: Routing processes two-qubit interactions in time order, selecting device edges for SWAPs and sometimes considering distributed CX implementations for distance-two interactions.Candidate placements are compared across multiple circuit slices when distributed CX is considered.
  • Performance and limitation: At least as well as other software solutions in circuit size and depth, t|ket⟩ routing uses a high-performance heuristic and efficient C++ implementation.The routing problem is NP-complete in general, so the method is heuristic rather than globally optimal.
  • Performance and limitation: The fidelity heuristic often failed to identify when extra SWAPs would improve fidelity, so minimizing SWAP overhead generally produced better results.This limitation reflects heterogeneous noise across NISQ qubits and gates.

8. Applications

t|ket⟩ supports NISQ applications through chemistry software and ansatz-specific circuit optimization. Eumen connects quantum-chemistry inputs to hybrid algorithms, while t|ket⟩ reduces state-preparation depth for suitable structures.

  • Quantum chemistry: Eumen interfaces quantum-chemistry problems with hybrid classical–quantum algorithms for simulations on NISQ hardware.It accepts inputs including molecular or lattice geometry, charge, multiplicity restrictions, simulation type, ansatz, optimizations, and hardware backend.
  • Quantum chemistry: Eumen supports ground- and excited-state calculations using methods including VQE, imaginary-time evolution, quantum subspace expansion, and reduced density matrix approximation.These methods require measuring many-body expectation values or overlaps between states.
  • Circuit optimization: t|ket⟩’s ansatz-specific optimization significantly reduces state-preparation depth by recognizing circuit structures and reducing required gate counts.Pauli gadgets can be represented abstractly with boxes to aid construction and optimization.

9. Benchmarks

The benchmark section evaluates t|ket⟩ end to end and tests whether noise-aware placement benefits execution on a publicly available quantum device.

  • Benchmark design: The benchmarks compare end-to-end compiler performance with experiments on a publicly available quantum device to assess noise-aware placement.Full datasets and scripts are made available in the tket_benchmarking repository.

9.1. End-to-end compilation

End-to-end benchmarks compare t|ket⟩, Qiskit, and Quilc across four architectures using two-qubit gate count and depth. t|ket⟩ generally performs best on restricted-connectivity devices, while specialized optimization helps matching circuit families but can hurt mismatched ones.

  • Benchmark scope: End-to-end compilation translates OpenQASM into an equivalent optimized circuit satisfying device constraints and using the target gate set.The benchmark excludes high-level algorithm design and low-level pulse optimization.
  • Experimental comparisons: The evaluation compares t|ket⟩’s FullPass with Qiskit and Quilc, and compares its UCCSD-specific ChemPass against their default passes.ChemPass adds PauliSimp before the generic routine to target adjacent Pauli gadgets in UCCSD circuits.
  • Metrics: Two-qubit gate count and depth are the benchmark metrics because two-qubit gates have error rates an order of magnitude higher than single-qubit gates.For the IBM and Sycamore backends, CX and CZ are treated equivalently for these metrics because conversion requires only single-qubit Hadamards.
  • Results: In full-connectivity tests, generic optimization usually changes two-qubit counts little, but t|ket⟩ achieves larger reductions in more cases when gains are possible.This isolates optimization effects from routing.
  • Results: PauliSimp produces larger reductions on UCCSD circuits even after restricted-connectivity mapping, but can drastically reduce performance on dissimilar circuit classes.The specialized pass may make non-UCCSD circuits less amenable to routing.
  • Results: Across restricted-connectivity end-to-end results, performance generally ranks t|ket⟩ first, Quilc second, and Qiskit with consistently high gate overhead.The differences are dominated by routing performance and materially affect circuits viable for near-term execution.

9.2. Noise-aware placement

The paper evaluates graph placement and noise-aware graph placement on executed random circuits using Jensen–Shannon divergence from ideal measurement distributions. Graph placement generally lowers divergence, while noise-aware scoring yields further reductions, although results vary with circuit size and gate count.

  • Benchmark design: The benchmark uses random circuits with 4 or 8 qubits and 20, 40, 60, or 80 gates, excluding circuits without CX gates and overly deep 4-qubit circuits.Seven circuit sets with 90 samples each were retained.
  • Experimental setup: The experiments compare None, GP, and NAGP initial placements while holding routing and post-routing optimisation passes identical.Circuits were executed on the publicly available ibmq_16_melbourne device after translation to IBM’s native gate set.
  • Metric: Jensen–Shannon divergence is used instead of direct fidelity because fidelity measurement requires exponentially many circuit measurements.Unlike KL divergence, it is symmetric and finite, with 0 ≤ DJS(P, Q) ≤ 1 using base-2 logarithms.
  • Placement methods: Graph placement generally reduces mean Jensen–Shannon divergence compared with no initial placement.The authors attribute this to fewer error-prone two-qubit gates being added during mapping.
  • Placement methods: Noise-aware graph placement makes further significant reductions in Jensen–Shannon divergence by using device-reported error information.This result suggests that exploiting device heterogeneity is worthwhile for placement.
  • Results: 8-qubit circuits have higher divergence means, and divergence increases monotonically with gate count in the 8-qubit case.The peak at 40 gates for 4-qubit circuits is unexpected and requires further investigation.

10. Conclusions and Future Work

The paper concludes that t|ket⟩ improves gate count, gate depth, and device performance through compilation and qubit mapping, while outlining application-specific and noise-aware extensions. It reports especially large chemistry-depth reductions from PauliSimp and identifies realistic noise characterization as an open challenge.

  • Conclusions: t|ket⟩ significantly improves gate count and gate depth over comparable compilers on realistic circuits and quantum architectures.The conclusion presents these improvements as potentially decisive for NISQ computations.
  • Conclusions: t|ket⟩ uses component-level fidelity information to improve performance on devices with heterogeneous gate and qubit error rates.The conclusion connects this capability to overall device performance.
  • Application-specific optimisation: PauliSimp achieves large depth reductions on the chemistry benchmark set for all-to-all connectivity by exploiting recurring structures in UCCSD ansätze.The authors note that the method still has scope for improvement through architecture-aware synthesis of multi-qubit Pauli gadgets.
  • Future work: Application-specific “big gates” with their own equational theories may yield similar improvements for algorithms or ansätze such as QAOA.The paper states that these optimisations require real use cases and cannot be discovered from random circuits alone.
  • Future work: Near-term devices may require extremely shallow circuits because available qubit numbers can exceed what gate fidelity supports effectively.The paper suggests ancillary qubits and measurement-based quantum computation as one possible route to trading time for space.
  • Noise-aware compilation: A naive noise model in t|ket⟩’s placement algorithm produced a noticeable difference, but real-device noise channels are more complex and difficult to characterize.The authors therefore identify improved error analysis, suppression, and mitigation as continuing compilation priorities.
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