Source-linked AI summary

Brain-inspired global-local learning incorporated with neuromorphic computing

Yujie Wu, Rong Zhao, Jun Zhu, Feng Chen, Mingkun Xu, Guoqi Li, Sen Song, Lei Deng, Guanrui Wang, Hao Zheng, Jing Pei, Youhui Zhang, Mingguo Zhao, Luping Shi

arXiv:2006.03226v3cs.NEcs.AIq-bio.NC

TL;DR

Global and local learning have complementary characteristics, but integrating them effectively in spiking networks and neuromorphic applications remains an open challenge. The paper presents a hybrid model for synergic learning across multiple scenarios. It reports higher performance than single-learning models on sequential tasks.

  • Problem

    Existing spiking networks often rely on single global learning, while effective mechanisms for integrating global and local learning across complex scenarios remain lacking.

    Source: Main text · p. 3, §3 · p. 25
  • Method

    The paper reports a spike-based hybrid learning model that gives spiking neural networks synergic learning capability across multiple scenarios.

    Source: §3 · p. 23
  • Results

    The model achieves significantly higher performance than single-learning models on sequential tasks.

    Source: §3 · p. 23
  • Takeaways & Limitations

    The reported model offers spiking neural networks an efficient synergic learning capability for multiple learning scenarios.

    Source: §3 · p. 23

    The chip analysis uses a functional-level simulation that simplifies the model, constraining evidence about on-chip consumption and practical advantages.

    Source: §3 · p. 26

Abstract

from arXiv · show

Two main routes of learning methods exist at present including error-driven global learning and neuroscience-oriented local learning. Integrating them into one network may provide complementary learning capabilities for versatile learning scenarios. At the same time, neuromorphic computing holds great promise, but still needs plenty of useful algorithms and algorithm-hardware co-designs for exploiting the advantages. Here, we report a neuromorphic hybrid learning model by introducing a brain-inspired meta-learning paradigm and a differentiable spiking model incorporating neuronal dynamics and synaptic plasticity. It can meta-learn local plasticity and receive top-down supervision information for multiscale synergic learning. We demonstrate the advantages of this model in multiple different tasks, including few-shot learning, continual learning, and fault-tolerance learning in neuromorphic vision sensors. It achieves significantly higher performance than single-learning methods, and shows promise in empowering neuromorphic applications revolution. We further implemented the hybrid model in the Tianjic neuromorphic platform by exploiting algorithm-hardware co-designs and proved that the model can fully utilize neuromorphic many-core architecture to develop hybrid computation paradigm.

Main text

Global error-driven learning and local plasticity offer different strengths, but integrating them in spiking networks and neuromorphic hardware remains challenging. The paper introduces a spike-based hybrid plasticity model and examines it across several learning tasks and on Tianjic.

Main text

  • The paper frames hybrid learning as a way to combine the complementary strengths of global and local methods across varied tasks.It also motivates algorithm–hardware co-design as a route to develop hybrid learning on neuromorphic platforms.Source: Main text · p. 3
  • Global learning uses supervision errors, whereas local plasticity is driven by correlations between adjacent neurons; their distinct update behaviors complicate hybrid learning with spikes.The paper identifies discrete spike representations and diverse neuron dynamics as additional challenges.Source: Main text · p. 4
  • The model addresses a gap in neuromorphic learning: prior work had rarely considered practical on-chip learning, and effective integration across complex scenarios remained lacking.The identified scenarios include fault-tolerance and continual learning, alongside support for efficient hardware realization.Source: Main text · p. 5
  • The proposed spike-based hybrid plasticity model combines a brain-inspired meta-learning circuit with bi-level optimization.It incorporates neuronal dynamics and synaptic plasticity in a differentiable spiking model.Source: Main text · p. 5
  • With small modifications to local-plasticity modules, the hybrid model addresses few-shot, continual, and fault-tolerance learning tasks.The paper also evaluates an algorithm–hardware co-design on the Tianjic neuromorphic platform.Source: Main text · p. 5

1 Spike-based hybrid plasticity model

The hybrid plasticity model makes local weight updates learnable while retaining global supervision in a differentiable spiking network. It treats local-learning parameters and synaptic weights at distinct optimization levels and assigns the two learning modes different weight fractions and timescales.

1 Spike-based hybrid plasticity model

  • Local-plasticity hyperparameters, including learning rate and sliding threshold, become meta-parameters optimized at an upper level of a bi-level learning process.This decouples optimization of local-rule parameters from connection weights.Source: §1 · pp. 6–7
  • The local module can learn its learning rule and produce augmented signals from correlation-based input patterns to facilitate neuron computations.The framework treats local-plasticity parameters as meta-learning parameters and decouples their learning from weight learning.Source: §1 · pp. 7, 9
  • The model uses differentiable spiking dynamics derived from membrane-potential and ion-channel dynamics, with backpropagation through time for global learning.Surrogate functions approximate the derivative of the spiking firing function.Source: §1 · p. 7
  • Local weight updates are modeled as temporal functions of adjacent-neuron activity and meta-parameters, making their effects available to temporal credit assignment.The approach recasts local updates as a parametric function rather than relying on handcrafted rule parameters.Source: §1 · p. 7
  • The model gives synaptic weights separate global- and local-plasticity fractions, allowing the two learning modes to act on different fractions and timescales.Global supervision errors update one fraction; adjacent-neuron activity and local meta-parameters update the other.Source: §1 · pp. 8–9

2 Results

The results examine hybrid spiking learning that combines local and global learning across image classification, sequential tasks, fault tolerance, few-shot learning, and continual learning. They also assess its implementation on Tianjic and algorithm–hardware co-design, including coding schemes, on-chip learning, and efficiency challenges.

2.1 Comprehensive performance evaluation

  • The rank-order HP SNN achieves higher accuracy and lower average coding latency than other published models, while HP improves on a single GP SNN in sequential learning.Table 1 compares state-of-the-art spike-based results across image and sequential classification tasks.Source: Table 1 · p. 10, §2.1 · pp. 11–12
  • The model’s synaptic ion-channel dynamics connect spiking codes with event-driven inference, and parameterized LP modules automatically optimize local hyperparameters for synergic learning.The LP module consolidates strongly correlated pre- and postsynaptic weights through a learnable writing and decay mechanism that can help memorize repeated patterns.Source: §2.1 · pp. 12, 13, 15
  • HP SNNs support both rate and rank coding: longer rate windows improve accuracy, whereas rank coding offers lower inference latency with a slight accuracy loss.The rank-based model uses flexible, event-driven responses.Source: §2.1 · p. 12
  • On CIFAR10, HP SNNs decide most categories within four time windows but take longer on complex patterns, reducing average inference latency.The flexible decision process leverages neuromorphic hardware efficiency.Source: §2.1 · p. 12
  • HP significantly improves LP and fine-tuning accuracy, matches GP convergence on static MNIST and Fashion-MNIST, and converges faster with higher accuracy on Sequential MNIST.Fine-tuning alone has poor convergence and performs worse than the other models.Source: Figure 3 · p. 13, §2.1 · p. 14
  • LP modules help HP form more compact within-class representations and push classes farther apart, while coordinating LP and GP with stable convergence.The addition of LP modules is beneficial for longer learning time-scales.Source: §2.1 · p. 14

2.2.1 Improving fault-tolerance learning

  • The HP model shows stronger resistance to increasing cropping and noise on N-MNIST and MNIST, with its superiority becoming apparent as corruption increases.The experiments used incomplete test samples, including cropped and salt-and-pepper-noise-mixed data.Source: §2.2.1 · p. 16
  • The HP model reduces the pattern distance between incomplete and original inputs in hidden-layer activations, supporting reuse of associative features for fault tolerance.This analysis compared first-hidden-layer activations for incomplete and original MNIST data using Euclidean distance and cosine similarity.Source: §2.2.1 · p. 16

2.2.2 Learning with few samples

  • The model achieved 98.7% accuracy on five-way one-shot and 94.6% on twenty-way one-shot Omniglot tasks, comparable with state-of-the-art results and significantly higher than previous SNNs.Source: §2.2.2 · p. 17

2.2.3 Continual learning for multiple tasks

  • For continual learning, the method uses sparse GP-based connections for task-specific information and LP learning for common features, with finer-grained synaptic modulation than XdG.The authors propose this distributed hybrid scheme to reduce disruption to previous-task memory and expand the network’s capacity for multiple tasks.Source: §2.2.3 · p. 18
  • HP SNNs achieved the best reported results during fifty-task learning and obviously outperformed the sparse GP model.The comparison also included other works.Source: §2.2.3 · p. 20

2.3 Effectiveness analyses of hybrid learning model

  • LP learning implicitly lowers an energy surface to regularize network structure and strengthen weights associated with concurrent firing, while GP learning selectively activates neurons for input responses.The analysis frames these local and global learning operations as complementary components of the hybrid model.Source: §2.3 · pp. 20–21
  • For few-shot learning, clamping labels into LP establishes a correlation-based metric space with cosine embeddings that bring same-class samples closer and separate different classes.The LP module measures query similarity to centers of previously seen samples.Source: §2.3 · p. 21
  • LP and GP complement each other, and the hybrid model applies across different tasks with only minor local-module modifications.Local learning can reduce manually designed loss hyperparameters and enables online, low-power operation suited to many-core neuromorphic hardware.Source: §2.3 · p. 21

2.4 Hybrid computation on the Tianjic by algorithm-hardware co-design

  • On Tianjic, the HP model supports rate- and temporal-based coding, with energy consumption scaling very slowly as network size increases and speeds orders of magnitude faster than a general-purpose computer.The model can meet different on-chip inference requirements for accuracy and latency.Source: §2.4 · p. 22
  • Tianjic co-design flexibly maps LP and GP across connections, alleviating inter-core communication and supporting high-throughput on-chip LP, although GP dataflow cannot fully use pipelined processing.Only a small number of connections receive task-specific supervision signals.Source: §2.4 · pp. 22–23
  • Efficiently optimizing GP modules on neuromorphic chips remains an important direction for improving overall efficiency.Source: §2.4 · p. 23
  • Loihi, with embedded X86 cores on one chip, is identified as a potential candidate for future GP implementation.Source: §2.4 · p. 23
  • Algorithm–hardware co-design could improve hybrid on-chip efficiency by assigning LP learning to many-core structure and GP learning to embedded microprocessors, promoting model applications.The paper presents this division of work as a feasible direction for developing a hybrid computing paradigm.Source: §2.4 · p. 23

3 Discussion

The discussion presents a spike-based hybrid learning model that meta-learns local plasticity and combines it with global learning. The authors report gains across learning scenarios and describe implementation on the Tianjic neuromorphic platform.

3 Discussion

  • The model uses a brain-inspired meta-learning paradigm to learn spike-based local plasticity within a multiscale hybrid learning mechanism.Top-down supervision influences local-plasticity hyperparameters, which indirectly modify synaptic plasticity behavior.Source: §3 · pp. 23–24
  • The authors derive an implicit loss from local plasticity and describe LP modules as regularizing network topology and temporal dynamics, distinct from GP modules.Correlation-based modules also link the hybrid model to several existing learning models.Source: §3 · pp. 24–25
  • The discussion frames the approach as more flexible than prior hybrid methods by using bi-level optimization to decouple local-plasticity and global-plasticity learning.The paper also incorporates spiking dynamics and algorithm-hardware co-design.Source: §3 · p. 25
  • The hybrid model improves SNN performance in few-shot learning and outperforms single-learning models on sequential tasks, with advantages reported across multiple scenarios.The discussion also identifies continual learning and fault-tolerance learning among the evaluated scenarios.Source: §3 · pp. 23, 25
  • The model was implemented on Tianjic using a new cycle-accurate hardware simulator and mapping scheme, which the authors describe as the first such scheme on neuromorphic chips.They present the implementation as a basis for algorithm-hardware co-design and hybrid computing on neuromorphic architectures.Source: §3 · p. 26
  • The authors report excellent energy efficiency for hybrid computation on neuromorphic chips, while noting that functional-level simulation cannot accurately evaluate actual chip consumption.They implemented the model on Tianjic to address the practical-evaluation gap they describe.Source: §3 · p. 26

5.1 Model establishment

The hybrid plastic model combines global supervision with local, meta-learned plasticity in spiking networks. Its learning procedure alternates weight updates and meta-parameter updates across training and validation task batches.

5.1 Model establishment

  • The model combines membrane-potential dynamics with synaptic plasticity, allowing local weight changes to depend on presynaptic and postsynaptic activity.The local rule is generic, with a Hebbian variant used in the experiments.Source: §5.1 · pp. 30–31
  • A modified Euler method converts the continuous spiking and plasticity dynamics into iterative signal-propagation equations compatible with backpropagation.The model uses surrogate gradients for the non-differentiable spike function.Source: §5.1 · p. 31
  • Layer-wise meta-parameters control local plasticity, including the local learning rate and other rule-specific factors.The plasticity rule can also include a sliding threshold that controls weight-change direction and helps prevent weight explosions.Source: §5.1 · pp. 30–32
  • The classification framework accommodates different spike-coding schemes through a coding-dependent loss and timestep weights.The text specifies rate-based coding with z_tm = 1/T and q(x) = H(x − v_th).Source: §5.1 · p. 32
  • The model treats synaptic weights as lower-level variables and optimizes plasticity meta-parameters across task batches for fast adaptation.It approximates the optimal weights with one training-batch gradient update, then updates meta-parameters on validation tasks.Source: §5.1 · pp. 32–33

5.2 Support rank ordering coding

The model uses spike arrival timing to support temporal decoding related to rank-order coding. In this mode, the first output spike determines the predicted class.

5.2 Support rank ordering coding

  • The model introduces an evidence-accumulation temporal decoder based on a potential relationship between its dynamics and rank-order coding.The model’s temporal filtering makes spike arrival time relevant to information transfer.Source: §5.2 · p. 33
  • When an output neuron fires first, inference stops and its index determines the classification result.The scaled output-neuron membrane potential is used to calculate the loss.Source: §5.2 · p. 33
  • The model supports this temporal decoding alongside conventional rate-based decoding.The same formulation can also support event-driven inference.Source: §5.2 · p. 33

5.3 Details of effectiveness analyses

The effectiveness analysis frames hybrid learning as combining explicit classification supervision with implicit effects of network dynamics. It discusses how local plasticity may regularize representations and add feature-similarity bias.

5.3 Details of effectiveness analyses

  • The overall objective combines classification loss with an implicit loss attributed to the network’s internal dynamics.The analysis assumes the overall loss can be decomposed into these components, with factors weighting their influence.Source: §5.3 · p. 34

5.3.1 Approximate regularization

  • Local plasticity acts as approximate regularization, strengthening weights associated with concurrent firing and producing stronger stimulus for similar or repeated patterns; combined LP and GP modules support recognition of incomplete patterns.Source: §5.3.1 · p. 35
  • The local module can exploit correlations between an input and previously stored associative patterns to support classification of disturbance patterns.The analysis describes the local weight contribution as augmented information from stored patterns.Source: §5.3.1 · p. 35

5.3.2 Adding inductive biases of prior knowledge

  • The local module’s inductive bias uses previous feature centres to encourage similarity within classes and separation between classes in the metric space.This is presented as a way for the hybrid model to learn from query-to-centre feature similarity.Source: §5.3.2 · pp. 36–37

5.4 Task-related details

The task-related details describe the model configurations and protocols used to evaluate basic performance, fault tolerance, few-shot learning, and continual learning. The passages specify experimental setups rather than comparative outcome values.

5.4.1 Basic performance evaluation

  • Basic performance experiments trained CNNs on MNIST, Fashion-MNIST, DVS-Gesture, and CIFAR10, while sequential MNIST and CIFAR10 used original-image input in a row-by-row pixel manner.Source: §5.4.1 · p. 37

5.4.2 Fault tolerance learning

  • Fault-tolerance tests progressively increase image or neuromorphic-frame cropping and salt-and-pepper noise after pretraining on standard data.The experiments measure representation distance for cropping and vary noise level on MNIST, N-MNIST, and neuromorphic vision data.Source: §5.4.2 · pp. 37–38

5.4.3 Few-shot learning

  • Few-shot evaluation uses N-way S-shot episodes, with labelled support examples and an unlabelled query from the same classes.The network is trained for 3,000,000 episodes, and the best results over the final 1,000 episodes are reported.Source: §5.4.3 · p. 38

5.4.4 Continual learning

  • In shuffled-MNIST continual learning, global plasticity updates a fixed sparse set of supervised connections while local plasticity updates the others.After each task, weights are fixed and validation samples from learned tasks update the local-plasticity meta-parameters.Source: §5.4.4 · pp. 38–39

5.5 Details of Hardware implementation

The hardware implementation maps the hybrid model to Tianjic’s many-core platform and evaluates on-chip coding performance and simulated learning-mode costs. The reported results include lower latency and dynamic power with rank coding than rate coding, and faster execution than a general-purpose computer.

5.5 Details of Hardware implementation

  • Tianjic is a cross-paradigm platform supporting diverse neural coding schemes, computational models, and network structures, with 156 functional cores arranged in a 2D mesh.Each core contains neurons, axons, and synaptic connections; spikes can be routed among cores, and multiple chips can expand the routing network.Source: §5.5 · p. 39
  • On MNIST, 70 FCores implemented a fully connected [784-1024-1024-10] network, and the implementation’s energy consumption was tested with different coding schemes.The model was mapped across multiple FCores configured for different basic operations and transformations.Source: §5.5 · p. 39
  • Rank coding versus rate coding yielded 0.18us versus 0.27us average on-chip inference latency, 0.45 versus 0.63 compute ratios, and 0.38W versus 0.48W dynamic power consumption.The paper links rank coding’s shorter average decision time to reduced inference latency and compute ratio, thereby alleviating average dynamic power consumption.Source: §5.5 · pp. 39–40
  • Tianjic execution was much faster than a general-purpose computer, while energy consumption scaled only slightly with network size under its spike-driven, local-memory many-core architecture.The paper attributes these properties to the spike-driven paradigm and local-memory many-core architecture.Source: §5.5 · p. 40
  • Because no reported neuromorphic chip simultaneously supported on-chip LP and GP learning, the authors designed a Tianjic-based hybrid scheme and evaluated it with cycle-accurate hardware simulation.They used an extended Tianjic version with enhanced reconfigurability and functionality for continuous execution of multiple operations, and mapped dataflow into fine-grained operations and executable configurations for LP, GP, and HP modes.Source: §5.5 · p. 40
  • For different learning modes, simulation used an MLP [784-512-10] with T = 3; route cost accumulated transmitted data volume, while throughput was derived from summed phase execution times on all allocated FCores.Source: §5.5 · p. 40

6 Method References

The references include works on neuronal dynamics, computer vision, structured weight pruning, and bidirectional associative memories.

6 Method References

  • Gerstner et al. [66] authored a book on neuronal dynamics spanning single neurons, networks, and models of cognition.The listed publication is from Cambridge University Press, 2014.Source: §6 · p. 41
  • Lee et al. [67] are cited for a contribution in the Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition.The bibliography gives pages 10657–10665.Source: §6 · p. 41
  • The references also include StructADMM for structured DNN weight pruning [68] and bidirectional associative memories linking Hebbian learning to backpropagation [69].The listed StructADMM work is described as a systematic, high-efficiency framework.Source: §6 · p. 41

7 Supplementary information

The supplementary information documents Tianjic implementations and hardware-cost evaluation, provides performance and hyperparameter tables, and explores the HP model’s connection to rank-order coding under a single-spike assumption, including STDP-based meta-learning of local plasticity.

7.1 Extended Data Table 1: Performance on Tianjic chips

  • Supplementary Table 1 evaluates hybrid-model implementations across platforms using accuracy, compute ratio, power, energy, and latency measures.The supplied passages identify the table’s scope and metrics but provide no comparative values.Source: Table 1 · p. 42, §7.1 · p. 42

7.2 Extended Data Table 2: Parameter Configurations on different datasets

  • Supplementary Table 2 reports hyperparameter settings for different classification tasks.The supplied passage does not include the table’s parameter values.Source: Table 2 · p. 42

7.3 Supplementary Note 1: Design of three learning methods on Tianjic chips

  • The Tianjic scheme combines a configurable software toolchain and DST-UM mapping with spatially parallel, temporally serial execution; inference and local learning are pipelined, while GP and HP backward passes run serially.The toolchain includes network partitioning and resource placement, and a cycle-accurate simulator that accounts for chip-specific constraints.Source: §7.3 · pp. 43–44

7.4 Supplementary Note 2: Details of hardware evaluation methods

  • Hardware evaluation models each learning mode as sequential phases of operations on Axon-Dendrite, Soma, and Router units, then estimates route and throughput costs.The simulator records resource costs including memory consumption, communication volume, and clock cycles.Source: §7.4 · pp. 45–46

7.5 Supplementary Note 3: Linking the HP SNNs with rank order coding

  • The note introduces rank-order coding, which assumes biological neurons encode information through firing order, and relates it to the HP model.The supplied passages do not provide further details of that relationship.Source: §7.5 · p. 46
  • With at most one spike per neuron in a short time window, the HP model encodes information through rank-order coding, with its ranking factor equivalent to the model’s decay function.Source: §7.5 · p. 47

7.6 Supplementary Note 4: Meta-learning spike timing-dependent learning (STDP) rule

  • The HP model can meta-learn spike-based local plasticity by modifying the plasticity function with the proposed meta-learning method.Source: §7.6 · p. 47
  • For an STDP-based HP model, synaptic traces record pre- and post-synaptic spike histories, incrementing on spikes and decaying exponentially otherwise, while local Apre and Apost are meta-learned.Source: §7.6 · pp. 47–48
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