Machine learning of noise-resilient quantum circuits

I. INTRODUCTION

• NACL takes a computational task and device model capturing noise and constraints, then outputs a native circuit with greatest robustness to noise; applications include unitary compilation, state preparation, and observable extraction.Source: §I · p. 1
• Given a task and a device model of its noise and constraints, NACL outputs a native circuit designed for noise robustness.The tasks include unitary compilation, target-state preparation, and observable extraction.Source: §I · p. 1
• NACL uses fine-grained noise information to improve circuit reliability, extending beyond compilations based on generic gate-count, connectivity, or idle-time heuristics.The paper points to experimentally derived process matrices from gate-set tomography as a source of such information.Source: §I · pp. 1–2

A. Overview

• NACL optimizes over circuit depths and structures without requiring a starting circuit or ansatz, allowing task-oriented circuit discovery.The authors say this avoids bias toward solutions resembling a supplied template and balances expressivity against circuit noise.Source: §I · p. 2, A. Overview · p. 2

B. Parameterized circuit

• The parameterized circuit uses gates from the device’s native alphabet, with gate identities, continuous parameters, and circuit depth all included in the optimization.State-preparation and measurement operations are fixed and excluded from the learnable set.Source: B. Parameterized circuit · p. 3

C. Device model

• The device’s native gate alphabet specifies available operations and captures device constraints such as limited connectivity.Each noisy gate is represented as a quantum channel, yielding a noisy circuit channel.Source: C. Device model · p. 3
• NACL represents noisy gate operations with process matrices and state-preparation and measurement noise with quantum-classical channels.A fixed process matrix per gate restricts the treatment to Markovian noise, and crosstalk is mostly ignored.Source: C. Device model · p. 3

1. Parallelization

• NACL applies noise channels to the parallelized circuit, including noisy identity operations that can model effects such as thermal relaxation.The resulting parallelized noisy channel, rather than the channel for a simple gate sequence, is used for the circuit.Source: C. Device model · p. 3, §1 · p. 4
• With imperfect idle operations, NACL represents a circuit in space and time and seeks a parallelized arrangement that minimizes cost-function error.Gates are moved as early as possible without changing the implemented unitary, reducing qubit idling.Source: §1 · pp. 3–4
• The parallelization procedure assumes crosstalk is absent from the noise model; significant crosstalk could make maximal parallelization non-optimal.Modeling such crosstalk may require characterizing possible circuit layers.Source: §1 · p. 4

D. Cost functions

• NACL constructs cost functions for each application class described in the paper.These are the functions minimized by the method.Source: D. Cost functions · p. 4
• The cost functions are minimized by NACL to guide circuit optimization.The section covers the application classes outlined in Fig. 1.Source: D. Cost functions · p. 4
• The cost-function construction is organized by application class rather than presented as one shared objective.The passage states that functions are constructed for each class.Source: D. Cost functions · p. 4

1. Preliminaries

• Fidelity compares quantum states, and the section also defines average process fidelity using an integral over Haar measure.The latter quantity concerns a unitary process.Source: §1 · p. 4

2. Observable extraction

• Observable extraction learns a mapping from input quantum states to classical outputs, often local-observable expectation values, using labeled training examples.The output is the expectation value of interest for an input state.Source: §2 · p. 4
• Training data for observable extraction could scale exponentially with problem size because it must cover the possible input space.Source: §2 · p. 4
• The observable-extraction cost averages the discrepancy between desired training outputs and the circuit’s outputs.The cost is evaluated over the training data points.Source: §2 · p. 5

3. State Preparation

• For state preparation, NACL learns a unitary mapping training inputs to target outputs, with the cost averaging noisy-output infidelity across examples.A common case has one input-output pair.Source: §3 · p. 5
• Because the state-preparation data may satisfy N ≪ 2^n, the task is under-constrained for an n-qubit unitary.The cost function is defined for this setting, though its full expression is not available in the supplied passage.Source: §3 · p. 5

4. Compilation

• Compilation is more demanding than state preparation because it must reproduce the target unitary’s action on all possible input states.Source: §4 · p. 5
• The compilation cost uses average process fidelity, which can be evaluated through entanglement fidelity using a maximally entangled state, at the cost of a doubled space of dimension 2^(2n).Source: §4 · p. 5
• Alternatively, the Haar average can be approximated with sampled 2-design states or computed using Nielsen’s Pauli-operator formula, trading memory complexity for time complexity.The corresponding training data use the sampled states and their ideal outputs, or Pauli operators and their ideal-channel outputs.Source: §4 · p. 5

E. Machine learning algorithms

• NACL uses task-oriented programming: given minimal task and device information, it seeks a circuit that performs the specified task well.Source: E. Machine learning algorithms · p. 5
• Training examples represent the algorithm’s desired action, while the application-specific cost measures discrepancy and should be zero only for exact task reproduction.Training sets may grow exponentially with system size in many applications, although state preparation is an example that need not require exponentially large data.Source: E. Machine learning algorithms · pp. 5–6
• Regression learning minimizes the task cost over circuit depth, discrete layout choices, and continuous gate parameters, with noise incorporated by evaluating the cost in a noisy simulator.The simulator implements a device model that includes parallelization rules.Source: E. Machine learning algorithms · p. 6
• Optimization alternates between tuning continuous parameters for a fixed layout and proposing structural changes, accepting worse-cost changes with exponentially decreasing probability.Structural proposals include gate shuffling, removal, and identity-based insertion; iterations continue to convergence and restart to detect possible local minima.Source: E. Machine learning algorithms · p. 6
• Noise-aware structural updates let circuit length vary to a noise-dependent optimum, balancing deep, expressive circuits against shallow, less noisy ones.Source: E. Machine learning algorithms · p. 6

III. NOISE MODEL

• The device model combines one- and two-qubit GST process matrices with IBM Q Ourense-inspired connectivity and native-gate constraints.It models the pulse and idle operations, CNOT, and virtual Z(θ) rotations.Source: §III · pp. 6–7, Figure 3 · p. 7
• The model assumes gate processes inferred from qubit 0 and pair 0–1 apply device-wide, and it omits non-uniformity and spectator-qubit crosstalk.The authors state that one- and two-qubit GST alone cannot capture the device’s full behavior.Source: §III · pp. 6–7

IV. IMPLEMENTATION FOR OBSERVABLE EXTRACTION

• NACL’s learned circuit uses few idle steps and many virtual Z(θ) gates, features that emerge from optimization rather than being built into the algorithm.The paper notes that this liberal use of Z(θ) gates likely also contributes to a shorter-depth circuit.Source: §IV · p. 8
• The comparison evaluates textbook, noise-unaware ML, and NACL circuits under the modeled noise on 1,000 new pairs of random one-qubit mixed states.The textbook circuit is compiled to the device’s native gates; the noise-unaware learned circuit is also compiled, while NACL works directly with native gates.Source: §IV · pp. 7–8
• For over 90% of validation cases, both machine-learned circuits beat the textbook circuit, and NACL also beats noise-unaware ML in those cases.Figure 8(a) compares their errors across 1,000 validation pairs.Source: Figure 8 · p. 8, §IV · p. 8
• NACL’s error is lowest near exact overlap 0.5 and rises for smaller or larger overlaps, consistent with average-error training on examples concentrated around 0.4–0.5.The authors suggest that uniform-overlap training or worst-case or relative-error costs could change this uneven behavior.Source: §IV · p. 9

A. 4 qubit W-state preparation

• 0.8894 fidelity: NACL reduced W4 preparation error by a factor of 3 versus the best-known textbook circuit, whose fidelity was 0.671.The NACL circuit is shown in Fig. 10.Source: Figure 10 · p. 10, A. 4 qubit W-state preparation · p. 10
• The textbook W4 circuit was compiled onto qubits 1–4; the identity permutation gave the highest reported fidelity, with at least two CNOTs requiring further decomposition.The paper uses the general W-state construction from and defines G(p) to enable more efficient decomposition of its controlled gate.Source: A. 4 qubit W-state preparation · pp. 9–10, Figure 9 · p. 9
• NACL used a longer 13-gate sequence on qubit 1 rather than a shorter equivalent that would leave it idle, but five idle cycles on qubit 3 remained optimal.The authors relate the qubit-1 sequence to dynamically corrected gates and report that re-optimizing that subcircuit did not find a better sequence.Source: A. 4 qubit W-state preparation · p. 10

B. 5 qubit W-state preparation

• After checking all 120 qubit permutations for W5, the textbook compilation with permutation [1] achieved fidelity 0.675, with one CNOT requiring decomposition.The best compiled version is shown in Fig. 11(b).Source: B. 5 qubit W-state preparation · p. 10, Figure 11 · p. 11
• 0.837 fidelity: NACL reduced W5 preparation error by a factor of 2 versus the textbook circuit.The NACL circuit is shown in Fig. 12; it uses fewer CNOTs, less idling, and more error-free Z(θ) rotations.Source: B. 5 qubit W-state preparation · p. 10, Figure 12 · p. 11

VI. IMPLEMENTATION FOR CIRCUIT COMPILATION

• The NACL QFT circuit has shorter depth and zero idle gates, versus 18 in the compiled textbook circuit, and uses more error-free Z(θ) rotations.The textbook compilation requires further decomposition because qubits 1 and 3 are not directly connected.Source: §VI · p. 11, Figure 14 · p. 11, Figure 13 · p. 11
• 0.289 to 0.124 average infidelity: NACL reduced QFT error by 57% versus the textbook circuit and by a factor of 1.4 versus qsearch.Fig. 15 compares errors across 1000 randomly generated pure states.Source: Figure 15 · p. 12, §VI · p. 12

• For the examples considered, NACL reduces task-defined error rates by factors of 2 to 3 versus textbook circuits for the same tasks.The tasks include observable extraction, state preparation, and circuit compilation.Source: §VII · p. 12
• NACL formulates circuit implementation as optimization using a task cost function and a device model of connectivity and noise.The framework is demonstrated for observable extraction, state preparation, and circuit compilation.Source: §VII · p. 12
• NACL can derive dynamical decoupling when useful to the cost function and favors shorter circuits, fewer noisy idles, and ideal Z(θ) rotations.Its device models can use gate-set-tomography process matrices that capture coherent noise and non-unital processes such as relaxation.Source: §VII · p. 12
• With a trapped-ion-derived noise model, NACL produced results similar to those reported earlier, under an assumption of full connectivity realistic for small platforms.Source: §VII · p. 12
• Current compatible noise models exclude crosstalk; scalable crosstalk treatment would require layer-based optimization and more approximate noise characterization.The discussion notes that full layer characterization grows exponentially with qubit count and requires n-qubit process tomography.Source: §VII · p. 12
• As-is, NACL could optimize circuits of about 8–10 qubits; code optimization and parallelization could extend this to 12–14 qubits.Optimizing sampled subcircuits is proposed for larger applications, but combining them does not guarantee optimality.Source: §VII · p. 13
• Hardware-enabled NACL could avoid noise modeling, but some tasks require ideal target outputs that noisy hardware cannot provide exactly.Whether noisy hardware can approximate the required cost functions sufficiently remains open.Source: §VII · p. 13
• NACL typically returns task approximations because noisy implementations may not realize the ideal map and the nonlinear cost optimization has no global-minimum guarantee.The paper reports that its outputs are often superior to textbook-derived or other compilation-optimized circuits.Source: §VII · p. 13

Appendix A: Numerical values of rotation angles

• Table I lists the angles in radians defining Z(θ) gates in the circuits presented in the main text.Source: Table I · p. 16, Appendix A · p. 16

Appendix B: Noise model process matrices

• The five-qubit device model uses GST process-matrix estimates in the Pauli-transfer representation and SPAM operations in the standard representation.The appendix says only short linear-inversion GST circuits were used, each repeated 1024 times.Source: Appendix B · p. 16
• The appendix identifies imperfect POVM effects for |0⟩ and |1⟩ projections and a single-qubit imperfect state preparation.Source: Appendix B · p. 17
• Table II reports entanglement infidelity and diamond distance for gate operations, and state infidelity for SPAM operations.The appendix also introduces average gate infidelity as 1 − F̄.Source: Table II · p. 17, Appendix B · p. 17
• Diamond distance is characterized as a worst-case error rate, while average gate infidelity is quadratically more sensitive to stochastic than unitary error.Diamond distance is described as equally sensitive to both error classes.Source: Appendix B · p. 18

Appendix C: Noise model for a trapped-ion quantum computer

• The effective model is derived from error metrics for a near-term trapped-ion computer and uses X(θ), Y(θ), Z(θ), and XX(θ) as native gates.XX(θ) represents an arbitrary-angle Mølmer–Sørensen interaction.Source: Appendix C · p. 18
• The gate channels combine rotation-angle imprecision, depolarization, dephasing, and ion-heating effects.The appendix defines the ideal rotations and channel components used in these noisy-gate descriptions.Source: Appendix C · p. 18
• SPAM errors are modeled with depolarizing channels, and idle cycles with a depolarizing channel parameterized by p_idle.Source: Appendix C · p. 18
• The model assumes unrestricted two-qubit connectivity, which the paper says is realistic for small trapped-ion platforms.Source: Appendix C · p. 18

Appendix D: NACL training times

• NACL starts from a random circuit and optimizes a cost function over a non-convex landscape, making a single compilation-time or time-to-solution definition difficult.Optimization may stop before the global minimum, yet such imperfect compilations are still better than alternatives in many cases.Source: Appendix D · pp. 18–19
• Observable extraction beat the textbook circuit in 15 seconds, reached 98% of NACL’s best quality after 26 seconds, and took more than 20 hours to reach the global minimum.The reported compilation quality is 1 − COE for this task.Source: Figure 16 · p. 19, Appendix D · p. 19
• For 3-qubit QFT, NACL quickly surpassed the textbook solution, but took significantly longer to find the global optimum.The reported quality measure is average fidelity of the channel produced by the noisy circuit.Source: Appendix D · p. 19, Figure 16 · p. 19
• Table III reports, across the applications, time to beat the textbook algorithm and time to reach 98% of NACL’s best circuit.The data for the table and Fig. 16 were generated on a 16-core desktop computer.Source: Table III · p. 20, Appendix D · p. 20
• NACL surpassed the best textbook algorithm within 110 seconds for 4-qubit W-state preparation and 37 minutes for 5-qubit preparation.The authors attribute the higher cost of larger circuits to exponential scaling of quantum simulation.Source: Appendix D · pp. 19–20, Figure 16 · p. 19
• The authors prioritize compilation quality over compilation time and envision building libraries of commonly used routines for specific devices.The proposed trade-off is spending classical-computer time so algorithms using precompiled routines can outperform just-in-time compilations.Source: Appendix D · p. 20