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Building a fault-tolerant quantum computer using concatenated cat codes

Christopher Chamberland, Kyungjoo Noh, Patricio Arrangoiz-Arriola, Earl T. Campbell, Connor T. Hann, Joseph Iverson, Harald Putterman, Thomas C. Bohdanowicz, Steven T. Flammia, Andrew Keller, Gil Refael, John Preskill, Liang Jiang, Amir H. Safavi-Naeini, Oskar Painter, Fernando G. S. L. Brandão

arXiv:2012.04108v2quant-ph

TL;DR

The paper addresses how to realize scalable fault-tolerant quantum computation with biased-noise cat qubits while controlling hardware, coding, and resource overheads. It proposes a two-dimensional electro-acoustic architecture, analyzes its physical and logical errors, and develops Toffoli-state preparation and distillation protocols. The resulting estimates indicate that useful classically intractable circuits may require around 1,000 superconducting circuit components, while Hubbard-model simulation may require 18,000.

  • Problem

    Previous concatenated-cat proposals relied on increasing |α|^2 for bit-flip suppression and did not analyze CNOT bit flips or a fault-tolerant two-dimensional architecture.

  • Method

    The paper combines electro-acoustic cat-code hardware, shifted-Fock-basis gate analysis, circuit-level simulations with repetition and thin surface codes, and bottom-up and top-down Toffoli-state protocols.

  • Results

    Around 1,000 superconducting circuit components could run circuits currently intractable for classical computers, while 18,000 components could simulate the Hubbard model beyond classical reach.

  • Takeaways & Limitations

    The architecture's estimated overheads showcase the promise of concatenated cat codes if the required hardware parameter regime can be reached.

Abstract

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We present a comprehensive architectural analysis for a proposed fault-tolerant quantum computer based on cat codes concatenated with outer quantum error-correcting codes. For the physical hardware, we propose a system of acoustic resonators coupled to superconducting circuits with a two-dimensional layout. Using estimated physical parameters for the hardware, we perform a detailed error analysis of measurements and gates, including CNOT and Toffoli gates. Having built a realistic noise model, we numerically simulate quantum error correction when the outer code is either a repetition code or a thin rectangular surface code. Our next step toward universal fault-tolerant quantum computation is a protocol for fault-tolerant Toffoli magic state preparation that significantly improves upon the fidelity of physical Toffoli gates at very low qubit cost. To achieve even lower overheads, we devise a new magic-state distillation protocol for Toffoli states. Combining these results together, we obtain realistic full-resource estimates of the physical error rates and overheads needed to run useful fault-tolerant quantum algorithms. We find that with around 1,000 superconducting circuit components, one could construct a fault-tolerant quantum computer that can run circuits which are currently intractable for classical computers. Hardware with 18,000 superconducting circuit components, in turn, could simulate the Hubbard model in a regime beyond the reach of classical computing.

I. INTRODUCTION

The paper develops a full-stack fault-tolerant architecture using dissipative cat codes concatenated with outer codes, from electro-acoustic hardware and physical error analysis through logical protection and resource estimates. Its analysis identifies hardware constraints and protocols that support useful algorithms at substantially different component scales.

  • I. INTRODUCTION: The proposed hardware uses acoustic resonators coupled to superconducting circuits in a two-dimensional layout, enabling cat-code storage, control, and readout.The platform is motivated by the small footprint, potential coherence, and integration of hybrid electro-acoustic systems.
  • I. INTRODUCTION: The analysis covers hardware parameters, gate and measurement errors, and circuit-level logical failure rates for repetition-code and thin-surface-code memories.The shifted Fock basis method computes dominant Z-error rates using a Hilbert-space dimension independent of |α|^2.
  • A. Overview of main results: 3 × 10^-3: REGIME 3 CNOT gates are estimated to fail with this probability, while the regime requires storage-mode intrinsic relaxation time T1,i ≈57 ms.REGIME 1 has CNOT failure probability 3.6 × 10^-2 and REGIME 2 has 1.2 × 10^-2; the latter supports scalable error correction but retains high surface-code overhead.
  • A. Overview of main results: 6 × 10^-6: fault-tolerant preparation of Toffoli magic states reaches this total logical Z failure rate when κ1/κ2 = 10^-5.The prepared-state noise is dominated by one Pauli error, enabling a top-down distillation protocol that reduces generic errors quadratically and relevant errors cubically.
  • A. Overview of main results: 1,000–2,000 ATS components are estimated to run 100-qubit circuits with up to 1,000 Toffoli gates, while 18,000 components support Hubbard-model simulation in 32–89 minutes.For the Hubbard-model task, the magic-state factory uses at most 9.5% of total resources and is not an execution-time bottleneck.
  • I. INTRODUCTION: The architecture combines dissipative cat qubits with repetition or thin rectangular surface codes to address their strongly biased noise.Cat-code bit flips are exponentially suppressed with |α|^2, while phase flips increase, motivating outer-code protection tailored to the dominant errors.

B. Physical implementation of buffer and storage resonators

The architecture uses lithium-niobate phononic resonators and ATS-based buffer circuits to stabilize cat states, connect a two-dimensional code layout, and estimate dissipation and crosstalk constraints.

  • Buffer-mediated stabilization: An ATS activates the nonlinear interaction that converts two storage phonons into one buffer photon, while a driven reverse process stabilizes the cat state.The pump is tuned to ωp = 2ωa −ωb, and a buffer drive stimulates conversion back into storage phonons.
  • Storage resonators: PCDR storage modes provide localized gigahertz acoustic resonances coupled to superconducting circuits, with footprints at least three orders of magnitude smaller than planar superconducting resonators.The proposed devices use lithium niobate and occupy volumes below 1 µm^3.
  • Two-dimensional layout: Each buffer couples through a bandpass filter and open waveguide, while reservoirs form a two-dimensional grid linking neighboring data, ancilla, and readout resonators.The layout uses four neighboring active resonators and an additional readout resonator around each reservoir.
  • Layout constraints: Five modes per ATS are the largest number tolerated by the outer codes because correlated errors increase rapidly as more modes share one ATS.The architecture is constrained by PCDR terminal availability and multiplexed-stabilization crosstalk.
  • Dissipation and crosstalk constraints: κ1/κ2 determines relevant hardware performance, and increasing buffer impedance can suppress buffer-induced single-phonon loss until κ1 approaches intrinsic storage loss.The analysis identifies a regime near Zb ∼1 kΩ under stated assumptions.
  • Dissipation and crosstalk constraints: κb has an upper limit because crosstalk degrades logical lifetimes when the nonlinear coupling exceeds g2/2π ≤ 2 MHz.At the maximal buffer decay rate, the proposal gives κb ≤ 2π∗57 MHz.

E. Multiplexed stabilization

Frequency-division multiplexing lets one ATS stabilize multiple cat modes independently, while filtering and mode-frequency choices suppress crosstalk but leave residual correlated errors and mode-count constraints.

  • Multiplexed stabilization: A single ATS can simultaneously stabilize multiple modes by applying pumps and drives with mode-specific detunings.The scheme extends single-mode stabilization through frequency-division multiplexing within different regions of the filter passband.
  • Multiplexed stabilization: Modes stabilize independently when emitted buffer photons are spectrally resolved, requiring |∆n −∆m| ≫4|α|2κ2.The environment then distinguishes photons emitted by different storage modes, preventing back-action between them.
  • Crosstalk mitigation: Filtering suppresses dissipation outside the passband while allowing strong stabilization for emissions inside the passband.The illustrated filter bandwidth is 4J/2π = 100 MHz.
  • Crosstalk limitations: Residual correlated crosstalk can nevertheless limit overall performance even after dominant stochastic crosstalk sources are suppressed.These residual errors are incorporated into the architecture’s logical-error-rate calculations.
  • Crosstalk mitigation: Careful filtering and phonon-mode frequency optimization can suppress stochastic crosstalk errors κeff and γeff to negligible levels.The same frequency design places correlated-error emissions outside the filter passband.
  • Crosstalk limitations: Crosstalk forces the architecture to minimize modes per unit cell, trading away some hardware efficiency and connectivity.The proposal chooses four active modes plus one readout mode because this is the minimum compatible with the two-dimensional square-grid layout.

III. GATES AND MEASUREMENTS

The paper analyzes cat-qubit gates and readout schemes, combining bias-preserving operations with numerical and perturbative error estimates. It develops methods that accelerate simulation and identifies how gate imperfections depend on cat parameters and gate duration.

  • Methods: The shifted Fock basis enables perturbative Z-error analysis and more efficient simulation of large cat qubits than the usual Fock basis.Its required Hilbert-space dimension for Z-error calculations is independent of |α|2.
  • X gate: The X gate rotates stabilized coherent states by π, and a compensating Hamiltonian removes the need for adiabatic operation.With compensation, phonon loss, gain, and dephasing produce logical error rates identical to those during idle.
  • CNOT: The bias-preserving CNOT conditionally rotates the target while keeping the cat states separated, preserving the noise bias.Its approximate implementation introduces an extra control-qubit Z rotation unless |α|2 is an even integer or ideal compensation is used.
  • CNOT: The approximate CNOT compensation creates a 1/T non-adiabatic error, while loss, gain, and dephasing generate Z errors proportional to T.Balancing these contributions determines an optimal gate time.
  • CNOT: Perturbative CNOT predictions agree with numerical results within a relative error of 10%, and optimal Z error rates are independent of |α|2.The perturbative non-adiabatic coefficient π2/64 = 0.154 is close to the fitted value 1/(2π) = 0.159.

C. Toffoli

The Toffoli construction extends the bias-preserving conditional-rotation approach to three cat modes and evaluates its dominant Z errors. The section also describes parity-based X readout and its integration with error-correction cycles.

  • Toffoli: The bias-preserving Toffoli conditionally rotates the target on the two control states, up to an extra controlled-Z rotation on the controls.The extra CZ rotation is trivial when |α|2 is an even integer.
  • Toffoli: The Toffoli compensating Hamiltonian extends the CNOT construction but leaves a trade-off between non-adiabatic errors and loss or dephasing noise.This trade-off produces an optimal gate time for each cat size and noise setting.
  • Toffoli: Toffoli simulations resolve only dominant Z-type errors because other Pauli error rates are exponentially small in α2.The simulations solve the master equation for three modes with loss, gain, and dephasing.
  • Toffoli: The perturbative optimal Toffoli gate time is π/(8α2√2κ1κ2), identical to the corresponding CNOT prediction.At the optimal time, the predicted Toffoli Z error rates agree with numerical results within a relative error of 5%.
  • X-basis readout: X-basis readout deflates cat parity into vacuum or single-phonon states, swaps the excitation to a readout mode, and uses repeated QND parity measurements with majority voting.Measurements can run in parallel with the next error-correction cycle; simulations use up to 3 or 5 parity measurements for repetition or surface codes.

E. Z measurement

Z-basis readout distinguishes the cat computational states through storage-buffer coupling and homodyne detection. The resulting fidelity improves with cat size, while logical-code performance depends on the full hardware noise model.

  • Readout mechanism: Z-basis readout couples the storage mode to a buffer so |±α⟩ become distinguishable buffer coherent states for homodyne measurement.The scheme is based on a beamsplitter Hamiltonian and is not quantum non-demolition.
  • Readout performance: The measurement signal-to-noise ratio increases with α, yielding an exponential improvement in fidelity with |α|2.At long times, the SNR decreases as 1/√τ because the storage mode is emptied.
  • Readout performance: 850 ns is the approximate optimal Z-basis measurement time in the simulations, with incorrect-readout probability ϵ ≈2 ∗10−4 for |α|2 = 8.Readout fidelity and duration depend on additional parameter assumptions beyond the κ1/κ2 ratio.
  • Additional noise: At |α|2 = 8, pure dephasing is expected to substantially increase X error rates, whereas thermal population nth = 0.01 increases CZ error rates by about 1%.The analysis reports that phonon gain added to loss only slightly enhances operation error rates.
  • Outer-code implications: The repetition code protects phase errors but is insufficient for universal computation because logical X-failure rates remain too high without bit-flip correction.The architecture therefore uses a dx = 3 by dz rotated surface code for algorithmic logical gates, reserving repetition-code states for Toffoli magic-state preparation.
  • Logical performance: A d = 9 transversal logical CNOT in REGIME 2 has failure probability 3.7 ∗10−5, while larger repetition distances can eventually worsen total failure rates as bit flips dominate.For |α|2 = 8 in REGIME 3, bit-flip contributions dominate above d = 9.

B. Rotated surface code logical failure rates

The rotated surface code is evaluated under the architecture’s biased circuit-level noise, with logical failure depending strongly on code dimensions and hardware parameters. Crosstalk and lattice-surgery effects further constrain practical code-distance choices.

  • Logical Z failure rates: κ1/κ2 ≤ 5 ∗10−5 is required to obtain low logical Z failure rates without using dz > 40.These parameters correspond to REGIME 3 hardware.
  • Code comparison: The surface code under-performs the repetition code because it uses more data and ancilla qubits and weight-four rather than weight-two stabilizer measurements.The comparison is based on the logical Z error rates in the corresponding simulations.
  • Logical Z failure rates: A dx = 3, dz = 25 surface-code patch reaches p(Z)L = 1.9∗10−11 using 225 qubits.The patch uses 75 ATS components, and the target is comparable to a distance-26 square surface code under depolarizing noise.
  • Architectural comparison: The architecture requires ∼6× fewer qubits per surface-code patch than conventional square surface-code architectures for the compared logical error rate.The comparison uses 225 qubits versus approximately 2d^2 qubits for the conventional architecture.
  • Crosstalk: Crosstalk is negligible at g2/(2π) = 1MHz but substantially increases required code distances when g2/(2π) ≥3MHz.At 2MHz its effects remain very small, whereas larger couplings separate the logical-error curves with and without crosstalk.
  • Timelike errors: Timelike lattice-surgery errors are exponentially suppressed by increasing dm, at the cost of longer execution time.For the biased noise model, their rate is comparable to, or slightly lower than, logical Z failure rates.

VI. TOFFOLI DISTILLATION: BOTTOM-UP SCHEME

The paper develops bottom-up and top-down protocols for preparing high-fidelity Toffoli magic states. The bottom-up protocol is fault-tolerant but lacks a threshold, while top-down distillation exploits the strongly biased output noise to reach algorithmically useful fidelities.

  • Bottom-up scheme: BUTOF fault-tolerantly prepares repetition-code-encoded |TOF⟩ states using stabilizer operations and physical Toffoli gates.The protocol is designed as a bottom-up preparation scheme and can be supplemented by top-down distillation.
  • Bottom-up scheme: BUTOF has no threshold because its circuit depth increases with repetition-code distance, despite being fault-tolerant.In REGIME 3, it still produces |TOF⟩ states with total failure probabilities on the order of 6 ∗10−6.
  • Bottom-up scheme: 6 ∗10−6 failure probability from BUTOF is insufficient for algorithms using over a million Toffoli gates.The protocol therefore requires higher-fidelity preparation for the largest algorithms considered.
  • Top-down scheme: TDTOF uses thin surface-code qubits wherever a potential bit flip would affect the output Toffoli state.It assumes access to high-fidelity logical Clifford gates and attacks the distillation problem from the top of the stack.
  • Top-down scheme: 8 ∗10−10 output error is obtained for the benchmark TDTOF example without noise tailoring, approximately 2ϵ2.The benchmark uses BUTOF with dBU = 7 and REGIME 3 parameters.
  • Noise tailoring: The tailored distillation construction outputs TOF-state infidelity O(ϵ3) from an initial model dominated by Z ⊗1l ⊗1l errors.The protocol is based on a new set of codes and Clifford symmetries for TOF-to-TOF distillation.
  • Noise tailoring: 1.2 ∗10−12 output error is obtained with noise-tailored TDTOF in the benchmark example.Here ϵ1 = 2∗10−5 and ϵ2 = 7.5∗10−9, with the dominant contribution approximately 8ϵ1ϵ2.
  • Algorithmic usefulness: The resulting error rates support reliable algorithms with up to 108 Toffoli gates at low overhead cost.The lowest reported error rate is 2.4 ∗10−9 and is dominated by bit-flip errors in repetition-code blocks.

VIII. OVERHEAD ESTIMATES

The resource analysis estimates that the architecture can execute classically intractable circuits with roughly 1,000 components and simulate a challenging Hubbard-model regime with 18,000 components. These estimates depend on REGIME 3 hardware, detailed noise assumptions, and routing and code-design choices.

  • Classically intractable circuits: NTOF = 1000 places the exponential component of the runtime comfortably in the classically intractable regime.The example uses n = 100 and NTOF = 1000.
  • Classically intractable circuits: 900 ATS components for memory plus several hundred for parallel BUTOF attempts support a 100-Toffoli-qubit computation with NTOF = 1000.Additional routing and Clifford resources raise the full device requirement to between 1 and 2 thousand ATS components.
  • Hubbard-model simulation: The Hubbard-model algorithm requires over 1 million Toffoli gates and over 100 logical qubits.A dx = 3 thin surface code protects the data, while TDTOF prepares the Toffoli states.
  • Comparison caveats: The architectural comparison is conditional because the proposed and transmon estimates use different noise models and gate-error assumptions.The proposed model is hardware-derived and highly biased, while the transmon comparison uses depolarizing noise.
  • Hubbard-model simulation: 18,000 ATS components are estimated for the L = 8, u = 4 Hubbard-model simulation.The corresponding number of PCDR qubits is three times larger.
  • Runtime: 23-89 minutes is the estimated runtime range for the classically challenging task.Runtime includes Toffoli-state preparation and lattice-surgery injection and uncomputation.
  • Runtime: The transmon comparison is about 11× faster, primarily because its surface-code cycles execute 28× faster.The comparison estimates 2.6 minutes for the transmon architecture versus the proposed architecture’s longer runtime.
  • Overhead composition: The magic-state factory contributes at most 9.5% of total resource overhead, with most overhead dominated by the thin rotated surface code.Alternative biased-noise topological codes could reduce costs, but their lattice-surgery implementation remains unresolved.

Appendix A: Engineering two-phonon dissipation with piezoelectric nanostructures

Appendix A develops the hardware model for engineering two-phonon dissipation in piezoelectric nanostructures using an ATS, Foster-network analysis, and filtered buffer-resonator dynamics. It derives how κ2 depends on system parameters and identifies constraints on minimizing κ1/κ2.

  • Implementation of the required Josephson nonlinearity: The appendix proposes an ATS-based nonlinear interaction between a storage resonator and a lossy buffer to engineer two-phonon dissipation.The ATS is implemented as a SQUID split by a linear inductor, with time-dependent flux control providing the required modulation.
  • Calculation of nonlinear interaction rate g2: Foster synthesis represents the piezoelectric resonator and buffer as equivalent circuit networks whose admittance reproduces the mechanical structure’s linear response.The lossy Foster approximation includes an LC block, a series coupling capacitance, and a resistor modeling resonator loss.
  • Calculation of dissipation rates: κ2 is the two-phonon dissipation rate that returns fluctuations near a = ±α to the cat-code space.For a resonant pump, κ2 = 4g2^2/κb,eff; in the far off-resonant limit, κ2 = (g2/∆)^2κb,eff.
  • Classical filter theory and derivation of dissipation rates: Filtering suppresses κ2 when the relevant detuning lies outside the filter passband, while optimal coupling makes κ2 nearly symmetric, flat, and saturated.The design also requires adiabaticity, with filter parameters determined mainly by the storage and buffer resonators.
  • Optimization of the dimensionless loss κ1/κ2: κ2 depends on the filter bandwidth and mean phonon number |α|2, imposing a lower bound on the phonon relaxation rate κ1 needed for small κ1/κ2.Increasing buffer impedance lowers κ1/κ2 only slowly and eventually approaches a fixed value.
  • Optimization of the dimensionless loss κ1/κ2: Arbitrarily large buffer impedance is not physically available because larger impedance increases vacuum phase fluctuations and may cause instabilities.The appendix leaves detailed analysis of this instability physics for future work.

Appendix B: Multiplexed stabilization and crosstalk

Appendix B analyzes simultaneous cat-code stabilization through a common ATS and develops filtering and frequency-selection strategies to suppress crosstalk. It also identifies when the effective independent-mode description is accurate and when coherent stabilization fails.

  • Multiplexed stabilization: A common ATS can stabilize multiple storage modes, and the predominant crosstalk sources can be mitigated for unit cells containing up to five modes.The mitigation combines filtering with storage-mode frequency optimization.
  • Simultaneous stabilization of multiple cat qubits with a single ATS: Separate pump and drive tones stabilize each storage mode, while detuning suppresses cross terms and yields independent incoherent two-phonon dissipators.The resulting effective master equation stabilizes cat states in multiple modes simultaneously.
  • Simultaneous stabilization of multiple cat qubits with a single ATS: Coherent dissipation alone is insufficient because its steady-state subspace includes states outside the cat-code space.Consequently, noise-driven excursions are not guaranteed to return to the code space.
  • Simultaneous stabilization of multiple cat qubits with a single ATS: Good multiplexed stabilization occurs when mode-detuning differences satisfy |∆1 − ∆2| ≫ 4|α|2κ2, while the approximation remains reasonable near this scale.The approximation breaks down beyond the regime where population leakage becomes comparable between the full and effective dissipators.
  • Crosstalk suppression: Filter-induced suppression reduces correlated crosstalk rates exponentially with detuning outside the passband through a factor (J/δijk)2M.Type II errors are likewise suppressed when their effective Hamiltonian detuning lies outside the filter passband.
  • Crosstalk suppression: Optimized storage-mode frequencies simultaneously suppress Type I and Type II errors, keep associated photons at least 10 MHz outside the passband, and strongly suppress Type III errors.For the stated parameters, the crosstalk cost function is C = 1.23 × 10^-3.

Appendix C: Shifted Fock basis

The shifted Fock basis efficiently represents large cat qubits by combining displaced Fock states from the two coherent-state branches and orthonormalizing them when necessary. This basis supports compact calculations of cat-qubit operators and gate error rates.

  • Basis construction: The shifted Fock basis uses displaced Fock states around the ±α coherent-state branches to represent large cat qubits.Each branch contains states D(±α)|n⟩ for n from 0 to d−1.
  • Basis construction: Even and odd parity branches are orthogonal, allowing orthonormalization to proceed separately in each parity sector.The ground states in these branches correspond to complementary cat states rather than computational-basis states.
  • Accuracy considerations: Non-orthogonality between branches becomes negligible when m+n ≪ |α|2, but must be retained for high-precision Z-error and exponentially small X-error calculations.Neglecting non-orthogonality is often adequate for approximate phase-flip rates but not for precise bit-flip estimates.
  • Basis construction: Gram–Schmidt orthonormalization constructs d orthonormalized states in each parity sector from the non-orthonormalized basis.The resulting 2d states are used for operator representations.
  • Operator representation: The annihilation operator is transformed into the orthonormalized computational basis by combining the shifted-basis transformation with a Hadamard conjugation.For large |α|, it is approximated as Z ⊗ (b + α), enabling perturbative error analysis.
  • Applications: The method enables efficient perturbative analysis of cat-qubit gate Z errors using a Hilbert-space dimension independent of |α|2.The paper applies it to idling, rotations, CNOT, and Toffoli gates; dominant single-phonon loss produces Z errors at rate κ1α2.

5. Toffoli

The Toffoli construction conditionally rotates the target cat mode when both control qubits are in the trigger state, while compensating Hamiltonians and engineered dissipation mitigate non-adiabatic excitation. Its error rates are optimized under realistic loss and dephasing, with residual errors even without loss.

  • Error mitigation: A time-dependent engineered jump operator stabilizes the target mode during the conditional rotation, while a compensating Hamiltonian mitigates non-adiabatic effects.The perturbative analysis uses a hybrid shifted-Fock/usual-Fock basis and an interaction-frame master equation.
  • Toffoli construction: The Toffoli gate rotates the target cat qubit by 180° only when both control qubits occupy the trigger state |11⟩.The target remains in the usual cat-code manifold for other control states.
  • Toffoli construction: The effective Hamiltonian contains a desired conditional target rotation, excitation-inducing terms, and a term acting trivially in the ground-state manifold.The latter terms respectively implement the gate and generate leakage or excitation that contributes to errors.
  • Error analysis: Even with κ1 = 0, the Toffoli gate retains nonzero Z error rates that scale with the gate parameters.These intrinsic errors arise from the gate dynamics rather than phonon loss alone.
  • Noise dependence: Dephasing increases dominant control-qubit Z errors and shortens the optimal gate time; at κφ = 10κ1, the Toffoli optimum is about 1.18 times the CNOT optimum.Using the CNOT-optimal time changes individual Toffoli Pauli-Z rates by several percent at large dephasing, although total fidelity changes little.
  • Noise dependence: The simulated Toffoli error rates exhibit the expected square-root scaling with κ1/κ2 across tested phonon numbers and noise settings.Simulations include n = 4, 6, 8, and 10, with loss-only and several dephasing rates.

Appendix G: Measurement

The architecture uses dedicated readout modes and repeated QND parity measurements to perform high-fidelity basis readout while overlapping measurement with the next error-correction cycle. An ATS-based alternative removes transmons and reduces crosstalk, but its practical feasibility is more speculative.

  • X-basis measurement: X-basis readout determines phononic parity by mapping even and odd cat states to readout-mode states interrogated by a transmon.Deflation maps parity to the |n̂ = 0⟩ and |n̂ = 1⟩ manifolds before repeated measurement.
  • X-basis measurement: Repeated QND parity measurements suppress transmon readout and relaxation errors while allowing the next error-correction cycle to proceed in parallel.After the storage-to-readout exchange, idling time is limited mainly by deflation and SWAP steps.
  • Readout performance: Readout error probability decreases exponentially with |α|2, with simulations using the conservative relation ϵ = e^-1.5−0.9|α|2.For odd initial states, longer majority-vote sequences can underperform because a T1 event may force later outcomes to zero.
  • ATS-based alternative: The ATS-based alternative removes the transmon from each unit cell and reduces the number of reservoir-coupled modes from five to four.The main text excludes this scheme because its practical feasibility is considered more speculative.
  • ATS-based alternative: Four-mode optimization reduces total correlated error probability p_double + p_triple by over an order of magnitude relative to five modes and permits nearly twice the filter bandwidth.The bandwidth increases from 4J = 2π ∗100 MHz to 4J = 2π ∗180 MHz.
  • Logical impact: With measurement error fixed at 2 ∗10^-3, logical Z error rates increase only slightly in the low κ1/κ2 regime because CNOT failures dominate.The comparison therefore predicts no increase in algorithmic overhead for the alternative architecture at the same code distances.

Appendix I: STOP algorithm

The STOP algorithm makes repeated syndrome measurement fault tolerant by tracking syndrome changes and choosing when to terminate. Full syndrome-history decoding lowers repetition-code failure rates, while fitting formulas apply only over specified κ1/κ2 ranges.

  • Fault-tolerance definition: Fault-tolerant error correction requires that up to t = ⌊(d −1)/2⌋ faults preserve ideal decoding or limit the residual error weight to the number of faults.The two defining conditions cover both erroneous inputs and arbitrary input states.
  • STOP algorithm: STOP tracks consecutive syndrome outcomes and estimates the minimum number of faults that could explain observed syndrome changes before terminating measurements.Its counter ndiff is updated using whether a prior round already accounted for a syndrome change.
  • STOP algorithm: The algorithm supports fault-tolerant correction before physical Toffoli gates and can be combined with gate injection for repetition-code stabilizer operations.This avoids relying on direct data measurement before the physical Toffoli operations.
  • Decoding performance: Decoding the entire syndrome history with MWPM gives lower repetition-code logical failure rates than decoding only a one-dimensional syndrome record, and has a threshold.The improvement is reported for termination decisions based on the STOP algorithm.
  • Fitting procedure: The fitting procedure works over 10^-5 ≤ κ1/κ2 ≤ 10^-4 for repetition-code data and 10^-5 ≤ κ1/κ2 ≤ 5 ∗10^-4 for thin surface-code data.At higher or lower ratios, respectively, higher- or lower-order contributions become important; surface-code overhead is already prohibitive above 5 ∗10^-4.
  • Measurement-round optimization: The common choice dm = dx = dz is not generally optimal; the main algorithm most often favors dm = dz −2, while distillation factories can use dm about half as large.This reflects the influence of realistic noise and the reduced importance of time-like errors inside factories.

3. Adding edges for dealing with correlated errors

The decoding framework is extended with additional graph edges for spatial, temporal, and boundary-correlated errors. The same section also motivates compact Toffoli-state distillation and verifies transversal CCZ properties for a trio of [[8, 2, 2]] codes.

  • Correlated-error decoding: Correlated two- and three-qubit faults are represented by fictitious gate locations and incorporated into MWPM graphs through additional weighted edges.The added edges capture bulk, boundary, and spacetime-correlated error mechanisms.
  • Correlated-error decoding: The modified decoding graph includes orange cross edges for spatially correlated faults and red spacetime edges for temporally correlated faults.Boundary-specific edge weights distinguish errors near lattice boundaries from bulk errors.
  • Timelike errors: Timelike-error correction uses repeated stabilizer measurements and MWPM over the full syndrome history, illustrated for a d = 5 repetition code with dm = 4.The protocol is discussed for repetition codes even though timelike errors also arise in surface-code lattice surgery.
  • Toffoli-state distillation: The proposed 8TOF →2TOF protocol protects against any single X, Y, or Z location fault and has conversion rate 1/4 without large blocks.Achieving the same rate through the prior construction would require a 32TOF →8TOF protocol.
  • Transversality proofs: A trio of [[8, 2, 2]] codes is shown to have the required CCZ transversality, so physical CCZ operations realize logical CCZ operations transversally.The corresponding |CCZ⟩ state differs from |TOF⟩ by a single Hadamard gate.

3. Trading space and time

The protocol reduces magic-state factory space by partially encoding CCZ states, replacing full-codeword encoding with conjugated CCZ gates implemented through CNOTs, measurements, and corrections.

  • Partial encoding: The G-matrix representation constructs a space-efficient distillation protocol without encoding into the full codespace.It converts CCZ^⊗n into a product of conjugated CCZ gates under a partial encoding unitary.
  • Circuit realization: The encoding unitary V_D can be chosen as a Clifford circuit composed solely of CNOT gates.This realizes the G-matrix encoding while preserving the intended code structure.
  • Partial encoding: 3(n−m−k) qubits initialized to |0⟩ are surplus because the conjugated CCZ operation acts only on the first 3(k+m) qubits.This observation enables the space reduction in the factory layout.
  • Encoded implementation: The architecture supports both CNOT-and-single-qubit-measurement and lattice-surgery implementations of conjugated CCZ injection.The lattice-surgery formulation uses multi-qubit Pauli measurements as its natural encoded operations.
  • Circuit realization: Algorithm 2 realizes the sequence of conjugated-CCZ gates using CNOTs, Z-basis measurements, discarded input-state qubits, and adaptive Clifford corrections.Measurement outcomes determine later Z and CZ corrections; these corrections can be postponed because they commute with the remaining circuit.

5. Error propagation and detection

The protocol analyzes how noisy CCZ inputs propagate through the distillation circuit and uses check-qubit measurements to detect errors, yielding suppression whose order depends on the noise structure.

  • Noise model: The analysis first assumes ideal encoded Clifford gates while evaluating the effect of noisy |CCZ⟩ states in TDTOF.Finite-distance Clifford, lattice-surgery, and memory errors are incorporated separately in the full factory analysis.
  • Error propagation: Z errors propagate through Algorithm 3 isomorphically to error propagation in codes represented by the corresponding G-matrices.This mapping determines which errors reach output qubits and which remain confined to check qubits.
  • Error detection: Check qubits remain unflipped exactly when the propagated error syndromes vanish, allowing acceptance probability and output fidelity to be computed by summing these events.With no errors, the protocol applies CCZ^⊗k to the output factory qubits while leaving check qubits in |+⟩.
  • Error detection: A single fault is detected, while two faults evade detection only when their error patterns cancel exactly.For the relevant G matrices, 184 of 196 undetected two-fault errors produce an output error, while 12 are harmless.
  • Noise tailoring: The protocol provides quadratic error suppression for depolarizing noise, while symmetry operations can exploit the dominant Z error in BUTOF outputs to obtain cubic suppression.The BUTOF noise model is highly asymmetric, so Clifford symmetries alter performance without changing the ideal protocol.
  • Factory-level effects: 2.5 ∗10−9 is the lowest observed infidelity in the detailed accounting, although direct surface-code encoding could approach the ideal noise-tailored limit of 1.2 ∗10−12.The stated estimate includes multiple error sources; the lower value is identified as an ideal Clifford limit for the benchmark example.
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