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Constant-overhead quantum error correction with thin planar connectivity
Maxime A. Tremblay, Nicolas Delfosse, Michael E. Beverland
TL;DR
Positive-rate quantum LDPC codes can reduce qubit overhead, but their non-local stabilizers are challenging to lay out without crossings. This paper decomposes Tanner graphs into planar layers and constructs constant-depth stabilizer-measurement circuits. The authors report a circuit-noise threshold of 2.8(2)×10^-3 for an HGP code family, with comparable-threshold advantage over surface codes.
Problem
Positive-rate quantum LDPC codes have non-local stabilizers, and naive layouts can require many crossing connections that are challenging to implement and may spread errors through crosstalk.
Source: p. 1Method
The paper decomposes Tanner graphs into a small number of planar layers and constructs constant-depth stabilizer-measurement circuits for CSS codes.
Source: p. 2Results
2.8(2)×10^-3 circuit-noise threshold was estimated for a family of HGP codes using layered planar connectivity.
Source: pp. 2, 4Takeaways & Limitations
The authors report strong evidence that these codes can offer a significant advantage over surface codes with comparable thresholds.
Source: p. 2The design requires long-range links within each layer, whose scalability is unclear, and insulation between layers is in tension with data qubits participating in all layers.
Source: p. 5
Abstract
from arXiv · showhide
Quantum LDPC codes may provide a path to build low-overhead fault-tolerant quantum computers. However, as general LDPC codes lack geometric constraints, na\"ive layouts couple many distant qubits with crossing connections which could be hard to build in hardware and could result in performance-degrading crosstalk. We propose a 2D layout for quantum LDPC codes by decomposing their Tanner graphs into a small number of planar layers. Each layer contains long-range connections which do not cross. For any CSS code with a degree-$\delta$ Tanner graph, we design stabilizer measurement circuits with depth at most $(2\delta +2)$ using at most $\lceil \delta/2 \rceil$ layers. We observe a circuit-noise threshold of 0.28\% for a positive-rate code family using 49 physical qubits per logical qubit. For a physical error rate of $10^{-4}$, this family reaches a logical error rate of $10^{-15}$ using fourteen times fewer physical qubits than the surface code.
Tanner subgraphs for HGP codes
The HGP Tanner graph’s edge directions yield degree bounds for its directional subgraphs. Under even-degree and balanced-ordering conditions, the proof shows the lower bound is tight.
- The Tanner graph’s four edge directions partition its edges, while horizontal and vertical degrees add to the total degree.The east and west subgraphs are bounded by the horizontal degree; the north and south subgraphs are bounded by the vertical degree.Source: Tanner subgraphs for HGP codes · p. 5
- With even-degree input graphs and balanced orderings, the directional degree bounds follow from each vertex having equal forward and backward degree.The proof applies this reasoning first to vertical edges and then to horizontal edges.Source: Tanner subgraphs for HGP codes · p. 5
- The proof concludes by combining the directional bounds with the identity that the input-graph degrees sum to the Tanner graph degree.Source: Tanner subgraphs for HGP codes · p. 5
Numerical simulations
The simulations evaluate HGP codes built from random regular Tanner graphs under circuit noise. They estimate logical failure over repeated correction rounds and use the observed trend after six rounds to motivate a per-round estimate.
- The simulations use HGP codes from random (3, 4)-regular Tanner graphs with girth at least 8 and select among 50–1000 samples by code length.The graphs have 4s bit nodes and 3s check nodes; the selected graphs admit balanced vertex orderings found by a greedy algorithm.Source: Numerical simulations · p. 5
- Each circuit operation, including identity gates, is faulty with probability p; faulty unitaries receive random nontrivial Pauli errors and faulty measurements flip outcomes.Source: Numerical simulations · p. 5
- Logical failure rates are estimated by averaging over T successive error-correction rounds.Source: Numerical simulations · p. 5
- After six rounds at p = 10^-3, the failure-rate increment per round is roughly constant for code lengths 5625 and 10000.The authors model PL(T) as c + qT and estimate the per-round rate as PL(T)/T at T = 10, describing this as pessimistic for T ≥ 10.Source: Figure 4 · p. 6, Numerical simulations · p. 6