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Demonstration of fault-tolerant universal quantum gate operations

Lukas Postler, Sascha Heußen, Ivan Pogorelov, Manuel Rispler, Thomas Feldker, Michael Meth, Christian D. Marciniak, Roman Stricker, Martin Ringbauer, Rainer Blatt, Philipp Schindler, Markus Müller, Thomas Monz

arXiv:2111.12654v3quant-ph

TL;DR

The paper addresses how to perform universal logical quantum computation without allowing operation errors to spread uncontrollably. It uses flag fault tolerance with seven-qubit color-code logical qubits in a trapped-ion processor to implement Clifford operations, CNOT, magic-state preparation, and T-gate injection. The experiments show improved encoded-state performance for fault-tolerant preparation despite greater circuit complexity, while demonstrating the required universal gate components.

  • Problem

    Fault-tolerant logical operations must prevent single faults from spreading into uncorrectable errors, but achieving universality generally increases circuit complexity.

  • Method

    The experiment uses flag qubits with two seven-qubit color-code logical qubits to implement transversal Clifford operations and CNOT, fault-tolerant magic-state preparation, and teleportation-based T-gate injection.

  • Results

    0.012(1) logical infidelity was measured for fault-tolerant |0⟩L initialization versus 0.090(4) non-fault-tolerantly, while the logical CNOT produced a Bell-state fidelity of 0.754(9).

  • Takeaways & Limitations

    The demonstrated fault-tolerant universal logical gate set, together with repeated quantum error-correction cycles, supports progress toward error-corrected universal quantum computation.

Abstract

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Quantum computers can be protected from noise by encoding the logical quantum information redundantly into multiple qubits using error correcting codes. When manipulating the logical quantum states, it is imperative that errors caused by imperfect operations do not spread uncontrollably through the quantum register. This requires that all operations on the quantum register obey a fault-tolerant circuit design which, in general, increases the complexity of the implementation. Here, we demonstrate a fault-tolerant universal set of gates on two logical qubits in a trapped-ion quantum computer. In particular, we make use of the recently introduced paradigm of flag fault tolerance, where the absence or presence of dangerous errors is heralded by usage of few ancillary 'flag' qubits. We perform a logical two-qubit CNOT-gate between two instances of the seven qubit color code, and we also fault-tolerantly prepare a logical magic state. We then realize a fault-tolerant logical T-gate by injecting the magic state via teleportation from one logical qubit onto the other. We observe the hallmark feature of fault tolerance, a superior performance compared to a non-fault-tolerant implementation. In combination with recently demonstrated repeated quantum error correction cycles these results open the door to error-corrected universal quantum computation.

I. INTRODUCTION

Fault tolerance prevents single faults from spreading into uncorrectable multi-qubit errors, while the seven-qubit color code and flag qubits enable universal logical operations in trapped ions. The experiments demonstrate improved encoded-state performance despite increased circuit complexity.

  • I. INTRODUCTION: Fault-tolerant circuits prevent a single error from becoming an uncorrectable multi-qubit error and can quadratically suppress logical failures in physical error probability p.Without fault tolerance, p_L ∝ Np; with fault-tolerant design, p_L ∝ N′p^2 under the stated assumptions.
  • I. INTRODUCTION: Flag fault tolerance uses dedicated auxiliary qubits to signal dangerous errors, reducing resource requirements for fault-tolerant operations.The paper applies this approach to logical state preparation, Clifford operations, and magic-state preparation.
  • I. INTRODUCTION: The distance-3 seven-qubit color code corrects all single-qubit errors and supports transversal CNOT, Hadamard, and phase gates, implementing the entire Clifford group transversally.Weight-2 errors can still cause logical failures, while the non-Clifford T-gate requires magic-state injection.
  • II. INITIALIZING AND CHARACTERIZING THE LOGICAL QUBIT: 0.012(1) logical infidelity was achieved for fault-tolerant initialization versus 0.090(4) non-fault-tolerantly, despite increasing entangling gates from 8 to 11.The fault-tolerant initialization acceptance rate was 78.9(5)%.
  • III. TRANSVERSAL FAULT-TOLERANT OPERATIONS: 0.011(1) average logical infidelity was measured for fault-tolerantly prepared Pauli eigenstates, with an acceptance rate of 80.6(2)%.Verification reduced logical infidelity for all six Pauli eigenstates, and single-qubit Clifford imperfections were negligible relative to initialization errors.
  • III. TRANSVERSAL FAULT-TOLERANT OPERATIONS: 0.754(9) logical fidelity was obtained for a Bell state after the transversal logical CNOT, while the experimental average logical infidelity across six inputs was 0.110+3−4.Inputs with a control qubit in superposition had higher output infidelity than computational-basis inputs.

IV. UNIVERSAL FAULT-TOLERANT OPERATIONS

The work establishes a fault-tolerant route to universal logical operations by preparing a flagged logical magic state and injecting it to realize a logical T-gate. The procedure combines fault-tolerant Hadamard measurement, error detection, and logical teleportation, with a mean T-gate infidelity of 0.10(1).

  • Logical T-gate: A logical T-gate supplies the non-Clifford π/4 rotation needed to extend transversal color-code Clifford gates to a universal set.The gate is implemented through magic-state injection by logical gate teleportation.
  • Magic-state preparation: The magic state is prepared by non-fault-tolerant encoding followed by flagged Hadamard measurement and fault-tolerant stabilizer-based error detection.Flags identify an incorrect Hadamard eigenstate or a dangerous measurement fault, while the final block measures all six color-code stabilizers.
  • Magic-state preparation: The prepared logical magic state has experimental infidelity 0.006+14−5 and acceptance rate 13.7(3)%.Numerical simulations predict an acceptance rate of approximately 27%.
  • Logical T-gate: Fault-tolerant teleportation applies the logical T-gate to a second logical register after preparing the magic state and measuring the logical state.A conditional RY(π/2) operation is applied in post-processing.
  • Logical T-gate: The logical T-gate achieves mean infidelity 0.10(1), with the lowest infidelity for the logical |+i⟩L input because it is a T-gate eigenstate.The other three logical input states have slightly higher infidelities, consistent qualitatively with simulations.

V. DISCUSSION AND OUTLOOK

The demonstrated fault-tolerant gate set improves encoded-qubit performance despite increased circuit complexity, using a 16-ion trapped-ion architecture. The authors identify repeated error-correction cycles, larger-distance codes, and improved gate characterization as next steps.

  • Discussion: The experiment demonstrates a universal set of fault-tolerant single- and two-qubit logical gates.The implementation uses flag fault tolerance and benefits from all-to-all connectivity in the trapped-ion architecture.
  • Discussion: Fault-tolerant implementations improve encoded-qubit performance despite requiring more gates and greater circuit complexity.The authors describe this improvement as a hallmark feature of fault-tolerant circuit design.
  • Discussion: The largest deviations between experiment and depolarizing-noise simulations occur for the logical CNOT-gate.More extensive characterization and more sophisticated validated noise models are planned.
  • Outlook: Future milestones include integrating repetitive QEC cycles into the demonstrated gates and extending fault-tolerant operations to larger-distance logical qubits.These steps target more robust logical qubits and error-protected universal quantum computation.
  • Experimental platform: The 16-ion processor supports the demonstrated operations through native entangling Mølmer–Sørensen gates, single-qubit rotations, and software Z-rotations.The average neighboring-ion Bell-state fidelity is about 97.5%.

C. State readout

State readout uses fluorescence detection with EMCCD or APD, achieving over 99.7% single-qubit readout fidelity. Statistical uncertainties are reported as 68% confidence intervals from multinomial resampling.

  • Fluorescence readout illuminates the ions on the 4S1/2-to-4P1/2 transition and collects scattered photons.
  • EMCCD imaging provides site-resolved readout only after coherent evolution, while in-sequence APD detection reveals the excitation count.
  • More than 99.7% single-qubit readout fidelity is achieved after 2 ms EMCCD or 0.5 ms APD illumination.
  • All stated errors and figure error bars represent 68% confidence intervals estimated by multinomial resampling of measured outcomes.

VII. SIMULATION METHODS

The simulations combine stabilizer methods for Clifford-only logical Pauli and CNOT circuits with statevector methods for non-Clifford magic-state and teleportation circuits. Noise is modeled by randomly inserted Pauli errors using experimentally motivated rates.

  • PECOS Monte Carlo simulations replace ideal circuit elements with faulty operations followed by probabilistic error operators.
  • The depolarizing model applies randomly placed Pauli errors after single-qubit operations and two-qubit gates according to experimental physical error rates.
  • The simulations use p1 = 0.005, p2 = 0.025, and pi = pm = 0.003 for the corresponding operations.
  • Stabilizer simulations efficiently model logical Pauli-state preparation and CNOT circuits containing only Clifford gates.
  • Full statevector simulations are required for fault-tolerant magic-state preparation and gate teleportation because these circuits contain non-Clifford operations.
  • Logical teleportation applies a classically controlled Y-rotation based on the first register’s Y-basis measurement, with the final R operation incorporated into destructive measurements.

A. Ideal error correction

Ideal error correction decodes destructive measurement results using color-code syndromes and a lookup table, correcting inferred single-qubit errors while identifying higher-weight logical failures.

  • Destructive measurement results are reinterpreted using the color-code lookup-table decoder to correct likely physical errors in software.

B. Logical Pauli states

Logical Pauli-state preparation is evaluated by classifying output errors according to their distance from the desired encoded state and whether ideal correction can recover it. Measurements must use the corresponding Pauli basis, with only sector-visible errors detectable in each preparation.

  • Output states are categorized by error patterns after the logical Pauli-state encoding circuit.
  • The distance d from the desired |0⟩L state determines whether ideal error correction identifies the prepared logical state correctly.
  • The distance is obtained by destructive measurement and the minimum Hamming distance between the measured string and valid encoded basis strings.
  • Ideal correction recovers d = 0 and single-error states such as X2|0⟩L, whereas d = 2 or d = 3 yields |1⟩L.
  • For logical Pauli states, destructive measurements use the respective basis, but only Pauli-X or Pauli-Z errors are visible in the complementary preparations.

C. Logical fidelities

Logical fidelities quantify whether encoded states and gate outputs can be correctly identified relative to their intended logical states. The analysis reconstructs logical expectation values and uses tomography or simulation to evaluate single-qubit, two-qubit CNOT, and magic-state/T-gate outputs.

  • Single-qubit logical states: Logical fidelities are probabilities of correctly identifying the intended logical state, not full quantum-state fidelities.They are obtained from overlap with the target logical Bloch vector after error-syndrome correction.
  • Single-qubit logical states: Expectation values of logical Pauli operators determine the fidelities of encoded single-qubit states.Stabilizer simulations use destructive Pauli-basis measurements, ideal error correction, and averaged outcomes.
  • Two-qubit logical states: The logical CNOT maps |x,y⟩L to |x,y ⊕ x⟩L, producing maximally entangled Bell and Y-basis states from suitable inputs.Two logical qubits are prepared in separate seven-qubit registers.
  • Two-qubit logical states: Two-qubit output fidelities are evaluated from projectors onto simultaneous +1 eigenspaces of the relevant logical operators.Logical Pauli expectation values are reconstructed using tomography or stabilizer simulations followed by destructive measurement and ideal error correction.
  • Logical magic state and T-gate: The logical magic state is characterized by tomography and fidelity to the +1 eigenstate of the logical Hadamard operator.Its injection onto logical Pauli states implements the logical T-gate, whose output fidelities are evaluated for four inputs.
  • Logical magic state and T-gate: N = 10^5 statevector simulations estimate logical T-gate fidelities by averaging Pauli-basis outcomes after fault-tolerant preparation and injection circuits.Sampling uncertainty is propagated to the fidelities by Gaussian error propagation.

D. Logical process matrix

The logical T-gate is represented as a quantum channel expanded in the logical Pauli basis. Measurements on four logical input states provide a tomographically complete dataset for reconstructing its process matrix.

  • Process-matrix representation: The process matrix χ_mn parameterizes the logical T-gate as a quantum channel expanded in logical Pauli matrices.Its matrix representation is expressed in the logical Pauli basis.
  • Process-matrix reconstruction: Measurements of logical Pauli expectations for |0⟩L, |1⟩L, |+⟩L, and |+i⟩L reconstruct the process matrix χ_mn.These four input states form a tomographically complete set.

E. Acceptance rates

Acceptance rates quantify the fraction of circuit runs in which all flag qubits are measured as +1. The study compares fault-tolerant and non-fault-tolerant encoding circuits and examines simulation–experiment discrepancies.

  • Definition and compared circuits: Acceptance rate is the ratio of circuit runs where all flag qubits are measured as +1.It is reported for fault-tolerant |0⟩L encoding, non-fault-tolerant magic-state preparation, and full fault-tolerant magic-state preparation.
  • Simulation–experiment comparison: The relative error between Monte Carlo simulation and experiment increases with circuit depth and the number of flag qubits.This trend is observed across the compared encoding circuits.

XI. AUTHOR CONTRIBUTIONS

The work combines experimental execution, numerical simulation, circuit analysis, characterization, theory modelling, data analysis, manuscript preparation, and project supervision across the author team.

  • Experimental and simulation work: The experiments were carried out by L.P., I.P., and T.F., with broader contributions to the experimental setup.L.P. analyzed the data, while S.H. performed numerical simulations.
  • Analysis and manuscript: Circuit analysis, characterization, and theory modelling were performed by S.H., M.Rispler, and M.Müller.The manuscript was written by a multi-author group with contributions from all authors.
  • Supervision: R.B., P.S., M.Müller, and M.Meth supervised the project.The contribution statement distinguishes supervision from experimental, analytical, and writing roles.
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