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The BrainScaleS-2 accelerated neuromorphic system with hybrid plasticity
Christian Pehle, Sebastian Billaudelle, Benjamin Cramer, Jakob Kaiser, Korbinian Schreiber, Yannik Stradmann, Johannes Weis, Aron Leibfried, Eric Müller, Johannes Schemmel
TL;DR
Brain-inspired computing needs resource-efficient platforms that can model neural dynamics, plasticity, and learning while supporting flexible applications. This paper presents BrainScaleS-2, combining accelerated analog spiking-neuron emulation with digital control, programmable plasticity, and event routing. The system is reported as a versatile platform supporting tasks across several domains, including low-latency MNIST classification.
Problem
Computational neuroscience needs resource-efficient platforms for bottom-up modeling of brain function, including computationally expensive plasticity, learning, and structured neurons.
Method
The paper presents a neuromorphic architecture combining an accelerated analog core with digital processors, event routing, programmable hybrid plasticity, and in-the-loop control.
Results
The system supports a wide array of tasks across several domains, including MNIST classification at 97.6 ± 0.1% test accuracy and less than 7 µs time-to-decision.
Takeaways & Limitations
The hybrid architecture provides a versatile platform for biology-inspired and machine-learning-inspired learning approaches.
Abstract
from arXiv · showhide
Since the beginning of information processing by electronic components, the nervous system has served as a metaphor for the organization of computational primitives. Brain-inspired computing today encompasses a class of approaches ranging from using novel nano-devices for computation to research into large-scale neuromorphic architectures, such as TrueNorth, SpiNNaker, BrainScaleS, Tianjic, and Loihi. While implementation details differ, spiking neural networks - sometimes referred to as the third generation of neural networks - are the common abstraction used to model computation with such systems. Here we describe the second generation of the BrainScaleS neuromorphic architecture, emphasizing applications enabled by this architecture. It combines a custom analog accelerator core supporting the accelerated physical emulation of bio-inspired spiking neural network primitives with a tightly coupled digital processor and a digital event-routing network.
I. INTRODUCTION
BrainScaleS-2 is designed as a scalable, accelerated spiking-neural-network platform that combines analog emulation with flexible digital control. Its architecture supports multiple operation modes, programmable plasticity, weighted-spike computation, and expansion toward larger systems.
- BrainScaleS uses physical analog quantities such as currents and voltages to represent neural dynamics rather than solving differential equations digitally.
- The overarching design goal is a scalable architecture for large-scale accelerated emulation of spiking neural networks.
- The system supports batch experiments and in-the-loop operation with data dependencies closed at multiple timescales and hierarchy levels.
- Programmable plasticity combines massively parallel analog measurements with digital evaluation of rules containing complex control and data dependencies.
- Weighted-spike processing allows the synaptic crossbar to implement analog vector-matrix multiplication using the same components.
- The single-core system is intended as a unit of scale for larger architectures, with external routing and future reticle integration proposed for expansion.
B. Accelerated Analog Emulation of Neural Dynamics
The analog neuromorphic core physically emulates configurable neuron and synapse dynamics at accelerated timescales. Its circuits support individual calibration, structured neuron models, address-based connectivity, and graded or vector-matrix computation.
- The analog core contains 512 neuron compartments whose dynamics evolve at 1000-fold accelerated timescales relative to biology.
- Neuron circuits integrate synaptic and stimulus currents, while exponential feedback and threshold parameters shape action-potential-like spike generation.
- Each neuron is individually configurable through local SRAM and 24 analog parameters, enabling precise tuning and compensation of fixed-pattern deviations.
- Additional resistors and switches can form larger cells with increased synaptic fan-in and intricately structured neurons.
- Synapses use local weights and source addresses to modulate pulse amplitudes and respond only to afferent events with matching labels.
- Analog synapse sensors continuously measure pairwise pre- and postsynaptic correlations for STDP and related weight-update rules.
- Neurons with graded spikes and disabled spiking dynamics can support non-time-continuous vector-matrix multiplications.
C. Hybrid Plasticity and Versatile Digital Control
BrainScaleS-2 couples an analog neurosynaptic core to digital processors that execute flexible plasticity, calibration, learning, and control programs. This hybrid design supports online adaptation and closed-loop interaction with virtual environments.
- Two digital plasticity and control processors complement the analog core with programmable hybrid plasticity, calibration, readout, ANN computation, and virtual-environment simulation.
- Hybrid plasticity combines analog measurements with digital calculations while retaining simultaneous observation of pre- and postsynaptic correlations.
- SIMD processors access synaptic and neuron states through the CADC and execute fixed-point or integer vector arithmetic for weight, topology, and parameter updates.
- Independent scalar and vector units schedule measurements and data transfers while tracking dependencies to reduce execution delays.
- CADC membrane-voltage sampling provides traces for surrogate-gradient learning during experiment execution.
- Parallel access to neuron dynamics enables efficient on-chip calibration of the 24 parameters associated with each neuron circuit.
- The processors can inject spikes, read neuron activity, simulate environments, and close an agent-environment loop with spiking-network action selection.
III. APPLICATIONS OF THE BRAINSCALES-2 SYSTEM
BrainScaleS-2 addresses analog neuromorphic variability through calibration and demonstrates controllable emulation of diverse AdEx firing dynamics. Its circuits reproduce multiple firing patterns reliably across most or all neuron circuits without manual intervention.
- Analog neuromorphic systems face temporal noise, fixed-pattern deviations, and divergence from model equations, motivating detailed per-circuit control.
- Calibration iteratively measures each circuit and selects configuration parameters so observable characteristics match specified targets, including for AdEx models.The process extends to multicompartment functionality and technical circuit parameters.
- Distinct firing patterns rely on different adaptation and reset configurations, including spike-triggered adaptation, reset potential, and inverted subthreshold adaptation.Delayed regular bursting uses inverted subthreshold adaptation (a < 0), producing positive feedback.
- Most, if not all, neuron circuits reliably reproduced the firing patterns without manual intervention, with stable limit cycles during periodic spiking.
2. Multi-compartmental Neuron Models
BrainScaleS-2 supports configurable multi-compartment neuron models, reproducing passive dendritic signal propagation and input-dependent dendritic spikes. The experiments show how conductance and spatio-temporal input structure shape compartmental dynamics.
- BrainScaleS-2 connects neuron circuits to implement various multi-compartmental neuron models.
- Figure 3 presents membrane and adaptation traces plus phase-space trajectories for four calibrated AdEx firing patterns under constant current stimulation.
- A passive compartment chain replicates dendritic behavior, with synaptic inputs producing EPSPs that attenuate and broaden along the chain.Inter-compartment conductance controls attenuation, while injection location changes EPSP height because compartments have different neighbor counts.
- The system supports dendritic spikes by configuring compartments as functional neuron circuits with AdEx sodium-like spikes or plateau-like spikes.
- Dendritic spiking depends on input location and timing: proximal inputs can elicit spikes, distal inputs may fail, and distal-before-proximal input facilitates triggering.
B. Biology-Inspired Learning Approaches
BrainScaleS-2 is designed to explore biologically plausible learning and embodied neural computation at accelerated time scales. Its tightly coupled plasticity processor supports low-latency environment interaction, rapid parameter sweeps, and evolutionary optimization.
- Biologically plausible learning rules are defined here as spatially and temporally local, relying on observations locally available at each neuron and synapse.
- BrainScaleS-2 supports learning experiments in simulated and physical environments, including maze navigation, bandits, Pong, insect navigation, and accelerated robot control.
- The tightly coupled plasticity processor simulates virtual environments and agents with low latency alongside the analog neuromorphic core.This coupling addresses the nondeterministic low-latency limitation that made such experiments difficult on BrainScaleS-1.
- Parallel access to correlation readings and synapse settings supports experiments on synaptic rewiring, pruning, sparse connectivity, and homeostatic plasticity.Each synapse has a local receptive field of 64 potential inputs.
- The bee path-integration case closes a perception-action loop by implementing the virtual environment and sensory interaction on the plasticity processor.Foraging, return, and looping episodes were simulated in 200 ms, corresponding to 200 s of biological time.
- The acceleration factor reduced a hyperparameter sweep from 9.6 d to approximately 14 min and evolutionary optimization from 448 d to roughly 12 h.The optimization used 200 epochs of 1000 individuals.
2. Accelerated Closed Loop Robotics
BrainScaleS-2 supports accelerated closed-loop interaction through virtual or physical environments, while hybrid plasticity and tunable collective dynamics broaden its control and information-processing applications.
- Physical closed-loop control: A sensor head, spike-based network, and actuator loop demonstrate BrainScaleS-2 controlling a physical system to follow a light gradient.Sensor readings are converted into spikes, and four-neuron outputs become motor commands.
- Physical closed-loop control: The robotics experiment uses a microcontroller and FPGA to translate sensor signals into spikes and network outputs into actuator commands.A fully digital microcontroller replaced an earlier analog sensor-to-spike prototype.
- Virtual closed-loop navigation: Evolutionary optimization improves agent looping behavior, while accelerated execution enables efficient sweeps of integrator hyperparameters.The optimization targets the agents’ distance to the nest during the looping phase.
- Collective dynamics: Hybrid plasticity and accelerated physical emulation bridge neural, network, plasticity, and experiment time scales for long-lasting statistical analyses.These capabilities support information processing whose equivalent implementation on conventional hardware would be prohibitively expensive.
- Collective dynamics: Changing Kext tunes recurrent-network autocorrelation times, matching short dynamics to simple tasks and long dynamics to complex memory-intensive tasks.The transition from long to short time scales requires only a few homeostatic updates, whereas the reverse transition is slower.
C. Gradient-Based Learning Approaches
BrainScaleS-2 supports in-the-loop gradient-based training by combining measurements of physical network behavior with models used to update system parameters. Demonstrations span multiple learning paradigms and achieve fast, accurate MNIST inference.
- In-the-loop training: In-the-loop training updates physical-system parameters using gradients computed from measurements and a model of the system’s behavior.The framework underlies time-to-first-spike, surrogate-gradient-based, and analog ANN training approaches.
- Learning paradigms: The three gradient-based paradigms differ in the measurements required and the physical-system model used.Time-to-first-spike training computes spike-time derivatives from an analytical expression.
- Surrogate gradients: Surrogate-gradient training models continuous-time network dynamics as a recurrent neural network and requires high-resolution membrane-voltage observations.The observation resolution must be comparable to the selected recurrent-network timestep.
1. Surrogate-Gradient-Based Training of SNNs
BrainScaleS-2 supports surrogate-gradient training of spiking neural networks using temporally resolved membrane potentials, enabling sparse-spiking optimization and fast inference. On MNIST, a 246-neuron feedforward SNN reached high test accuracy with sub-7-µs decision time.
- Surrogate gradients modify neuron activation derivatives to enable gradient-based optimization of SNNs with temporally sparse spiking activity.The approach relies on temporally resolved membrane potentials.
- (97.6 ± 0.1) % test accuracy was achieved on MNIST with a feedforward SNN containing a hidden layer of 246 LIF neurons.
- Less than 7 µs time-to-decision was observed for the MNIST classifier.This latency was used in a fast inference mode.
- In ANN operating mode, BrainScaleS-2 represents inputs as pulses whose durations encode activations and whose heights are modulated by synaptic weights.Excitatory and inhibitory rows represent signed weights, while neuron circuits integrate generated currents.
2. Artificial Neural Networks on BrainScaleS-2
BrainScaleS-2 can execute artificial neural networks in its analog core by encoding input vectors as graded spikes and running hardware forward paths with host-computed updates. Hardware-in-the-loop MNIST classification reached nearly the same accuracy as an equivalent CPU model at 6-bit weight resolution.
- BrainScaleS-2 processes ANNs in its analog core using graded spikes to encode input vectors and supports convolutional-network processing.Its non-time-continuous multiply-accumulate operation also facilitates resource multiplexing.
- The PyTorch interface runs ANN forward paths on hardware while calculating weight updates on a host computer using an ideal linear model.The analog core executes MAC operations, while the PPU handles operations such as pooling and activation functions.
- 98.0 % MNIST accuracy was achieved after hardware-in-the-loop training, compared with 98.1 % on a CPU using the same 6-bit weight resolution.
- The analog network core successfully performs vector-matrix multiplication and supports competitive classification precision for classical ANNs.The proof-of-concept leaves substantial room for optimization and suggests hybrid applications combining spiking and non-spiking layers.
IV. A PRINCIPLED APPROACH TO GRADIENT-BASED PARAMETER OPTIMISATION IN NEUROMORPHIC SYSTEMS
The paper frames gradient estimation in neuromorphic hardware as parameter differentiation for hybrid dynamical systems. Because spiking-network dynamics are largely decoupled and synaptic weights act at transitions, the resulting gradients can be computed with sparse, event-based rules and partial observations.
- Hybrid dynamical-system formulation: BrainScaleS-2 is modeled as a hybrid dynamical system combining differential-equation dynamics with spike-triggered state transitions and resets.The formalism uses state-dependent dynamics, jump conditions, and transition equations.
- Problem formulation: Gradient estimation is reduced to computing parameter gradients in a hybrid dynamical system, a well-established optimization problem.
- Sparse gradient structure: Spiking-network dynamics decouple except for spike times, while synaptic weights mainly enter transition functions, yielding simple event-based gradient rules.Jump conditions typically depend only on individual neuron states.
- Composed systems: Sequentially composed physical systems can obtain parameter gradients by composing gradient computations for models of their component systems.
- Transition-time differentiation: The implicit function theorem provides transition-time derivatives without requiring an explicit analytical time-to-first-spike function and applies to complex neuron models.Sparse Jacobians also produce sparse coupling in gradient computation.
- Parameter structure: Neuromorphic architectures have O(n) continuous-dynamics parameters but O(n^2) synaptic weights that enter only transition equations.
- Hardware implications: Event-based accumulation and sparse error propagation mean that only sparse observations or measurements are needed for successful gradient estimation.Partial state or spike-only observations can also support model fitting and gradient computation without full system access.
- In-the-loop training: Separating numerical implementation from the physical dynamical system permits integration methods suited to complex models, including multi-compartment neurons.
V. DISCUSSION
BrainScaleS-2 is presented as a flexible physical-modeling platform whose hybrid analog–digital architecture supports diverse experiments, while wafer-scale integration and scalable event routing remain future challenges.
- Discussion: The single-chip ASIC combines a 512-neuron, 217-synapse analog core with two embedded plasticity and control processors.The authors report that this design meets expectations for flexibility and configurability.
- Discussion: BrainScaleS-2 is positioned as a versatile platform for tasks spanning multiple domains and as a basis for physical modeling in machine learning and computational neuroscience.The authors also point to possible insights from emulating interconnected structured-neuron layers under complex learning and homeostatic processes.
- Discussion: Hybrid analog emulation with flexible digital control and plasticity enabled many of the reported experiments.The architecture also supports evaluation across neuron-model parameters and accelerated emulation of multi-compartment neurons.
- Discussion: Scalable event routing and wafer-scale integration are unresolved aspects of implementing the architecture at larger scale.Asynchronous spiking imposes demanding latency and timing-jitter requirements, while networking between wafers requires further work and funding.
- Discussion: The platform is situated among digital and analog neuromorphic architectures and related hardware-learning methods.The discussion contrasts digital implementations with analog emulation and references pseudoderivative-based training approaches.
- Discussion: The architecture’s accelerated operation is connected to applications including sampling high-dimensional probability distributions and representing certain quantum-system probability distributions.The cited work uses BrainScaleS-2 to rapidly produce samples over long periods.
FUNDING
The research was supported by European, German, and institutional funding programs, foundations, and a research prize.
- Funding: Funding came from EC Horizon 2020, the DFG Excellence Strategy, the German Federal Ministry of Education and Research, the Helmholtz Association, the Manfred Stärk Foundation, and the Lautenschläger-Forschungspreis 2018.The listed support includes the Human Brain Project grants and the Helmholtz ACA project.