PaperlayerView exact revision on arXiv

Source-linked AI summary

The Future of Quantum Computing with Superconducting Qubits

Sergey Bravyi, Oliver Dial, Jay M. Gambetta, Dario Gil, Zaira Nazario

arXiv:2209.06841v2quant-ph

TL;DR

The paper asks how superconducting quantum computers can provide useful computation before fully fault-tolerant systems are available. It presents a perspective combining error mitigation, circuit knitting, heuristic algorithms, improved hardware, and quantum-centric supercomputing, arguing that near-term advantage may emerge for selected problems while more efficient error correction and modular, higher-connectivity hardware define the longer-term path.

  • Problem

    Realizing long quantum computations and super-polynomial speedups is limited by noisy gates, while useful computational power must also be extracted before full error correction is available.

  • Method

    The paper develops a perspective spanning quantum error correction, error mitigation, circuit knitting, heuristic algorithms, superconducting hardware, and integrated modular quantum-classical architectures.

  • Results

    The paper identifies a possible near-term route to computational advantage using high-fidelity QPUs, error mitigation, circuit knitting, and heuristic algorithms, while more efficient LDPC-based correction and non-2D modular hardware are long-term directions.

  • Takeaways & Limitations

    Quantum-centric supercomputing is presented as an architecture in which classical and quantum computation are tightly integrated, modularized, and increasingly abstracted from developers.

Abstract

from arXiv · show

For the first time in history, we are seeing a branching point in computing paradigms with the emergence of quantum processing units (QPUs). Extracting the full potential of computation and realizing quantum algorithms with a super-polynomial speedup will most likely require major advances in quantum error correction technology. Meanwhile, achieving a computational advantage in the near term may be possible by combining multiple QPUs through circuit knitting techniques, improving the quality of solutions through error suppression and mitigation, and focusing on heuristic versions of quantum algorithms with asymptotic speedups. For this to happen, the performance of quantum computing hardware needs to improve and software needs to seamlessly integrate quantum and classical processors together to form a new architecture that we are calling quantum-centric supercomputing. Long term, we see hardware that exploits qubit connectivity in higher than 2D topologies to realize more efficient quantum error correcting codes, modular architectures for scaling QPUs and parallelizing workloads, and software that evolves to make the intricacies of the technology invisible to the users and realize the goal of ubiquitous, frictionless quantum computing.

I. INTRODUCTION

The paper examines how near-term superconducting quantum computers might deliver useful computation despite noisy gates and limited scale. It proposes combining hardware improvements with error mitigation, circuit knitting, heuristic algorithms, and quantum-centric supercomputing.

  • Error correction: Long computations likely require quantum error correction because quantum gates are substantially less accurate than classical gates.The paper frames error correction as necessary for circuits containing millions or billions of gates.
  • Near-term advantage: A QPU with 99.99% two-qubit gate fidelity could reliably implement circuits with a few thousand gates without error correction.Such circuits are described as potentially impossible to simulate classically even with modern supercomputers.
  • Research questions: The paper organizes near-term challenges around extracting data from noisy circuits, designing shallow quantum algorithms, and improving error-correction efficiency.These correspond to the paper’s three central questions.
  • Near-term techniques: Error mitigation and circuit knitting can extend the reliable circuit size of a QPU without immediately resorting to full error correction.Circuit knitting decomposes large circuits into smaller sub-circuits or combines results from multiple QPUs.
  • Quantum algorithms: The paper discusses heuristic versions of rigorous time-evolution algorithms because heuristics may be more compatible with near-term QPUs.This approach reflects the practical success of heuristic classical simulation methods despite lacking rigorous performance guarantees.
  • Quantum-centric supercomputing: Quantum-centric supercomputing integrates quantum and classical processors while using modularity for scaling and workflow parallelization.The architecture supports dynamic circuits, error mitigation, circuit knitting, advanced compiling, and local operations with classical communication.

II. TOWARDS PRACTICALLY USEFUL QUANTUM CIRCUITS

Quantum simulation offers potentially super-polynomial speedups for selected problems, but classical simulation becomes difficult as coherent dynamics generate entanglement. The Heisenberg-chain benchmark illustrates that useful quantum advantage may require circuits far beyond current experimental scale and therefore motivates error correction and alternative near-term methods.

  • Motivation: Selected quantum algorithms can have polynomial runtime while the best known classical algorithms grow faster than any constant power of problem size.The paper identifies these super-polynomial speedups as a central practical motivation for quantum technologies.
  • Motivation: Quantum many-body simulation is scientifically important, while far-from-equilibrium coherent dynamics and high-precision simulations of strongly interacting electrons remain hard for classical computers.Applications include quantum chemistry and other scientific or industrial problems.
  • Spin-chain simulation: Spin-chain simulation evolves an initial state under a Hamiltonian and can estimate local observables relevant to thermalization and excitation spectra.A modified measurement problem is BQP-complete, meaning it is essentially as hard as simulating a universal quantum computer.
  • Classical simulation: Classical simulation of coherent spin-chain dynamics has runtime min(2^O(n), 2^O(vt)), with entanglement growth presenting a major obstacle.Matrix Product States or light-cone restrictions can achieve 2^O(vt) runtime in applicable settings.
  • Quantum algorithms: A nearly optimal quantum algorithm for spin-chain evolution has runtime ˜O(nt), which yields an exponential quantum speedup when evolution time scales as a small constant power of n.The algorithm approximates time evolution using products of unitaries for forward and backward evolution of small spin blocks.
  • Resource requirements: About 10^7 CNOT gates are estimated for the n=t=100 Heisenberg benchmark, exceeding experimentally demonstrated circuit sizes by several orders of magnitude.More practically relevant molecular simulations may require about 10^11 Toffoli gates, making quantum error correction the stated viable path for circuits of this scale.

A. Quantum error correction

Quantum error correction is needed for long quantum computations, but current codes face substantial overhead and connectivity or gate-universality constraints. Quantum LDPC codes offer favorable asymptotic encoding properties, while non-Clifford gates remain a major practical bottleneck.

  • Code principles: Stabilizer codes protect logical states through repeatedly measured commuting Pauli observables whose flipped eigenvalues reveal error syndromes.These codes provide the primary framework for quantum error correction discussed in the paper.
  • Surface-code limitations: The 2D surface code has a threshold close to 1% for commonly studied depolarizing noise, but its encoding rate scales as O(1/d^2) and vanishes with code distance.Increasing protection therefore devotes an increasingly large fraction of physical qubits to error correction.
  • Alternative codes: Quantum LDPC codes can combine an encoding rate arbitrarily close to one with linear distance d ≥ cn, unlike the 2D surface code.This combination could reduce qubit overhead while preserving protection as systems scale.
  • Connectivity and speed: Single-shot LDPC error correction can reduce syndrome measurement cycles per logical gate from O(d) to O(1), but known examples require 3D or 4D connectivity.Connectivity requirements are dictated by which qubits participate in each stabilizer.
  • Logical gates: Universal Clifford+T computation remains costly because high-fidelity magic-state distillation has prohibitively large space-time overhead, especially for T gates.For the benchmark, roughly 10^9 T gates would be needed, while the associated logical-gate volumes are about 2×10^4 and a comparable larger value for CNOT and T gates, respectively.

B. Error mitigation

Error mitigation extends the reliable execution of shallow noisy circuits without the qubit overhead of full correction, but it generally increases circuit executions. PEC, extrapolation, virtual distillation, and logical-level mitigation trade runtime or bias against improved estimates.

  • Overview: Error mitigation combines outcomes from multiple noisy experiments to cancel noise, requiring little qubit overhead but potentially an exponential increase in circuit executions.The exponent’s base can approach one with improved hardware and control, and experiments can run in parallel.
  • Probabilistic error cancellation: Probabilistic error cancellation approximates an ideal circuit as a weighted sum of noisy circuits, with weights learned or computed from a characterized noise model.Its applicability depends on sufficiently accurate noise characterization or a classically simulable training set.
  • Probabilistic error cancellation: For hardware-efficient circuits, PEC overhead scales as (γ̄)^(dn), where d is depth and n is width.The average gate-error parameter γ̄ is hardware dependent, so runtime is highly sensitive to circuit size and gate quality.
  • Runtime scaling: For 100 qubits, PEC for 100 and 1000 Trotter steps requires circuit-instance counts that may become feasible after a couple orders of magnitude improvement in relevant performance.Quantum-centric supercomputing could reduce runtime further through parallelized circuit execution.
  • Other mitigation methods: Zero-noise extrapolation cancels leading-order noise under weak, Markovian noise and can require fewer circuits, but it is biased and heuristic.It has been demonstrated to reconstruct observables for systems up to 27 qubits.
  • Other mitigation methods: Virtual distillation can quadratically suppress errors under a dominant ideal-state component, while introducing at least a factor-of-two overhead in qubits and gates.It combines two copies of a noisy output state to measure observables on a transformed state.
  • Logical-level mitigation: Logical-level mitigation may enable about 2,000-T-gate Clifford+T circuits with 99.9% physical gate fidelity and 1,000 circuit executions.This exceeds the roughly 50-T-gate limit cited for existing classical simulation algorithms.

C. Circuit Knitting

Circuit knitting addresses limited qubit counts and connectivity by decomposing large circuits into smaller QPU-executable pieces and combining their results. Its central trade-off is exponential sampling overhead tied to the cut structure or entanglement.

  • Overview: Circuit knitting simulates small quantum circuits on a QPU and stitches their results into an estimate for a larger circuit.The techniques target algorithms that estimate expected values of observables.
  • Circuit cutting: Circuit cutting represents a large circuit as a weighted sum of isolated sub-circuits that can run separately on small QPUs.The sampling overhead grows exponentially with the number of cut two-qubit gates or qubit wires.
  • Entanglement forging: Entanglement forging decomposes an entangled variational state into product states or converts register entanglement into time-like correlations within one register.Its overhead typically scales exponentially with the entanglement across the selected partition.
  • Embedding methods: Embedding methods decompose large many-body simulations into smaller QPU-simulated subsystems and model their interactions through an effective classical or quantum bath.A classical computer performs the decomposition and optimizes the bath parameters.

D. Heuristic quantum algorithms

Heuristic quantum algorithms use shallow or variational circuits for optimization, machine learning, and simulation, including variational quantum time evolution. Their near-term promise is constrained by limited advantage guarantees, noise sensitivity, and validation challenges.

  • Algorithm classes: Heuristic quantum algorithms include kernel methods and variational quantum algorithms for optimization, machine learning, and quantum simulation.Variational algorithms adjust circuit parameters through a classical feedback loop to minimize an expected energy or cost function.
  • Limits and regime: Variational quantum algorithms have no mathematical proof of outperforming classical algorithms, while sufficiently shallow circuits with 2D or 3D connectivity can be classically simulated efficiently.Deep variational circuits, meanwhile, suffer severe noise degradation.
  • Variational time evolution: Variational quantum time evolution approximates |ψ(t)⟩ with a parameterized ansatz |φ(θ(t))⟩ whose parameters are determined using a stationary-action principle.The resulting parameter dynamics are represented by a first-order differential equation, with matrix entries estimable on a quantum computer.
  • Variational time evolution: VarQTE targets classically hard time-evolution instances using near-term noisy QPUs as an alternative to circuit constructions whose size scales with space-time volume.The approach uses a fixed gate layout and time-dependent variational parameters.
  • Validation: Heuristic algorithms lack rigorous performance guarantees, making validation especially difficult when classical verification becomes impractical for large instances.A McLachlan-based VarQTE version provides efficiently computable bounds on distance from the exact evolved state.

E. Summary

Near-term quantum advantage is framed around three guidelines: target problems with super-polynomial speedups, improve error correction beyond surface-code limitations, and explore cheaper heuristic algorithms.

  • Problems admitting exponential or super-polynomial quantum speedups offer the strongest prospect for quantum advantage.Even without a near-term formal proof, their existence suggests that interference or entanglement may benefit the computation.
  • Large-scale quantum algorithms still depend on quantum error-correcting codes, but surface-code approaches have poor encoding rates and costly logical non-Clifford gates.The paper points to quantum LDPC codes and qubit connectivity beyond a 2D lattice as possible directions.
  • Less expensive heuristic versions of quantum algorithms may enable near-term advantage despite lacking rigorous performance guarantees.Such algorithms may certify solution quality a posteriori and address problems that classical simulation cannot handle.
  • These guidelines are intended to guide important demonstrations of quantum computing benefits for scientifically important problems in the next few years.

III. THE PATH TO LARGE QUANTUM SYSTEMS

Scaling superconducting quantum systems requires a hardware path from small heuristic circuits to error-corrected computers, while addressing manufacturing, testing, reliability, control, and process-cycle challenges.

  • The path to large quantum systems: Near-term advantage is expected to combine error mitigation, circuit knitting, and heuristic algorithms before progressing toward partially and fully error-corrected systems.The path requires more high-fidelity qubits and tight integration with fast classical computation for circuit execution and error-correction overhead.
  • The path to large quantum systems: Breaking the plane, control-electronics cost, I/O space, and software quality have constrained QPU size, although direct scaling barriers have demonstrated solutions.
  • The path to large quantum systems: Higher-fidelity, larger QPUs require reliable integration of multiple technologies, creating challenges in reliability, predictability, manufacturability, and innovation-cycle speed.
  • The path to large quantum systems: Months-long fabrication for advanced QPUs contrasts with days for simple transmons and weeks for early 5- and 16-qubit systems.Advanced packaging can involve dozens of lithography steps and slow process steps.
  • The path to large quantum systems: Failure modes often emerge only below 100 mK, making in-line testing a severe bottleneck for scaled systems.Room-temperature correlations can help predict some low-temperature performance metrics, but establishing them requires measurements across hundreds or thousands of devices.
  • The path to large quantum systems: Materials research needs sufficient statistics, documented process splits, and publication of neutral or negative results to support reliable progress.Simplified test vehicles can accelerate processing, but isolating the steps that improve coherence remains nontrivial.
  • The path to large quantum systems: Three- and four-qubit demonstrations are no longer technically or financially difficult; larger-QPU research must move beyond isolated two-qubit experiments.
  • The path to large quantum systems: Combining long-cycle complex devices with short-cycle test vehicles supports continued QPU-quality improvements, while reducing long manufacturing cycles remains necessary.Repeatedly building the same QPU can help resolve manufacturing problems and accelerate innovation cycles.

B. Supporting Hardware

Supporting hardware must scale the cryogenic I/O chain and control system while preserving flexibility through standardized interfaces and shared sequencing infrastructure.

  • Scaling QPUs requires scaling classical control hardware and the high-volume I/O chain entering and leaving the cryostat.The chain includes isolators, amplifiers, signal-delivery systems, and quantum-limited amplifiers.
  • Standardized interfaces can preserve flexibility by allowing components such as 4K cooling technologies to change without redesigning the entire refrigeration infrastructure.
  • Although analog front ends are unlikely to be shared across different quantum-computing platforms, all platforms need low-cost, low-power sequencing logic.The sequencing logic includes branching, conditionals, and looping and may be implemented in an ASIC.
  • A common control platform with customized analog front ends can reduce costs as systems scale to thousands of qubits and beyond.Open-specification protocols such as OpenQASM3 are supporting this transformation.

C. Classical parallelization of quantum processors

Near-term quantum advantage can use multiple QPUs for parallel circuit execution, with classical communication connecting workloads when needed.

  • Circuit knitting and error mitigation stretch QPU capabilities by trading additional circuit executions for emulated qubits or higher fidelities.
  • These workloads can run independently across multiple QPUs or benefit from classical communication between circuits spanning QPUs.

D. Modularity

Modularity is presented as the architecture for scaling quantum systems from near-term advantage toward long-term error-corrected machines. The paper describes multiple connectivity levels, classical parallelization, and replaceable modules, while leaving optimal module sizes open.

  • Near-term and scalable modularity: Modular quantum systems use replaceable unit cells connected by quantum links to simplify QPU design and enable scaling.The links can entangle unit cells or perform remote gates.
  • Near-term and scalable modularity: Near-term dense modularity connects adjacent chips with high-bandwidth, high-fidelity links because limited error correction leaves insufficient time for entanglement distillation.The links effectively extend the chip and must be short, low-loss, and low-cross-talk.
  • Engineering constraints: Dense modularity creates classical I/O and cooling bottlenecks, motivating high-density connectors, multiplexing, and longer-term connectivity improvements.On-chip non-local couplers are intended to enable high-rate LDPC codes.
  • Connectivity levels: The total system size n incorporates QPUs made from m chips, quantum channels l and t, and p classical parallelizations supporting tasks such as circuit cutting and error mitigation.Each QPU has q × m qubits, while l includes microwave and t optical connections.
  • Connectivity levels: A scalable system combines dense chip-to-chip extension, intra-refrigerator sparse connections, on-chip non-local couplers, long-range quantum networking, and classical parallelization.The figure distinguishes short-range m, longer-range l, on-chip c, and optical t connectivity.
  • Engineering constraints: The optimal characteristic size of each modularity level remains an open question, even though modularity is expected to support scalable systems.The paper also describes modular classical control and refrigeration as useful for subsystem testing, replacement, and assembly.

IV. THE QUANTUM STACK

The quantum stack spans hardware-dependent circuit execution, quantum runtimes, quantum-serverless workflows, and user applications. Its goal is to integrate quantum and classical computation while progressively hiding hardware-level complexity from developers.

  • Architecture: Quantum computing is framed as part of a quantum-centric supercomputer in which QPUs, CPUs, and GPUs work together.The architecture is a cluster of quantum computational nodes coupled to classical orchestration rather than a monolithic system.
  • Circuit abstraction: A quantum circuit includes ordered quantum gates, measurements, and resets that may be conditioned on concurrent real-time classical computation.Conditioned operations are called dynamic circuits.
  • Circuit abstraction: Circuits are represented from unitary blocks through standard decompositions and parameterized physical circuits to scheduled circuits specifying hardware timing and control details.The levels progressively expose universal gates, supported physical gates, calibrations, and pulse shapes.
  • Software stack: The four software layers are dynamic circuits, quantum runtime, quantum serverless, and software applications, each targeting a different execution abstraction.The runtime integrates classical and quantum computation and supports error mitigation or correction.
  • Software stack: Quantum runtimes provide sampler and estimator primitives for collecting circuit samples and calculating expectation values.The sampler reconstructs output quasi-probability distributions, while the estimator evaluates observables.
  • Software stack: Quantum-serverless workflows combine quantum primitive programs with classical partitioning, compiling, optimization, and infrastructure managed through the cloud.This supports circuit knitting and lets developers focus on code rather than classical infrastructure.
  • Developer roles: The stack serves kernel, algorithm, and model developers, ranging from hardware-quality execution and error handling to heuristic algorithms and domain applications.Higher layers increase abstraction and reach while lower layers remain closer to hardware.

V. CONCLUSION

The paper outlines near-, mid-, and long-term paths toward quantum advantage and fault-tolerant quantum computing. These paths combine algorithmic, hardware, error-mitigation, error-correction, and architectural advances.

  • Near-term future: Near-term quantum advantage may come from heuristic algorithms, error mitigation, higher-fidelity QPUs, and modular architectures for parallel execution.The paper targets QPU fidelities of 99.99% or higher and highlights mathematically guaranteed error mitigation such as PEC, despite its exponential classical cost.
  • Mid-term future: Improved quantum-system quality and speed can reduce the exponential classical cost of error mitigation while error mitigation and correction gradually approach fault tolerance.
  • Long-term future: Large-scale quantum algorithms with polynomial run times require quantum error correction, but surface codes are inefficient for non-Clifford gates and have poor encoding rates.
  • Long-term future: More efficient LDPC codes with high error thresholds and modular hardware supporting non-2D topologies are proposed as a path toward long-term quantum computing.
Loading 2209.06841v2…