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SimuQ: A Framework for Programming Quantum Hamiltonian Simulation with Analog Compilation

Yuxiang Peng, Jacob Young, Pengyu Liu, Xiaodi Wu

arXiv:2303.02775v3cs.PLquant-ph

TL;DR

Programming analog quantum simulators lacks a unified interface and can require device-specific expertise. SimuQ combines Hamiltonian modeling, a hardware-provider description of analog instructions, and solver-based compilation to produce pulse schedules. The framework is demonstrated across heterogeneous devices, while compilation remains computationally hard in general.

  • Problem

    Programming analog quantum simulators lacks a unified interface, and existing Hamiltonian-oriented approaches manually construct device-specific configurations that are tedious, error-prone, and hardware-knowledge-intensive.

    Source: §1.1 · p. 4

  • Method

    SimuQ combines HML for target systems, AAIS descriptions of device programmability, and solver-based compilation into pulse schedules.

    Source: §3.1 · p. 12, §4 · p. 15, §6 · p. 27

  • Results

    SimuQ is reported to compile quantum systems with bounded errors and to efficiently compile and execute pulses for various applications on real devices.

    Source: §1.3 · p. 6, §4.5 · p. 23

  • Takeaways & Limitations

    The framework provides a feasibility demonstration of programming and compiling Hamiltonian simulations across heterogeneous analog quantum simulators.

    Source: §6 · p. 27

    Compilation is generally computationally hard, and pathological coefficient functions can complicate equation solving; the proposed solutions may not be optimal.

    Source: §4.1.4 · p. 19

Abstract

from arXiv · show

Quantum Hamiltonian simulation, which simulates the evolution of quantum systems and probes quantum phenomena, is one of the most promising applications of quantum computing. Recent experimental results suggest that Hamiltonian-oriented analog quantum simulation would be advantageous over circuit-oriented digital quantum simulation in the Noisy Intermediate-Scale Quantum (NISQ) machine era. However, programming analog quantum simulators is much more challenging due to the lack of a unified interface between hardware and software. In this paper, we design and implement SimuQ, the first framework for quantum Hamiltonian simulation that supports Hamiltonian programming and pulse-level compilation to heterogeneous analog quantum simulators. Specifically, in SimuQ, front-end users specify the target quantum system with Hamiltonian Modeling Language, and the Hamiltonian-level programmability of analog quantum simulators is specified through a new abstraction called the abstract analog instruction set (AAIS) and programmed in AAIS Specification Language by hardware providers. Through a solver-based compilation, SimuQ generates executable pulse schedules for real devices to simulate the evolution of desired quantum systems, which is demonstrated on superconducting (IBM), neutral-atom (QuEra), and trapped-ion (IonQ) quantum devices. Moreover, we demonstrate the advantages of exposing the Hamiltonian-level programmability of devices with native operations or interaction-based gates and establish a small benchmark of quantum simulation to evaluate SimuQ's compiler with the above analog quantum simulators.

1 INTRODUCTION

Hamiltonian-oriented simulation can avoid circuit-level overhead, but programming analog simulators remains difficult without scalable modeling, portable device abstractions, and automatic compilation. SimuQ addresses these challenges with HML, AAIS/AAIS-SL, and a compiler for heterogeneous platforms.

1.1 Background and Motivation

  • Hamiltonian programming simulates interactions natively, and an IBM example schedules two cross-resonance pulses in 280 ns versus 1660 ns for a circuit-oriented scheme.The circuit uses four CNOT gates, each requiring 264 ns, plus single-qubit gates; shorter schedules are desirable given IBM devices’ roughly 100-microsecond coherence time.Source: §1.1 · pp. 3–4
  • Prior Hamiltonian-oriented work manually configured devices, while circuit-oriented programming can require around 10^10 gates for a roughly 100-qubit system.Manual configuration is described as tedious, error-prone, and hardware-knowledge-intensive; such circuits exceed near-term devices’ few-thousand-gate capacity.Source: §1.1 · pp. 3–4

1.2 Challenges

  • Compilation must address scalable system modeling, portable abstractions for platform-specific continuous-time controls, and automatic pulse synthesis under hardware constraints.Existing modeling approaches can require exponentially large matrices or manual site encodings, while analog platforms and even devices differ in their available Hamiltonians and pulse restrictions.Source: §1.2 · pp. 4–5

1.3 Contributions

  • HML uses symbolic, site-based Hamiltonian expressions, while AAIS and AAIS-SL let hardware providers describe parameterized analog instructions and device programmability.AAIS unifies functionality descriptions across technologies and can inform theorists which Hamiltonian-oriented algorithms are realizable on near-term devices.Source: §1.3 · pp. 5–6
  • The paper reports that Hamiltonian-level control can shorten pulse duration and improve robustness to device decoherence errors.The reported benchmark also finds that many important quantum systems have short HML programs.Source: §1.3 · pp. 5–6
  • SimuQ’s compiler translates instruction executions into device-specific executable pulses, and generated pulses are reported as executed on real devices.The framework is presented as a feasibility demonstration for compilation across heterogeneous analog simulators, enabling transport of simulation experiments between platforms.Source: §1.3 · p. 6

2 RUNNING EXAMPLE

The running example uses a three-qubit Ising evolution to show how SimuQ models a target system, describes an ideal Rydberg device, and compiles between them. The example moves from quantum preliminaries and device configuration to solver-based synthesis.

2.1 Quantum Preliminaries

  • An n-qubit system evolves under a time-dependent Hamiltonian, with its unitary evolution mapping the initial state to the state at time t.Source: §2.1 · pp. 7–8

2.2 Quantum Simulation of Ising Model

  • The example targets a 3-qubit Ising evolution on an ideal Rydberg array; matching Hamiltonian terms by hand requires compensating unwanted interactions.Source: §2.2 · p. 9

2.3 Automated Compilation by SimuQ

  • −0.016 Z1Z3 is the reported error term after SimuQ's approximate Rydberg synthesis; the identity offset has no measurable effect on the evolved state.The solver's solution specifies atom positions and laser settings, which can be translated into a Bloqade or Braket program.Source: §2.2 · p. 9, §2.3 · p. 11
  • Users encode the Ising evolution in HML, while the Rydberg AAIS models laser instructions and inherent atom interactions as contributions to the device Hamiltonian.Source: §2.3 · pp. 9–10

3 DOMAIN-SPECIFIC LANGUAGES

SimuQ pairs a user-facing language for target Hamiltonians with a hardware-facing language for analog-device programmability. Its device-specific AAIS designs make that programmability concrete across Rydberg, trapped-ion, and superconducting platforms.

3.1 Hamiltonian Modeling Language

  • HML describes quantum systems through sites and Hamiltonians, and represents an evolution as sequential time-independent Hamiltonian segments.Its denotational semantics maps each segment to a unitary; continuous-time Hamiltonians are discretized, with approximation error reducible by increasing the discretization number.Source: §3.1 · pp. 12–13

3.2.1 Abstract Analog Instruction Set.

  • An AAIS characterizes an analog simulator through instruction Hamiltonians and a system Hamiltonian, exposing its Hamiltonian-level programmability.Instructions have configurable local parameters; global parameters configure the always-on system Hamiltonian before execution.Source: §3.2.1 · pp. 13–14

3.2.2 AAIS Specification Language.

  • AAIS-SL lets hardware providers specify device instructions and system Hamiltonians as parameterized Hermitian matrices using local and global variables.The language has a Python implementation and formal syntax and denotational semantics.Source: §3.2.2 · pp. 14–15

3.2.3 Examples of AAIS.

  • The AAIS abstraction balances expressiveness against implementation difficulty, with designs shown for QuEra, IonQ, and IBM devices.The global Rydberg variant reflects QuEra's lack of local laser addressing; Heisenberg variants model IonQ and IBM interactions, while IBM-native instructions offer shorter pulses for the few systems they can directly simulate.Source: §3.2.3 · p. 15

4 INTERMEDIATE REPRESENTATIONS AND COMPILATION

SimuQ addresses the computational difficulty of compiling quantum simulation for general analog simulators with a compiler and novel intermediate representations. Its workflow decomposes compilation into subproblems, while further optimization is left for future work.

4 INTERMEDIATE REPRESENTATIONS AND COMPILATION

  • Compiling target systems to general analog quantum simulators is computationally hard, motivating a compiler with novel intermediate representations.The workflow decomposes the problem into natural subproblems and applies straightforward solutions; optimizing it further is left for future work.Source: §4 · pp. 15–16

4.1 Instruction Schedules and Hamiltonian Synthesizer

Instruction schedules represent simultaneous device instructions over successive time segments, while the Hamiltonian synthesizer searches for a layout and instruction schedule that approximates a target system’s evolution. It builds and solves coefficient equations, repeating with new layouts when needed.

4.1.1 Instruction Schedules.

  • Instruction executions specify an AAIS instruction, its local-variable values, and a time interval during which its Hamiltonian acts on the device.An instruction schedule combines these executions with global-variable values to govern device evolution over time.Source: §4.1.1 · p. 16

4.1.2 Quantum Simulation by Executing Instruction Schedules.

  • A layout maps target-system sites injectively to device sites, and simulation requires the schedule’s unitary to approximate the target evolution mapped into that layout.The compiler seeks both the layout and instruction schedule.Source: §4.1.1 · p. 16, §4.1.2 · p. 17

4.1.3 Hamiltonian Synthesizer.

  • The synthesizer iterates over proposed site layouts, builds a coefficient equation system, and solves it for an instruction schedule, repeating until success or timeout.An accepted solution must satisfy the predefined error tolerance.Source: §4.1.3 · pp. 17, 19
  • The layout proposer prunes a search branch when a target product Hamiltonian has no matching nonzero expression in the device AAIS or system Hamiltonian.If all layouts fail feasibility checks, compilation reports no solution.Source: §4.1.3 · p. 17
  • The coefficient builder creates binary instruction-selection variables, local and global parameter variables, and positive time variables, then matches product-Hamiltonian coefficients.The equation system is mixed-binary and nonlinear; its left side sums device-instruction and system-Hamiltonian effects, while its right side gives the target coefficient.Source: §4.1.3 · p. 17
  • The equation builder enumerates product Hamiltonians with nonzero target or device-system coefficients to avoid generating the many trivial zero-equals-zero equations.It adds product Hamiltonians appearing in instruction Hamiltonians when they are absent from the initial set.Source: §4.1.3 · pp. 17–18
  • The nonlinear mixed-binary system can be solved with dReal or a relaxed least-squares method that rounds indicator variables and then refines the solution.dReal performs well for near-linear coefficient expressions but poorly for highly nonlinear ones; the least-squares method uses a tolerance-based rounding criterion.Source: §4.1.3 · p. 18

4.1.4 Error Induced by Hamiltonian Synthesizer.

  • The synthesizer’s evolution error is bounded by the equation-solving tolerance, but layout search can be NP-hard and pathological AAIS coefficient functions can complicate solving.The authors describe their solutions as feasible and efficient enough for most cases, though not necessarily optimal.Source: §4.1.4 · p. 19

4.2 Block Schedules and Conflict Resolver

Block schedules represent execution constraints that instruction schedules omit, and a conflict resolver groups incompatible instructions and uses Trotterization to produce executable blocks. Increasing the Trotterization number can reduce idealized error but increases instruction executions.

4.2 Block Schedules and Conflict Resolver

  • Instruction schedules omit simultaneous-execution conflicts and implementation-time overruns, so the resolver converts them into block schedules with executable, conflict-free groups.On IonQ, for example, XX and ZZ instructions using the same interaction process with different bases cannot run simultaneously.Source: §4.2 · p. 19, §4.2.1 · p. 19

4.2.1 Block Schedules.

  • A block schedule is a directed acyclic temporal graph whose vertices group instruction executions and whose edges constrain when later blocks start.Instruction schedules are the special case in which the graph is a chain.Source: §4.2.1 · p. 19

4.2.2 Instruction Decorations.

  • Instruction conflicts are encoded by a graph, with shared signal lines and overlapping support for derived instructions providing concrete conflict rules.Native IBM cross-resonance instructions can run together, whereas derived ZZ instructions conflict with instructions applied on either participating site.Source: §4.2.2 · pp. 19–20

4.2.3 Conflict Resolver via Trotterization.

  • The resolver greedily colors the conflict graph into compatible groups and repeats their sequential evolution using Trotterization to approximate the original simultaneous evolution.When the system Hamiltonian is nonzero, the method assumes it can be scaled by the maximal group count; some devices may not support this, though the case is rarely used.Source: §4.2.3 · p. 20

4.2.4 Error Induced by Conflict Resolver.

  • In ideal cases, increasing the Trotterization number reduces induced error arbitrarily, but also increases instruction executions and their device-error accumulation.The user specifies the number based on real-time device parameters.Source: §4.2.4 · p. 21

4.3 Signal Line Schedules and Scheduler

A signal line schedule records instruction executions with absolute start and end times for each signal line. The scheduler derives an execution order from the block graph and places instructions at the earliest permitted times.

4.3 Signal Line Schedules and Scheduler

  • A signal line schedule lists each line’s instruction executions with absolute start and end times, linking abstract instructions to concrete signal carriers.Each listed execution must use the signal line assigned to its instruction.Source: §4.3 · p. 21
  • The scheduler topologically sorts the block graph, uses first-arrive-first-serve per signal line, and schedules each execution at its earliest allowed start using device timing information.The scheduling process can be configured differently to seek reduced cross-talk or small implementation savings, but those optimizations are left for future work.Source: §4.3 · p. 21

4.4 Pulse Schedules and Pulse Translator

SimuQ translates signal-line executions into platform-specific pulse schedules or device programs. The translation and execution-error analysis span IBM, QuEra, and IonQ, with a bound that assumes faithful instruction implementation.

4.4 Pulse Schedules and Pulse Translator

  • The pulse translator converts signal-line schedules into pulse schedules using hardware providers’ languages and APIs, substituting configured pulse shapes for instruction executions.A pulse schedule’s signal-line pulses physically generate the effective Hamiltonian for the corresponding execution interval.Source: §4.4 · p. 21, §4.4.1 · p. 22

4.4.1 Translation to Hardware APIs.

  • SimuQ supports QuEra Bloqade and Braket programs, IBM Qiskit Pulse programs, and IonQ cloud or Qiskit circuit programs.QuEra schedules are scaled to around 3.5 ms to fit the device’s 4 ms duration limit; IonQ lacks pulse-level programmability, so SimuQ uses its native gate set.Source: §4.4.1 · pp. 21–22

4.4.2 Semantics of Pulse Schedules and Errors in Instruction Implementation.

  • The implementation-error bound assumes device Hamiltonians stay within threshold Δ of their intended values, and faithful instruction implementations yield negligible translator error.The stated bound also depends on the number of signal lines and system Hamiltonians and the conflict resolver’s maximal group count.Source: §4.4.2 · p. 22

4.5 Semantics Preservation of SimuQ Compiler

The compiler's semantics-preservation result bounds the difference between target-system evolution and execution of the generated pulse schedule when compilation succeeds. Compiler parameters can be tuned to reduce its errors arbitrarily.

4.5 Semantics Preservation of SimuQ Compiler

  • When compilation succeeds, SimuQ generates a site layout and executable pulse schedule whose evolution approximately preserves the target Hamiltonian's semantics.The theorem compares the target evolution over [0,T] with the evolution produced by executing the schedule.Source: §4.5 · p. 23
  • Tuning D, ε, and R and reducing δ can make errors induced by the SimuQ compiler arbitrarily small.The stated error bound also depends on evolution time, discretization, implementation thresholds, signal lines, system Hamiltonians, and the Trotterization strategy.Source: §4.5 · p. 23

5 CASE STUDIES

The case studies assess SimuQ's portability and compilation advantages across heterogeneous devices, including native-instruction and interaction-based approaches. They also benchmark programming and compilation across a range of quantum simulation problems.

5 CASE STUDIES

  • The case studies cover portability, native instructions, interaction-based gates, and a small multi-domain benchmark of SimuQ's compiler.The QAOA experiments compile and execute cases p=1, 2, and 3 on IBM and IonQ devices.Source: §5 · p. 23, §5.3 · pp. 25–26, §5.4 · p. 26

5.1 Multiple-Platform Compatability

  • The multiple-platform Ising experiments use a six-site cycle and chain evolved for T=1, with Trotterization number 4 when applicable.Errors are evaluated using total variation distance between measured and ground-truth bit-string distributions; ideal errors arise from uncancellable non-neighboring ZZ interactions and short Rydberg ramp times or from Heisenberg-AAIS Trotterization.Source: §5.1 · p. 23
  • SimuQ compiles a six-site cycle for QuEra and both cycle and chain models for IonQ, while IBM supports the chain; executions on real devices show higher errors than noiseless simulations.The six-site chain is unsupported on QuEra because it requires site-specific detunings, and IBM lacks a six-vertex cycle layout.Source: §5.1 · pp. 23–24, Figure 11 · p. 24

5.2 Hamiltonian-Oriented Compilation with Native Instructions

  • For the three-site H2ZX system, SimuQ's IBM-native pulse schedule is about 280 ns, versus about 1660 ns for Qiskit's circuit-based schedule.SimuQ realizes the two interactions with simultaneous cross-resonance pulses and compensates other terms; the remaining ZZ interactions are reduced by selecting a relatively large Ω.Source: §5.2 · p. 24, Figure 12 · p. 25, Figure 13 · p. 25

5.3 Hamiltonian-Oriented Compilation with Interaction-based Gates

  • At t=1, an interaction-based ZZ implementation takes 324 ns, 51% shorter than Qiskit's constant 662 ns schedule.Its duration scales as approximately (200t + 130) ns, making this approach especially useful for many short instructions, such as simulations with large Trotterization numbers.Source: §5.3 · pp. 25–26, Figure 14 · p. 25, Figure 15 · p. 25
  • For QAOA with p=3, SimuQ reduces simulation errors by 34% on IBM and 28% on IonQ, while its IBM schedules average 59% shorter than Qiskit's.For the IBM p=3 case, SimuQ's schedule is 3.35 ms versus 7.48 ms for Qiskit; the error advantage is less significant at p=1,2 because of state-preparation and measurement errors.Source: Table 2 · p. 25, §5.3 · p. 26

5.4 Benchmarking Quantum Simulation Compilation

  • Most benchmark systems are programmed in fewer than 20 lines of HML across models with varied domains, topologies, time dependencies, and sizes.The benchmark records compilation time, pulse duration, and two-qubit gate counts; hardware constraints yield no-solution cases and a 64-qubit IBM cycle times out after an hour.Source: §5.4 · p. 26, Table 3 · p. 27
  • 29.3 times longer: Qiskit's default passes generate IBM pulse schedules than SimuQ on average across successfully compiled benchmark cases.IonQ pulse durations are not reported; its benchmark instead records partially entangling Mølmer-Sørenson gate counts.Source: §5.4 · pp. 26–27, Table 3 · p. 27

6 CONCLUSION AND FUTURE DIRECTIONS

SimuQ combines Hamiltonian Modeling Language, abstract analog instruction sets, and pulse-schedule compilation for heterogeneous analog simulators. The authors identify substantial compiler optimization opportunities following this feasibility demonstration.

6 CONCLUSION AND FUTURE DIRECTIONS

  • SimuQ combines HML for describing target systems, AAIS and AAIS-SL for specifying device programmability, and compilation to generate analog-device pulse schedules.The paper presents this as the first framework for quantum simulation and compilation across multiple analog-simulator platforms.Source: §6 · p. 27
  • As a first feasibility demonstration, SimuQ leaves compiler optimization opportunities in platform-specific passes, site-layout search, the equation solver, AAIS design, and Hamiltonian synthesis.The current layout search uses brute-force search with heuristics; the authors also propose pruning techniques and solver optimization.Source: §6 · p. 27

A DETAILS OF THE EQUATION SYSTEM IN RUNNING EXAMPLE

The displayed equation system gives three site-indexed expressions labeled Z1, Z2, and Z3. The excerpts do not state further interpretation of these equations.

A DETAILS OF THE EQUATION SYSTEM IN RUNNING EXAMPLE

B OPTIMIZATION IN TROTTERIZATION

The paper implements two Trotterization optimizations to manage conflicts between Hamiltonian blocks. It notes that large Trotterization numbers reduce approximation error but amplify device noise.

B OPTIMIZATION IN TROTTERIZATION

  • Large Trotterization numbers reduce approximation error but amplify device noise, motivating further optimization.The paper presents two techniques as a demonstration and leaves further optimizations for future work.Source: B OPTIMIZATION IN TROTTERIZATION · p. 32
  • Reordering blocks within a Trotterization step can exploit the freedom allowed by the error bound in [Childs et al. 2018].The method places blocks in one step in parallel in the temporal graph and connects them to blocks in the next step.Source: B OPTIMIZATION IN TROTTERIZATION · p. 32
  • Commuting blocks can be evolved first and separated from the remaining blocks without introducing errors.The remaining conflicts are then resolved among the other blocks.Source: B OPTIMIZATION IN TROTTERIZATION · p. 32

C BENCHMARK DETAILS

The benchmark uses a fixed evolution interval and selected discretization settings, and spans spin models, optimization algorithms, and other quantum-system simulations. The passages describe example task definitions and the benchmark configuration rather than comparative results.

C BENCHMARK DETAILS

  • The benchmark uses evolution time t ∈ [0, 1), T = 1, and sets Trotterization number R = 4 and time-dependent Hamiltonian discretization number D = 10.The authors describe R = 4 as an empirical balance between Trotterization error and device noise.Source: C BENCHMARK DETAILS · pp. 32–33
  • The benchmark includes transverse-field Ising chain and cycle models, plus QAOA for Max-Cut on an n-site cycle.The QAOA initial state |+⟩⊗n is realized by evolving under H0; measurements approximate a maximal cut.Source: C BENCHMARK DETAILS · p. 33
  • QHD is described as finding the minimal point of f(x,y) in [0,1]^2; the setup sets q=8, uses f=−x^2+y^2+xy, and represents x and y with two q-bit quantum registers.Source: C BENCHMARK DETAILS · p. 33
  • Other listed systems include maximum-independent-set simulations and models for lattice gauge theory and the (1+1D) O(3) nonlinear sigma model.The passages identify Schwinger as a lattice-gauge-theory model and o3nlσm as a simulation on n × m sites.Source: C BENCHMARK DETAILS · p. 34

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