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Roadmapping the Next Generation of Silicon Photonics
Sudip Shekhar, Wim Bogaerts, Lukas Chrostowski, John E. Bowers, Michael Hochberg, Richard Soref, Bhavin J. Shastri
TL;DR
The paper addresses how silicon photonics can overcome density, modulator, light-source, integration, packaging, and ecosystem challenges as applications expand beyond current transceivers. It examines integration and scaling options and concludes that multiple integration strategies, foundry capabilities, and design-flow advances will coexist as silicon photonics broadens into new products and applications.
Problem
Increasing photonic-chip density is constrained by waveguide spacing, modulator trade-offs, silicon’s indirect bandgap, and integration and ecosystem challenges.
Method
The paper evaluates heterogeneous, 2.5D, and other photonics–electronics integration approaches, including wafer-scale III-V integration and separately optimized PIC and EIC chips.
Results
The authors expect hybrid, heterogeneous, and monolithic integration to coexist while integrated lasers, SiN layers, inverse-designed components, and improved fiber coupling advance silicon-photonics scaling.
Takeaways & Limitations
Greater photonics–electronics codesign, EDA integration, configurability, and programmability are expected to broaden silicon photonics beyond pluggable transceivers into commercial CPO, xPU, sensing, and other systems.
Takeaways & Limitations
Silicon-photonic gyroscopes still require ultra-low-loss waveguides, reduced reflection-induced bias drift, and low noise to compete with fiber-optic counterparts.
Abstract
from arXiv · showhide
Silicon photonics has developed into a mainstream technology driven by advances in optical communications. The current generation has led to a proliferation of integrated photonic devices from thousands to millions - mainly in the form of communication transceivers for data centers. Products in many exciting applications, such as sensing and computing, are around the corner. What will it take to increase the proliferation of silicon photonics from millions to billions of units shipped? What will the next generation of silicon photonics look like? What are the common threads in the integration and fabrication bottlenecks that silicon photonic applications face, and which emerging technologies can solve them? This perspective article is an attempt to answer such questions. We chart the generational trends in silicon photonics technology, drawing parallels from the generational definitions of CMOS technology. We identify the crucial challenges that must be solved to make giant strides in CMOS-foundry-compatible devices, circuits, integration, and packaging. We identify challenges critical to the next generation of systems and applications - in communication, signal processing, and sensing. By identifying and summarizing such challenges and opportunities, we aim to stimulate further research on devices, circuits, and systems for the silicon photonics ecosystem.
1 The Generational Roadmap
Silicon photonics progressed from small-scale circuits with 1–10 components to medium-scale circuits with 10–500 components, alongside advances in modulators, photodetectors, lasers, and transceivers. The roadmap links increasing component counts and high-speed modulator counts to progressively more challenging scaling.
- Roadmap trends: Scaling becomes more challenging as the number of high-speed modulators increases, while heterogeneous silicon photonics trails hybrid integration by approximately two years.
- SSI: 1985–1992 established silicon PICs and low-loss thick-SOI waveguides, followed by demonstrations of optical devices, modulators, photodetectors, and heterogeneous III-V lasers.These developments marked the transition into small-scale integration with 1–10 components per PIC.
- SSI: 1–10 components per PIC defined the SSI era, including high-speed pn junction modulators, photodetectors, and heterogeneous III-V laser integration.
- MSI: 10–500 components per PIC defined the MSI era, enabling commercial MZM and MRM IMDD transceivers and demonstrating coherent transceiver platforms.The applications included single- and multi-wavelength data-center transceivers, with MRM designs showing multiplexing and energy-efficiency benefits.
2 Silicon Photonics: Technology Perspective
Next-generation silicon photonics must improve density, modulation, integration, packaging, and system-level performance while remaining compatible with commercial CMOS foundries. Key bottlenecks include waveguide and RF spacing, modulator tradeoffs, material integration, laser attachment, phase-shifter power, and low-loss delay lines.
- Technology Perspective: CMOS-inspired additions to silicon photonics target improved power, performance, and area (PPA) as the field progresses toward LSI and VLSI integration.Silicon photonics foundries can adopt innovations from CMOS processes, whose development budgets and markets are much larger.
- Technology Perspective: Density is limited mainly by waveguide and RF crosstalk spacing rather than device dimensions, requiring systems-level simulation and multiphysics modeling.Waveguide spacing exceeds the physical waveguide width, while RF active elements can require hundreds of microns of separation.
- High-Speed Modulators: The ideal silicon modulator combines small length, low Vπ, low propagation loss and insertion loss, high linearity, and large E/O bandwidth.A phase-shifter form is preferred for applications using higher-order coherent modulation formats.
- High-Speed Modulators: Emerging modulator materials offer attractive performance but face foundry, reliability, thermal, contamination, or integration constraints.GeSi modulators have band-dependent bandwidth or insertion-loss limitations; SOH and POH require poling and hermetic sealing, while Pockels materials challenge CMOS integration.
- Integration: Direct and heterogeneous bonding can improve optical coupling and heat transport, but require smooth clean surfaces, constrained annealing, yield optimization, and compatibility with other processes.InP/Si modulators remain promising, but their efficiency and bandwidth need substantial improvement for broad commercial adoption.
- Phase-Shifters for tuning and switching: Low-speed phase shifters are important because light may traverse many of them, yet thermal devices consume power, generate crosstalk, and limit LSI/VLSI scaling.Thermal insulation can reduce power by more than 10× at the cost of slower response, while folded heaters can improve efficiency but introduce insertion loss.
- Laser Integration: Silicon’s indirect bandgap requires alternative light-source integration, with hybrid and heterogeneous approaches offering scalable paths beyond conventional fiber-attached lasers.Heterogeneous integration has achieved high-volume manufacturing above one million units per year, while hybrid integration co-packages pre-tested III-V lasers with silicon photonics.
- Systems and Applications: Several applications need tunable, broadband delays of hundreds of picoseconds to nanoseconds, but realizing them with low loss and low area remains challenging.Examples include microwave photonics, optical phase-locked loops, frequency discriminators, linewidth-reduction circuits, optical phased arrays, OCT, and gyroscopes.
3 Silicon Photonics: Systems Perspective
Silicon photonics systems depend on close photonic–electronic co-design, but their ecosystem remains less standardized and lower-yield than CMOS. Integration and packaging choices therefore balance performance, cost, testing, process maturity, and application requirements.
- Photonics–electronics interplay: Electronic ICs provide electro-optic conversion, bias, control, and compensation, while photonics supplies compact high-frequency links and enables applications beyond electronics alone.The differing operating characteristics of photonics and electronics also create opportunities for co-design.
- Ecosystem comparison: CMOS scaling benefits from mature foundries, PDKs, design IP, high yields, and packaging ecosystems that let designers focus on system integration.These industry structures reduce cost and support complex designs without requiring transistor-level intervention in every project.
- Ecosystem comparison: Silicon photonics has MPW access, but mature PDKs, abstraction languages, and third-party IP remain limited while advanced processes are often kept proprietary.Academic research also remains focused mainly on device improvements rather than broader design infrastructure.
- Ecosystem comparison: Customer-specific process customization increases foundry R&D costs and can endanger wafer reliability and yield, creating pressure toward standardized processes and settled PDK ecosystems.Designers accustomed to device-level differentiation may view process changes as the easiest route to performance gains despite downstream maintenance costs.
- Ecosystem comparison: Silicon photonics product yield remains below CMOS because of fabrication and thermal sensitivity, incomplete PDK and variation-aware models, immature design flows, and process modifications.The cited challenges span process, design, and packaging levels.
4 Silicon Photonics: Applications Perspective
Silicon photonics applications face distinct technical bottlenecks across communication, computing, signal processing, and sensing. The challenges include device efficiency and linearity, scaling and control, wavelength and noise constraints, and packaging or environmental robustness.
- Communication: Communication transceivers require more efficient modulators and lasers, higher electro-optic bandwidth, efficient multi-wavelength sources, and improved photodetectors.For coherent systems, stricter linearity and reduced reliance on power-hungry DSP are additional requirements.
- Communication: Network switches need phase shifters with low power, low loss, large extinction ratio, and sufficient efficiency for large fabrics; MEMS/NOEMS are promising for slower switching.The implementation choice depends partly on the permitted switching speed.
- Quantum applications: Quantum systems require large-scale photonic components, CMOS controllers, cryo-compatible readout and modulation, low-loss WDM, and integrated single-photon source and detector arrays.Reducing receiver loss and improving detector performance can increase transmission rate.
- Computing: Photonic computing must support multi-level signaling, precise weight control, and high-speed memory to approach CMOS compute-engine accuracy without memory bottlenecks.These requirements arise from analog computation and processing in the photonic domain.
- Signal processing: Microwave photonics is constrained by stringent linearity and noise requirements for modulators, photodetectors, lasers, and TIAs when realizing high SFDR and RF net gain.The relevant noise sources include laser, PD, and TIA noise.
- Sensing: Silicon photonic gyroscopes need ultra-low-loss waveguides, suppressed reflections and bias drift, low noise, and heterogeneous integration robust to vibration.Engineering SiN waveguides has reduced loss to 0.5dB/m, but further improvement is needed.
- Sensing: Biosensing spectrometers and evanescent sensors face nonstandard wavelength, laser, stability, replicability, fluidic, mechanical, and biological-noise challenges.These constraints are especially stringent when invasive measurements raise expectations for trust.
- Sensing: Retinal swept-source OCT prototypes have poor sensitivity because of unsuitable operating wavelengths, limited laser tuning and sweep rate, reflections, safety-limited power, and optical coupling loss.Moving to 1050 nm would require SiN PICs and a tunable laser at that wavelength.
5 Summary and Conclusion
Silicon photonics has advanced from early devices to a dominant transceiver technology while remaining a technology in development. The authors anticipate broader integration, applications, ecosystem maturity, and more accessible design workflows in the next decade.
- Silicon photonics leveraged CMOS-industry materials, integration, and packaging techniques to become dominant in the transceiver space.
- Hybrid, heterogeneous, and monolithic integration are expected to support dense, configurable, and programmable LSI and VLSI implementations.These approaches are expected to coexist, with lasers, phase shifters, modulators, and electronics integrated on photonic platforms.
- Integrated lasers and SOAs are expected to expand in foundries, alongside CPO, xPU, coherent communication, FMCW LIDAR, and biosensing products.The forecast includes foundry-integrated lasers with WPE exceeding 20% and support for multi-wavelength and tunable lasers.
- Commercial ecosystems are expected to mature across design, simulation, fabless manufacturing, packaging, and testing, with shorter fabrication turnaround.
- Inverse design is expected to produce more compact, high-performance, robust waveguide blocks, while fiber-to-PIC coupling loss is projected to drop below 0.5 dB.The same techniques are also expected to improve metamaterials and metasurfaces.
- EDA-integrated photonic design and photonics-electronics codesign are expected to lower the threshold for building configurable and programmable photonic systems.
Data availability.
The paper states that data are available on reasonable request and reports author contributions and competing-interest disclosures.
- Data are available on reasonable request.
- S.S. led manuscript writing and figure creation, while all listed authors contributed to discussion, editing, or revision.
- Several authors disclosed company cofounding roles, while the remaining authors declared no competing interests.