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Yoked surface codes
Craig Gidney, Michael Newman, Peter Brooks, Cody Jones
TL;DR
Surface codes offer forgiving qubit-quality and connectivity requirements but require many physical qubits per logical qubit at a physical error rate of 10^-3. This paper concatenates them with row- and column-parity yokes, estimating performance through simplified simulations. It estimates nearly three times as many logical qubits per physical qubit as standard surface codes in the teraquop regime.
Problem
At a physical error rate of 10^-3, surface codes require 1000–2000 physical qubits per logical qubit to reach error rates low enough for classically intractable algorithms.
Source: §1 · p. 2Method
The paper concatenates surface codes with high-rate parity-check outer codes whose row and optional column checks are measured as yokes.
Source: §1 · p. 2Results
Yoked surface codes are estimated to provide nearly three times as many logical qubits per physical qubit as standard surface codes in the teraquop regime at a physical error rate of 10^-3.
Source: §6 · p. 15Takeaways & Limitations
The authors conclude that hierarchical memories like this one hold promise for reducing the cost of surface-code-based fault-tolerant quantum computers.
Source: §6 · p. 15The reported savings are based on extrapolations, and full-scale simulations are needed to verify the actual overhead saved.
Source: §6 · p. 15
Abstract
from arXiv · showhide
We nearly triple the number of logical qubits per physical qubit of surface codes in the teraquop regime by concatenating them into high-density parity check codes. These "yoked surface codes" are arrayed in a rectangular grid, with parity checks (yokes) measured along each row, and optionally along each column, using lattice surgery. Our construction assumes no additional connectivity beyond a nearest neighbor square qubit grid operating at a physical error rate of $10^{-3}$.
1 Introduction
The paper targets the surface code’s high physical-qubit requirements while retaining nearest-neighbor planar connectivity. It proposes row- and column-parity “yokes” and estimates their overhead using simplified simulations and path-counting heuristics.
1 Introduction
- At a physical error rate of 10^-3, surface codes require 1000–2000 physical qubits per logical qubit to reach error rates suitable for classically intractable algorithms.Source: §1 · p. 2
- The approach targets overhead reduction without high-fidelity long-range connections, using a higher-rate outer code concatenated with the surface code.Lattice surgery supplies mechanisms for operations between distant qubits.Source: §1 · p. 2
- Yokes are simple outer-code parity checks along rows, and optionally columns, of surface-code arrays; soft information doubles or quadruples the inner code distance.The 1D and 2D outer codes have distances two and four, respectively; spacetime tradeoffs during lattice surgery add protection against correlated errors from high-weight checks.Source: §1 · p. 2
- Gap simulation samples complementary-gap distributions to estimate surface-code failures across many rounds, reducing them to a sampled failure probability.The authors compare it with smaller circuit-level simulations, then use it in larger phenomenological outer-code simulations expected to represent full circuit-level performance.Source: §1 · p. 3
- Path-counting heuristics approximate logical error rates to identify compact layouts for different target error rates.The authors report reasonable agreement between simulation and the heuristic predictions.Source: §1 · p. 3
2 Quantum parity check codes
The paper constructs quantum parity-check codes from row and column parity checks, with block-size restrictions that ensure stabilizer commutation. The resulting 1D and square 2D families have distances two and four.
2 Quantum parity check codes
- Classical row and row-and-column parity checks extend to quantum CSS codes whose rate tends to one as block size increases.Source: §2 · p. 3
- For commutation, 1D code length must be even, while square 2D side length must be divisible by four.Permuting qubits allows the 2D Z-type checks to commute with the X-type checks.Source: §2 · p. 3
- The r-dimensional construction has distance 2r, with minimum-weight logical operators at the vertices of r-dimensional rectangles.For 1D and square 2D codes, the families have parameters [[n, n − 2, 2]] and [[n², n² − 4n + 2, 4]], respectively.Source: §2 · p. 4
3 Lattice surgery constructions
The section builds lattice-surgery checks and full syndrome cycles for yoked surface codes, accounting for correlated errors, workspace, and storage layout. It also bounds the scope of the storage estimates and discusses an assumption specific to hot storage.
Correlated-error protection
- High-weight checks can induce correlated failures across inner surface codes that the outer code may not correct, so the constructions extend protection in time.This preserves the spatial footprint but lengthens the syndrome cycle, which increases the required inner-code distance.Source: §3 · pp. 5–6
Workspace
- Measuring outer checks requires workspace: one row can serve multiple 1D blocks, reducing occupied patches while lengthening the syndrome cycle.The workspace must be counted in the overall footprint.Source: §3 · pp. 6–7
Full syndrome extraction
- The full 1D syndrome cycle uses a traveling workspace row and has length 8d × (# of blocks) + 2d.The walking surface code connects outer syndrome cycles in 2d rounds.Source: Figure 6 · p. 7
- The full 2D cycle uses traveling workspace rows and columns and has length 25dw + 4d, where w = √n.Two walking-surface-code iterations connect the outer syndrome cycles in 4d rounds.Source: Figure 7 · p. 7
Storage layouts
- Cold storage packs logical qubits densely but requires retrieving them before operation; hot storage keeps them operable using access hallways as yoke-measurement workspace.Hot storage shifts the marginal cost of yoke measurement from space to time because hallways are blocked during measurement.Source: §3 · p. 7
Hot-storage scope
- The hot-storage estimates cover only 1D codes and assume one exposed boundary per patch; 2D hallway demands are expected to be too high.Rotations are assumed when access requires the unexposed boundary, a relevant consideration for algorithm layout.Source: §3 · p. 7
Scope
- The paper does not analyze the broader architectural consequences of operating on yoked surface codes during fault-tolerant computation.Operation on encoded qubits is identified as important but outside the paper’s scope.Source: §3 · p. 8
4 Complementary gaps
Complementary gaps quantify how strongly the surface-code decoder favors one logical outcome over its complement, and the paper uses them as soft information for outer-code decoding. The authors find that calibrated gap distributions can be extrapolated to estimate behavior over many rounds.
Gap definition
- A complementary gap is the log-ratio of the probabilities of the minimum-weight matching and its complementary matching; values near zero indicate low decoder confidence.The two matchings represent hypotheses for topologically distinct logical outcomes.Source: §4 · p. 8
Outer-code decoding
- Complementary gaps serve as edge weights in the outer error graph, representing the cost of flipping a minimum-weight matching to its complementary matching.The work uses a two-pass correlated matching decoder similar to [Fow13].Source: §4 · pp. 8–9
Calibration and extrapolation
- After rescaling by 0.9x, complementary gaps remain well-calibrated over many rounds, and minimum-gap approximations support extrapolating failure likelihoods from shorter experiments.The approximations tend to be slightly optimistic.Source: §4 · p. 9, Figure 10 · p. 10
5 Benchmarking
The benchmarking section combines circuit-level and gap-based simulations with path-counting heuristics to estimate logical error rates and storage footprints. Its projections show substantial qubit-density gains for yoked codes in the teraquop regime, while also identifying limits in the simulations and scaling approximations.
5 Benchmarking
- The benchmarking uses short circuit-level inner-code simulations with one perfect outer yoke-check round, and multi-round outer-code phenomenological simulations using sampled complementary gaps.The gap method assigns edge weights and detection events from sampled gap distributions before decoding outer error graphs with minimum-weight matching.Source: §5 · pp. 10–11
5.1 Scaling approximations
- Simple heuristic scaling laws estimate logical error per patch-round to help choose compact layouts for target error rates.The estimates combine with the lattice-surgery constructions to project overall logical error rates.Source: §5.1 · p. 11
- Path-counting heuristics match observed error rates reasonably well, though higher-weight 2D failure paths could violate the assumed scaling.The proposed 1D and 2D scalings are respectively quadratic and quartic in rounds between yoke checks, and quadratic in block size.Source: §5.1 · p. 12
5.2 Numerics
- Benchmarks focus on size scaling at one physical error rate because simulations are expensive, rather than sampling a wider range of noise strengths.Circuit simulations use the SI1000 noise model at 10^-3, with gaps extrapolated from at least 10d rounds.Source: §5.2 · p. 12
- Gap simulations agree well with full simulations in 0D and 1D and fairly well in 2D, supporting single-significant-figure fits consistent with the proposed path-counting scalings.The authors attribute small deviations partly to gap-distribution extrapolation imperfections magnified by the distance-4 outer code.Source: §5.2 · p. 12
- Long phenomenological benchmarks agree well with scaling approximations in 0D and 1D, but 2D results deviate significantly, potentially reflecting round scaling closer to r^3.8 than r^4.The authors consider overhead estimates useful when extrapolations are within an order of magnitude and expect scaling-law projections to be conservative.Source: §5.2 · p. 13
5.3 Footprint estimates
- Footprint projections include workspace, yoke, and interstitial-space overheads, and select layouts meeting target error rates for up to 250 logical qubits.The estimates compare cold storage using 1D and 2D yoked codes with hot storage using 1D yoked codes.Source: §5.3 · pp. 13–14, Figure 14 · p. 14
- In the teraquop regime, 1D yoked codes provide hot storage with nearly twice, and 2D codes cold storage with nearly three times, the logical qubits per physical qubit of standard surface codes.The density benefits become more pronounced as the target logical error rate decreases.Source: §5.3 · p. 15
6 Conclusion
The conclusion presents yoked surface codes as a way to increase logical-qubit density without additional connectivity, with estimated gains approaching threefold in the teraquop regime. It emphasizes that these memory savings remain extrapolated and that their impact in fault-tolerant computation is not yet established.
6 Conclusion
- Yoked codes are estimated to provide nearly three times as many logical qubits per physical qubit as standard surface codes in the teraquop regime at physical error rate 10^-3.The paper also estimates nearly twice as many for hot storage while keeping logical qubits easily accessible during computation.Source: §6 · p. 15
- The proposed layout requires no additional connectivity and is described as simpler to lay out, though its gains may be smaller than those of LDPC codes with long-range connections.Source: §6 · p. 15
- The reported savings are based on extrapolations; full-scale simulations are needed to verify the actual overhead reduction.The authors expect reported overheads may improve because of conservative hook-error suppression and scaling approximations.Source: §6 · p. 15
- The paper estimates memory overheads but leaves open where and when hierarchical memories should be used in computation and how encoded qubits should be operated.These questions matter for assessing application-level fault-tolerant-computing overhead.Source: §6 · p. 15
- The outer-code choices prioritize coding rate and simple layout, relying on surface-code features including flexible stabilizer measurement and useful soft information.The authors conclude hierarchical memories hold promise for reducing the cost of surface-code-based fault-tolerant computers.Source: §6 · p. 15
7 Contributions
The contributions passage credits complementary-gap decoding groundwork, the initial concatenation idea, and subsequent extensions and simulation work.
- Peter Brooks laid groundwork for using complementary gaps in decoding.Source: §7 · p. 15
- Cody Jones proposed concatenating a Y ⊗n stabilizer over the surface code to double its code distance.Source: §7 · p. 15
- Craig Gidney simulated circuit noise on the inner code and code-capacity noise on the outer code, extended the idea to 1D parity-check codes, and constructed the first draft.Source: §7 · p. 15
- Michael Newman extended simulations to gapped phenomenological noise, compiled topological circuits, emphasized 2D parity-check codes, and rewrote the paper.Source: §7 · p. 15
A Noise model
The appendix identifies SI1000 as the superconducting-inspired noise model used in the simulations and points to tables defining its channels and parameters.
- SI1000 means “Superconducting Inspired with 1000 nanosecond cycle.”Source: A Noise model · p. 19
- Table 2 defines the noise channels used by the SI1000 model in Table 3.Source: Table 2 · p. 19, Table 3 · p. 19
- In SI1000, the two-qubit gate error rate is set by p, and other error rates are defined relative to it.Measurements are noisiest and single-qubit gates least noisy.Source: Table 3 · p. 19
B Y -type yokes
The authors consider replacing paired X- and Z-type yoke checks with a single Y-type check in 1D, leveraging the surface code’s relative resilience to Y errors. The proposed alternative has surgery overhead and error-suppression concerns.
B Y -type yokes
- 1.8d is the observed effective distance against Y-type errors near a physical error rate of 10^-3, compared with d for X and Z errors.The paper attributes the relative resilience to the specific alignment required for circuit-level Y-type failures.Source: B Y -type yokes · p. 20, Figure 16 · p. 21
- A single Y-type check may require enlarging the surface code during lattice surgery, and accessing both X- and Z-type boundaries reduces potential savings.The illustrated even-block-size construction also contains unsuppressed hook errors.Source: B Y -type yokes · p. 20, Figure 15 · p. 20
C Quantum multi-dimensional parity check codes
The section defines multidimensional parity-check codes and describes how permutations yield commuting quantum checks. It also weighs their rate advantages against the growing size and circuit complexity of higher-dimensional constructions.
C Quantum multi-dimensional parity check codes
- A classical multidimensional parity-check code places bits in an r-dimensional array and checks rows along its dimensions; its minimum undetectable error has distance 2r.In two dimensions, the checks are rows and columns of an m × n matrix.Source: C Quantum multi-dimensional parity… · p. 22
- The encoded-bit count is obtained by counting independent parity checks dimension by dimension, accounting for checks generated by earlier dimensions.The contribution from each successive dimension includes factors of (n_i − 1) for the preceding dimensions.Source: C Quantum multi-dimensional parity… · p. 22
- Quantum MDPCCs assign X-type checks to the classical code and Z-type checks to a permuted copy when each side length is divisible by 2r.Each data qubit participates in two stabilizers per index, giving total qubit degree 2r; in two dimensions or less, the code is matchable.Source: C Quantum multi-dimensional parity… · pp. 22–23
- Cyclically shifting tensor factors makes the X- and Z-type checks commute while preserving the code parameters and distance.The construction ensures that at least one subsystem has matching free indices for the two check types.Source: C Quantum multi-dimensional parity… · p. 22
- Higher-dimensional QPCCs can increase logical-qubit rate, but more complex logical parity-check circuitry brings diminishing returns.The paper reports that concatenation into 1D QPCCs reduced physical-qubit requirements for surface-code storage by 1/2, and 2D QPCCs by 2/3.Source: C Quantum multi-dimensional parity… · p. 23
- For cube-like QPCCs to reach 75% rate, the required side length rises from 8 at r = 1 to 256 at r = 2, 13,824 at r = 3, and 1,048,576 at r = 4.The authors suggest going beyond 2D may be prohibitively expensive; at finite sizes, a non-cube-like code could be best under a maximum-qubit limit.Source: C Quantum multi-dimensional parity… · p. 23