Source-linked AI summary
A Survey of Research in Large Language Models for Electronic Design Automation
Jingyu Pan, Guanglei Zhou, Chen-Chia Chang, Isaac Jacobson, Jiang Hu, Yiran Chen
TL;DR
Circuit design remains challenging for LLM and electronic-design researchers, despite LLM applications in other domains. This survey examines LLM applications in EDA and reports gains in system-level and RTL-design studies, while noting limited exploration of LLM options.
Problem
Circuit design remains challenging for researchers in both LLMs and electronic design, despite downstream LLM applications across other domains.
Method
The survey explores multifaceted LLM applications in EDA to provide a comprehensive understanding of the field’s current state and future potential.
Results
Reported applications include 25x speedup in LCDA co-design and VerilogCoder pass rates of 94.2% with GPT4-turbo and 67.3% with Llama3.
Takeaways & Limitations
The survey identifies opportunities to broaden feature representation and emphasizes understanding the rationale behind design decisions in EDA.
Takeaways & Limitations
Each surveyed study explores only a limited number of LLM options, leaving a noticeable gap in comparative coverage.
Abstract
from arXiv · showhide
Within the rapidly evolving domain of Electronic Design Automation (EDA), Large Language Models (LLMs) have emerged as transformative technologies, offering unprecedented capabilities for optimizing and automating various aspects of electronic design. This survey provides a comprehensive exploration of LLM applications in EDA, focusing on advancements in model architectures, the implications of varying model sizes, and innovative customization techniques that enable tailored analytical insights. By examining the intersection of LLM capabilities and EDA requirements, the paper highlights the significant impact these models have on extracting nuanced understandings from complex datasets. Furthermore, it addresses the challenges and opportunities in integrating LLMs into EDA workflows, paving the way for future research and application in this dynamic field. Through this detailed analysis, the survey aims to offer valuable insights to professionals in the EDA industry, AI researchers, and anyone interested in the convergence of advanced AI technologies and electronic design.
1 Introduction
This introduction surveys how LLMs are being applied across EDA while framing circuit design as an iterative, PPA-constrained process that needs better use of historical design experience. It covers design stages, model customization, feature representation, infrastructure, bottlenecks, and future opportunities.
- Data and representation: EDA data spans textual representations in earlier stages and graphs or images in later stages, requiring appropriate encoders before LLM processing.These representations support applications across different design stages.
- Motivation: Circuit design remains challenging because iterative redesign must satisfy subtle performance, power, and area objectives.The introduction identifies learning from historical successes and failures as a potential way to streamline design iterations.
- Potential impact: LLMs are presented as tools for automating routine tasks and supporting advanced design simulations in electronic design.The introduction characterizes these applications as changing how electronic components are designed, optimized, and brought to market.
- Scope: The survey examines LLM applications across system-level design, RTL design, logic synthesis, and physical design.It also considers model selection and customization, feature representation, and supporting academic infrastructure.
- Outlook: The survey addresses application bottlenecks and future outlook while highlighting opportunities and challenges in integrating LLMs into EDA.Its intended audience includes EDA professionals, AI researchers, and others interested in advanced AI and electronic design.
2 Background on LLM
The background describes the evolution of LLMs from pretrained language models toward instruction-tuned, multimodal, and open-source systems. It emphasizes expanding capabilities across NLP tasks, modalities, model sizes, and code generation.
- LLM foundations: LLMs are pretrained on large text corpora and have demonstrated performance across reasoning, text generation, and other NLP tasks.The background connects these capabilities to applications in education, healthcare, human-machine interaction, medicine, and scientific research.
- Alignment and instruction tuning: Instruction tuning and RLHF enable pretrained models to adapt across tasks and align outputs with human preferences and values.InstructGPT is presented as a key milestone in this development.
- Multimodality: Multimodal models extend LLM capabilities beyond text to diverse data and vision, as illustrated by GPT-4, Claude3, and Pixtral.The passage identifies Claude3 Opus as the largest and most powerful model in the Claude3 family.
- Open-source models: Open-source models broaden access to LLM research, including LLaMA variants, CodeGen for code generation, and Mistral 7B for compact and efficient use.LLaMA models are described as smaller and more computationally efficient than competitors, while CodeGen targets programming tasks.
- Model scale and efficiency: Model families vary in size, architecture, and modality, with examples ranging from Mistral 7B to Pixtral's 12 billion parameters.Mistral 7B uses grouped-query attention to enhance inference speed and reduce memory usage.
3 Trends in Large Language Models for EDA
The survey reviews how LLMs are being customized and applied across EDA, from system-level specification and RTL generation to synthesis, physical design, and analog applications. Reported trends include domain adaptation, agentic methods, multimodal representations, and increasing automation, alongside persistent data and deployment constraints.
- Survey scope: The survey presents a meta-study of recent LLM applications in computer-aided design, focusing on studies that use LLMs for CAD.It covers research across multiple EDA stages and customization strategies.
- System-level design: LCDA co-designs DNN topology and compute-in-memory accelerators, achieving a 25x speedup while maintaining similar performance to state-of-the-art methods.The approach targets efficient deployment of DNNs on edge platforms with constrained computation and power.
- System-level design: Chip-Chat demonstrates end-to-end design capabilities from system-level specifications to component-level designs, while SpecLLM focuses on specification generation and review across abstraction levels.Chip-Chat evaluations emphasize design viability, whereas SpecLLM emphasizes specification quality and quality control.
- RTL design: Functional correctness generally increases with model size for naive supervised fine-tuning, while specialized customization methods outperform simpler fine-tuning and prompt-engineering baselines.The survey also reports that a small Verilog pre-training corpus can substantially improve performance, whereas a multi-programming-language corpus offers minimal advantage over a natural-language corpus.
- RTL design: RTL-generation research combines prompt engineering, supervised fine-tuning, data engineering, custom tokenizers, domain adaptation, and agentic generation methods.VerilogCoder reaches a 94.2% pass rate with GPT4-turbo and its agent framework, compared with 60.3% without the framework.
- Logic synthesis, physical design, and analog applications: Emerging EDA applications include customized retrieval for documentation, multimodal layout support, netlist generation and evaluation, PPA prediction, design-space exploration, and high-level planning.The survey identifies open-source, domain-adapted models and stronger interoperability as future directions, while analog applications remain constrained by the need for extensive and diverse training data.
4 From the LLM Methodology Perspective
The survey examines LLM architectures, model sizes, and customization techniques for EDA, emphasizing how these choices shape task-specific performance. It identifies fine-tuning, prompt engineering, autonomous agents, and retrieval augmentation as complementary approaches for adapting LLMs to hardware design.
- Scope: The methodology covers model architecture and size, customization techniques, feature representation, and the infrastructure supporting LLM research in EDA.The infrastructure includes open-source models and benchmarks or datasets.
- Model architecture: Encoder-only, decoder-only, encoder-decoder, and PrefixLM architectures support different combinations of input understanding and generation for EDA tasks.Encoder modules provide context-rich representations, while decoder modules use causal attention for generation; PrefixLM combines visible attention over prior input with masking of future tokens.
- Model selection: Pretrained LLMs show varied performance across EDA tasks, underscoring the importance of selecting models for specific applications while leaving optimal model selection insufficiently studied.The cited studies explore only a limited number of LLM options.
- Model size and adaptation: Domain-specific fine-tuning improves performance in respective EDA tasks, while existing studies rarely scale models beyond 70 billion parameters.The survey links larger models to the need for larger datasets and identifies the 8,000-sample VerilogEval dataset as relatively small.
- Customization techniques: Prompt engineering, fine-tuning, domain-adaptive pretraining, and supervised fine-tuning tailor LLMs for hardware code, scripts, and EDA documentation.Examples include CodeGen-16B fine-tuning for Verilog, ChipNeMo customization with tokenizers and retrieval models, and fine-tuning with EDA tools.
- Customization techniques: Autonomous agents iteratively improve hardware code through tool interaction, while retrieval-augmented systems improve EDA documentation question answering using specialized retrieval and reranking.The survey reports that closed-source models are better choices for autonomous hardware agents because they interact effectively with user-defined tools and perform iterative improvement.
5 Outlook on LLMs for EDA
LLM-for-EDA research is supported by growing open-source models, benchmarks, datasets, and customization efforts, while deployment faces substantial technical, computational, security, and interpretability constraints. The survey identifies opportunities to adapt broader LLM advances to EDA-specific concerns, including proprietary design protection and explainable circuit decisions.
- Research infrastructure: Open-source models, benchmarks, and datasets provide infrastructure for developing and evaluating LLM applications in EDA.These resources support architecture exploration, training experimentation, and standardized task evaluation.
- Research infrastructure: EDA customization draws on domain-specific data, added tokenizer vocabulary, generated instructions, and specialized code or implementation templates.Examples include NVBugs data, approximately 9K added LLaMA2 tokens, GPT-4-generated instructions, and HLS code snippets or templates.
- Application bottlenecks: Integrating LLMs into established EDA workflows requires compatibility with legacy tools while meeting demanding real-time or near-real-time processing constraints.The computational load of training and inference must be balanced against efficient processing for complex designs.
- Application bottlenecks: EDA deployment requires reliable outputs, regulatory compliance, protection of proprietary design data, and sufficient understanding of specialized circuit and manufacturing knowledge.Companies may hesitate to share sensitive designs for training, while generated outputs must be verified against stringent standards.
- Ethics, security, and efficiency: Explainability is especially important because understanding LLM design rationales can support downstream debugging, verification, and validation.The survey identifies interactive natural-language explanations alongside model outputs as an emerging research direction.
- Future opportunities: Future EDA-focused work could examine design-data extraction risks, defensive techniques, and explainability directly in circuit design decisions.The survey notes that these concerns remain an opportunity for work specifically relating general LLM issues to EDA.