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Demonstration of low-overhead quantum error correction codes

Ke Wang, Zhide Lu, Chuanyu Zhang, Gongyu Liu, Jiachen Chen, Yanzhe Wang, Yaozu Wu, Shibo Xu, Xuhao Zhu, Feitong Jin, Yu Gao, Ziqi Tan, Zhengyi Cui, Ning Wang, Yiren Zou, Aosai Zhang, Tingting Li, Fanhao Shen, Jiarun Zhong, Zehang Bao, Zitian Zhu, Yihang Han, Yiyang He, Jiayuan Shen, Han Wang, Jia-Nan Yang, Zixuan Song, Jinfeng Deng, Hang Dong, Zheng-Zhi Sun, Weikang Li, Qi Ye, Si Jiang, Yixuan Ma, Pei-Xin Shen, Pengfei Zhang, Hekang Li, Qiujiang Guo, Zhen Wang, Chao Song, H. Wang, Dong-Ling Deng

arXiv:2505.09684v1quant-ph

TL;DR

The paper addresses the resource overhead and scalability challenges of quantum error correction by studying qLDPC codes. It constructs bivariate bicycle codes and models their decoding under experimentally characterized operation error rates, while examining leakage and dephasing mitigation.

  • Problem

    Quantum error correction faces scalability challenges from the high resource overhead of traditional codes, motivating interest in qLDPC codes with potentially higher encoding efficiency and more efficient resource scaling.

  • Method

    The study constructs stabilizer codes, derives an [[18, 6, 3]] qLDPC code by removing two checks from an [[18, 4, 4]] bivariate bicycle code, and models circuit noise using experimentally characterized error rates.

  • Results

    10.99% and 10.51% logical error rates per qubit per cycle are obtained for Z- and X-basis states, respectively, when leakage-detected instances are retained.

  • Takeaways & Limitations

    The construction and analysis support studying low-overhead qLDPC codes through bivariate bicycle code implementations and circuit-level decoding models.

  • Takeaways & Limitations

    The decoding noise model assigns one common error probability to all operations of each type, although experimentally measured values can vary by circuit position.

Abstract

from arXiv · show

Quantum computers hold the potential to surpass classical computers in solving complex computational problems. However, the fragility of quantum information and the error-prone nature of quantum operations make building large-scale, fault-tolerant quantum computers a prominent challenge. To combat errors, pioneering experiments have demonstrated a variety of quantum error correction codes. Yet, most of these codes suffer from low encoding efficiency, and their scalability is hindered by prohibitively high resource overheads. Here, we report the demonstration of two low-overhead quantum low-density parity-check (qLDPC) codes, a distance-4 bivariate bicycle code and a distance-3 qLDPC code, on our latest superconducting processor, Kunlun, featuring 32 long-range-coupled transmon qubits. Utilizing a two-dimensional architecture with overlapping long-range couplers, we demonstrate simultaneous measurements of all nonlocal weight-6 stabilizers via the periodic execution of an efficient syndrome extraction circuit. We achieve a logical error rate per logical qubit per cycle of $(8.91 \pm 0.17)\%$ for the distance-4 bivariate bicycle code with four logical qubits and $(7.77 \pm 0.12)\%$ for the distance-3 qLDPC code with six logical qubits. Our results establish the feasibility of implementing various qLDPC codes with long-range coupled superconducting processors, marking a crucial step towards large-scale low-overhead quantum error correction.

Supplementary Information for “Demonstration of low-overhead quantum error correction codes”

The supplementary information defines the stabilizer-code framework and constructs an [[18, 4, 4]] bivariate bicycle code, then derives an [[18, 6, 3]] qLDPC variant by removing checks. It also specifies the corresponding check matrices, Tanner-graph connectivity, logical operators, and matrix-based code parameters.

  • Quantum stabilizer codes encode k logical qubits into n data qubits using n − k independent stabilizers, giving a code-space dimension of 2^k.
  • A CSS code uses separate X-type and Z-type check matrices satisfying HXH⊤Z = 0, ensuring commuting stabilizer generators.
  • BB codes use cyclic-shift matrices and two bivariate polynomials to construct their binary parity-check matrices over module 2.
  • Bivariate bicycle code construction: The demonstrated BB code has parameters [[18, 4, 4]], obtained with l = 3 and m = 3 and code-distance calculation from the kernel and row space of the check matrices.
  • Bivariate bicycle code construction: Each BB check operator acts on six data qubits, and the Tanner graph is embedded on a torus with local and long-range connectivity.
  • Bivariate bicycle code construction: Removing X5 and Z5 changes the code from [[18, 4, 4]] to [[18, 6, 3]], increasing encoded qubits while reducing code distance.

Syndrome measurement circuit

The experiment uses an efficient circuit that simultaneously extracts all stabilizer values for the BB code. Its full syndrome cycle comprises seven layers of non-overlapping CZ gates.

  • The efficient syndrome measurement circuit simultaneously extracts all stabilizer values for the BB code.
  • A full syndrome cycle for the [[18, 4, 4]] BB code contains seven layers of non-overlapping CZ gates.

Decoding

The experiment models circuit-level faults, simulates their syndrome signatures, and applies BP-OSD decoding to infer likely data-qubit errors. Readout and leakage are incorporated into calibrated error probabilities and a normalized confusion-matrix model.

  • Decoder: BP-OSD infers the most likely physical data-qubit errors from observed error detections and succeeds when the inferred correction restores the logical state.The decoder uses belief propagation with ordered statistics decoding under a circuit-based noise model.
  • Noise model: The circuit-level noise model independently assigns Pauli faults to Hadamard, idle, CZ, dynamical-decoupling, measurement, and final-readout operations.CZ gates have 15 possible faulty realizations, while Hadamard, DD, and idle gates each have three.
  • Assumptions: The model absorbs initialization effects into Hadamard or CZ error probabilities because check qubits are not periodically reset during the experiment.All operations of the same type are assigned a shared error probability despite position-dependent experimental variation.
  • Readout calibration: pM = 4.03 × 10^-2 and pF = 3.29 × 10^-2 under η = 0.05 and β = 0.475 after leakage rejection and outcome normalization.The three-state confusion matrix is reduced to a two-state matrix after rejecting detected leakage.
  • Circuit: The BB-code syndrome circuit contains 84t CZ gates and 14t check-qubit measurement operations over t QEC cycles.It also includes 18(t − 1) dynamical-decoupling operations and additional idle gates.

Device Information

Kunlun is a 32-qubit superconducting processor configured with data and check qubits for implementing the BB code. Its tunable couplers support the required connectivity.

  • Hardware: Kunlun contains 32 frequency-tunable transmon qubits and 84 tunable couplers.The processor uses 18 data qubits and 14 check qubits for the BB-code implementation.
  • Qubit roles: 18 qubits serve as data qubits and 14 serve as check qubits in the BB-code implementation.Data qubits are labeled R/L, while check qubits are labeled Z/X.
  • Control and readout: Each qubit is connected to a readout resonator and a dedicated microwave and flux-tuning control line.

Multi-length couplers

The processor uses tunable couplers and air bridges to connect distant qubits while limiting unwanted crosstalk and accommodating intersecting couplers in a two-dimensional layout.

  • Long-range coupling: Tunable couplers mediate interactions between distant qubits through capacitive coupling.Each coupler is realized as a frequency-tunable transmon whose frequency can be varied to control interactions.
  • Long-range coupling: The coupler design targets interactions across varying distances while minimizing unwanted crosstalk.
  • Two-dimensional integration: Air bridges create quasithree-dimensional structures where couplers intersect and connect separated grounds to maintain a uniform ground reference.

Measurement setup

The readout system uses six frequency-multiplexed lines to measure multiple resonators simultaneously with minimal interference. Coupling strengths and Purcell filters support the readout design.

  • Readout architecture: Six readout lines each connect to five or six readout resonators for simultaneous measurement.
  • Readout architecture: Approximately 100 MHz frequency separation between resonators minimizes crosstalk during readout.
  • Readout hardware: Qubit-resonator coupling strengths are approximately 200 MHz for check qubits and 80 MHz for data qubits.A Purcell filter is implemented on each readout line to suppress unwanted effects.

Quantum operations

A syndrome-measurement cycle combines seven CZ layers with Hadamard and echo gates before check-qubit readout. The processor’s qubit parameters and simultaneous-gate errors are characterized through heatmaps and cumulative distributions.

  • Seven CZ layers, interspersed with Hadamard and echo gates, are followed by measurement of the check qubits.
  • Heatmaps characterize qubit idle frequency, anharmonicity, relaxation time, and pure dephasing times measured with Hahn echo and CPMG sequences.
  • Cumulative distributions summarize the corresponding qubit parameters and Pauli errors of simultaneous single-qubit gates.

Single- and two-qubit gates

Single-qubit gates use optimized idle frequencies and virtual-Z control, while CZ gates use near-resonant interactions and optimized parallel layers. Reported gate-layer quantities include a 0.98% CZ error and 0.35% Z-rotation error.

  • 30-ns microwave pulses resonant with the |0⟩↔|1⟩ transition implement XY rotations, combined with virtual-Z gates for arbitrary single-qubit control.
  • CZ gates bring |11⟩ and |02⟩ or |20⟩ near resonance for 95 ns, with two additional 5-ns buffers.
  • 0.98% CZ error and 0.35% Z-rotation error are reported for the gate-layer characterization.
  • Parallel CZ-layer frequencies are optimized using coherence, pulse shaping, and parasitic-coupling considerations.

Readout

Readout is optimized through tailored pulse durations, photon-decay buffering, mode-matched filtering, and frequency tuning to suppress AC-Stark-induced crosstalk. The figures report frequency, resonator, dispersive-shift, and readout-error characteristics.

  • 520-ns check-qubit and 890-ns data-qubit readout pulses are followed by a 400-ns photon-decay buffer.
  • A mode-matched filter based on time-resolved resonator responses is used during readout-pulse demodulation.
  • Flux pulses optimize qubit frequencies during readout to eliminate AC-Stark-induced frequency collisions and unwanted crosstalk.
  • Readout heatmaps show qubit frequencies, resonator frequencies, dispersive shifts χ, and errors for the |0⟩, |1⟩, and |2⟩ states.
  • The stabilizer-measurement circuit uses sequential CZ gates between a check qubit and six data qubits, with Hadamards on data qubits for X-type stabilizers.

Characterization of stabilizer measurements

The study characterizes weight-6 stabilizer extraction across all data-qubit basis states and applies echo and dynamical-decoupling pulses to reduce dephasing. Leakage rejection is evaluated because leakage propagates across syndrome cycles and affects logical performance.

  • Pauli X or Y gates inserted around CZ gates act as echo pulses, while ten Pauli X gates during check-qubit readout provide dynamical decoupling.
  • Combining echo and dynamical-decoupling methods produces the best reduction in detection probabilities over seven syndrome cycles.
  • 10.99% and 10.51% are the logical error rates per qubit per cycle without leakage rejection in Z and X bases, respectively.
  • 0.127(3) and 0.082(6) are the probabilities of detecting leakage on any of the 18 data and 14 check qubits, respectively.
  • 0.007(5) is the average leakage rate per cycle for one data qubit, compared with 0.006(1) for one check qubit.
  • The [[18, 4, 4]] BB-code circuit is used for periodic stabilizer measurements without additional Pauli gates or dynamical decoupling.

DATA ANALYSIS

The analysis converts repeated check-qubit measurements into stabilizer and error-detection results, while evaluating mitigation methods and leakage-related experimental data.

  • Dephasing mitigation: Method I inserts Pauli gates around CZ layers, whereas Method II applies dynamical decoupling during check-qubit readout.
  • Leakage analysis: The BB-code logical-performance analysis includes a separate experiment without leakage rejection.Fig. S11 reports data from 40,000 experimental instances and fits cycles t = 1 to 6.
  • Syndrome processing: The stabilizer value is reconstructed from consecutive check-qubit measurement outcomes, then converted into an error-detection result by differencing consecutive stabilizer values.For interior cycles, y_j = (x_{j+1} − x_j) mod 2 and z_j = (y_j − y_{j−1}) mod 2; boundary cycles use direct values.
  • Leakage analysis: Leakage rates per cycle after readout correction are tabulated separately for the experiment.
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