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Online Continual Learning on Intel Loihi 2 via a Co-designed Spiking Neural Network

Elvin Hajizada, Danielle Rager, Timothy Shea, Leobardo Campos-Macias, Andreas Wild, Eyke Hüllermeier, Yulia Sandamirskaya, Mike Davies

arXiv:2511.01553v2cs.LGcs.AIcs.DCcs.NE

TL;DR

Edge AI needs to adapt to changing data without forgetting, but existing prototype updates can violate the locality required for on-chip learning. CLP-SNN combines a self-normalizing local rule with a spike-driven state machine on Loihi 2; it reports strong few-shot accuracy and substantial latency and energy gains over an edge-GPU baseline.

  • Problem

    Online continual learning must adapt to non-stationary data one sample at a time while retaining prior knowledge, but CLP’s explicit L2 renormalization violates on-chip locality.

    Source: Introduction · p. 2

  • Method

    CLP-SNN uses a self-normalizing three-factor local learning rule and a spike-driven neural state machine to implement continual learning on Loihi 2.

    Source: Introduction · p. 2, Discussion · p. 10

  • Results

    113× lower latency (0.33 ms vs. 37.3 ms) and 6,600× lower energy (0.05 mJ vs. 333 mJ) than the strongest learning-based OCL edge-GPU baseline, with accuracy matching or exceeding replay-based and non-replay baselines.

    Source: Introduction · pp. 2–3

  • Takeaways & Limitations

    The work demonstrates a Loihi 2 implementation of continual learning and reports that co-designed algorithms and neuromorphic hardware improve accuracy, latency, and energy metrics over conventional approaches.

    Source: Discussion · p. 10

    On Loihi 2, prototypes are imprinted once and then frozen; incorrect predictions trigger allocation of a new prototype rather than corrective updates.

    Source: On-chip implementation of the learning… · p. 15

Abstract

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AI systems on edge devices require online continual learning -- adapting to non-stationary streams and unfamiliar classes without catastrophic forgetting -- under strict power constraints. We present CLP-SNN, a spiking neural network with a self-normalizing local learning rule and a spike-driven neural state machine for autonomous on-chip learning, implemented on Intel's Loihi 2 neuromorphic processor. On OpenLORIS few-shot experiments, CLP-SNN matches replay-based accuracy rehearsal-free. On Loihi 2, CLP-SNN achieves 113x lower latency (0.33 ms vs. 37.3 ms) and 6,600x lower energy (0.05 mJ vs. 333 mJ) than the strongest edge-GPU baseline. This gain decomposes into algorithmic efficiency (~14.5x latency, ~22.6x energy on the same GPU) and neuromorphic hardware co-design (~7.8x latency, ~295x energy) exploiting event-driven learning and sparse graded-spike communication. We show that co-designed brain-inspired algorithms and neuromorphic hardware can break traditional accuracy-efficiency trade-offs in edge AI.

Introduction

Online continual learning must adapt to changing data one sample at a time while retaining prior knowledge, yet existing approaches often conflict with edge-device memory, power, and locality constraints. CLP-SNN addresses this gap with local event-driven learning on Loihi 2 and reports strong few-shot accuracy alongside large latency and energy gains.

Introduction

  • OCL targets non-stationary streams by learning from each sample without storing or revisiting past data, while balancing adaptation, retention, few-shot learning, and novel-concept detection.These demands are especially challenging under strict edge latency and memory budgets.Source: Introduction · pp. 1–2
  • Existing OCL methods often rely on replay buffers or dense updates that strain edge memory and locality; CLP’s explicit L2 renormalization also blocks direct neuromorphic deployment.The renormalization is described as a global gather–norm–broadcast operation.Source: Introduction · p. 2
  • No prior published study had demonstrated OCL designed and deployed on Loihi 2 or benchmarked it against conventional edge hardware under the standard evaluation protocol.Source: Introduction · p. 2
  • 113× lower latency (0.33 ms vs. 37.3 ms) and 6,600× lower energy (0.05 mJ vs. 333 mJ) than the strongest learning-based OCL edge-GPU baseline, while matching or exceeding replay-based and non-replay accuracy.The comparison is reported for few-shot OpenLORIS experiments.Source: Introduction · pp. 2–3
  • CLP-SNN replaces explicit renormalization with a self-normalizing three-factor local rule and implements CLP control flow as a spike-based state machine, with metaplasticity and neurogenesis.The rule uses per-synapse variables; the state machine supports winner selection, novelty detection, learning gating, and related control functions.Source: Introduction · pp. 2–3
  • Unlike rate-based local learning that updates continuously, CLP-SNN restricts weight changes to where and when spikes occur, while metaplasticity consolidates prototypes and neurogenesis adds capacity for new concepts.Source: Figure 1 · p. 3, Introduction · p. 3

Results

CLP-SNN implements Continually Learning Prototypes on Loihi 2 using local spike-based learning, novelty-triggered prototype allocation, and winner-take-all updates. In OpenLORIS few-shot experiments it retains accuracy while achieving substantially lower latency and energy than conventional edge-GPU baselines.

CLP-SNN deploys on Loihi 2 for on-chip continual learning

  • The four-population SNN uses prototype spikes for prediction and competition, detects novelty when no prototype spikes, and allocates an unlearned prototype through modulator-triggered learning.A supervisor’s feedback is relayed through the modulator to gate the winner’s local weight update; without supervision, the modulator can still trigger unsupervised learning.Source: CLP-SNN deploys on Loihi 2 for on-chip… · p. 4, Figure 2 · p. 5

CLP-SNN’s local learning rule is self-normalizing

  • A Taylor-derived local multiplicative decay approximates explicit L2 renormalization, preserving usable prototype alignment without global normalization.Only the winner prototype updates, making the weight updates sparse in space and time.Source: CLP-SNN’s local learning rule is… · pp. 4–5

CLP-SNN outperforms baselines in few-shot streaming

  • CLP and CLP-SNN outperform other methods in one-shot learning; FM=0.11 (CLP) and 0.13 (CLP-SNN), versus 0.55 (Perceptron) and 0.65 (FineTune), accompany uniform retention across 40 classes.CLP-SNN’s slight accuracy drop relative to CLP is attributed to INT8 weight/activation quantization and discretized temporal WTA.Source: CLP-SNN outperforms baselines in… · p. 7, Figure 4 · p. 7

CLP-SNN improves accuracy-latency-energy trade-off

  • 113× lower latency (0.33 ms vs 37.3 ms) and 6,600× lower energy (0.05 mJ vs 333 mJ) per learning update versus standard FP32 SLDA on Jetson Orin Nano GPU.The reported gains decompose into CLP algorithmic gains on GPU and Loihi 2 neuromorphic co-design gains.Source: Table 1 · p. 8, CLP-SNN improves… · p. 8

Not all sparsity types contribute equally

  • At tepoch=20, learning runs once per sample; compared with tepoch=1, CLP-SNN runs 20 times faster and uses 3.5 times less dynamic power.With 50% input sparsity, spiking-phase latency decreases by 28%; the spiking phase dominates at large tepoch, while learning dominates near one.Source: Not all sparsity types contribute… · p. 9

OCL is resource-intensive on conventional hardware

  • OCL accounts for 22% of NCM latency and 10% of its dynamic energy, rising to 94% and 96% for SLDA, making learning a major pipeline cost.The paper reports that learning updates become the primary bottleneck for accuracy-competitive OCL pipelines.Source: OCL is resource-intensive on… · p. 9, Table 3 · p. 9

Discussion

CLP-SNN combines brain-inspired learning with Loihi 2 hardware to improve continual learning efficiency, while its current implementation has prototype-allocation, feature-adaptation, and scalability constraints. The discussion also identifies how sparsity and learning-event timing affect hardware performance.

Discussion

  • The work reports the first continual-learning implementation on Loihi 2 and establishes neuromorphic continual-learning benchmarks.The broader contribution is a practical hardware implementation for real-time, energy-efficient learning from non-i.i.d. streams while mitigating catastrophic forgetting.Source: Discussion · p. 10
  • 70× lower latency and 5,600× greater energy efficiency than the best-performing baseline OCL method, with comparable or superior accuracy.The reported gains are attributed to event-driven computation and weight updates, local learning, and integrated memory and computation.Source: Discussion · p. 10
  • 20× improvement occurs when learning every 20 timesteps rather than every timestep, while 50% input sparsity yields a 28% latency reduction.The authors identify temporal sparsity of learning as more critical than input sparsity for these latency gains.Source: Discussion · p. 10
  • The Loihi 2 implementation uses simplified prototype allocation that does not subsequently adapt, requiring 2-3× more prototypes than fully adaptive CLP-SNN in simulation.The authors state that energy and latency gains will hold for a fully adaptive Loihi 2 implementation because single-weight-update computational load is unchanged.Source: Discussion · p. 10
  • Fixed feature extractors constrain shallow continual learning, and substantial domain shifts may require continual adaptation of feature representations.The authors identify jointly updating CLP mechanisms and feature extractors as future research.Source: Discussion · p. 10
  • With prototype populations scaling to thousands, all-to-all winner-take-all inhibition will saturate Loihi 2 per-core fan-in and fan-out axon limits.A hub-and-spoke topology would reduce O(N^2) connectivity to two O(N) fan-out stages, with one added timestep and majority-vote tie-breaking without accuracy loss.Source: Discussion · p. 10
  • Input sparsity facilitates faster inference, while event-driven learning yields significant gains in learning latency.The characterization is presented as insight for next-generation neuromorphic architecture design.Source: Discussion · p. 10
  • Temporal sparsity of learning improves latency, but updating one neuron's weights does not improve latency over updating multiple neurons' weights on Loihi 2.The authors attribute the spatial-sparsity limitation to post-synaptic gating occurring after the learning computation; they suggest strict conditioning on pre-synaptic, post-synaptic, and third-factor events.Source: Discussion · pp. 10–11

Methods

The methods describe CLP-SNN’s learning architecture and Loihi 2 deployment, alongside the feature-extraction and shared protocols used to evaluate continual-learning methods. They also specify latency and energy benchmarking across Jetson Orin Nano and Loihi 2, including precision constraints on the GPU comparison.

Derivation of CLP-SNN Rule

  • The CLP-SNN rule derives from CLP [21] by expanding the normalization denominator and dropping O(α^2) terms, yielding a local update using pre- and post-synaptic activity, weights, and reinforcement.The derivation assumes normalized input and weight vectors.Source: Derivation of CLP-SNN Rule · p. 11

CLP-SNN architecture: neuron populations and learning

  • Four spiking populations implement inference, winner-take-all competition, novelty-triggered prototype allocation, and modulated local learning.The novelty-detector and modulator together form a neural state machine; cosine-similarity-driven time-to-first-spike selects the winner, while inputs below the effective similarity threshold trigger allocation. The modulator relays signed supervisor feedback or targets the next free prototype.Source: CLP-SNN architecture: neuron… · pp. 11–12

Loihi 2 deployment

  • CLP-SNN fits its 1280-input, up-to-300-prototype network within 41 of Loihi 2’s 128 neurocores.Graded spikes deliver the full feature vector in one SNN timestep, while programmable neurons and dendritic compartments support custom dynamics and route input, modulatory, and inhibition signals separately.Source: CLP-SNN architecture: neuron… · p. 11, Loihi 2 deployment · p. 13

On-chip implementation of the learning rule

  • Loihi 2 implements the learning rule with programmable synaptic updates, input-dependent trace overwrites, and event-driven gating.Pre- and post-synaptic traces provide the local variables for the update, and updates are skipped when no presynaptic spike fires.Source: On-chip implementation of the learning… · pp. 14–15
  • On Loihi 2, each prototype is imprinted once and frozen; misclassified inputs allocate a new prototype rather than correcting existing weights.Consequently, the on-chip path does not use the goodness or adaptive-learning-rate dynamics; float and INT8 simulations implement the full adaptive rule.Source: On-chip implementation of the learning… · p. 15

Experimental framework

  • OpenLORIS category-level experiments use the first 60 frames per clip and L2-normalized 1280-dimensional features from a frozen ImageNet-trained EfficientNet-B0 backbone.The backbone runs on the host GPU; only its features are passed to the CLP-SNN layer, isolating continual learning from feature-space adaptation.Source: Experimental framework · p. 15
  • Each 1-shot or 25-shot setup uses one randomly selected clip per each of 40 classes, with three randomized-seed runs reported as mean ± standard deviation.Class order and clip choices are randomized independently for each trial.Source: Experimental framework · p. 15
  • The baselines are SLDA, NCM, Replay, Fine-tuning, and Perceptron; all use L2-normalized features except Replay and its cross-entropy objective.SLDA uses a shared streaming precision matrix, NCM keeps a running-average class prototype, Replay stores and replays fixed per-class samples, and Fine-tuning and Perceptron update last-layer weights without forgetting mitigation.Source: Experimental framework · pp. 15–16

Cross-platform latency and energy benchmarking

  • Cross-platform benchmarks use synchronized seeds, shared features and protocols, Jetson Orin Nano GPU/CPU runs, and Loihi 2 runs, excluding IO latency on all platforms.Jetson energy measures total system power (VDD IN); Loihi 2 experiments use an Oheo Gulch system with N3C2-revision chips.Source: Cross-platform latency and energy… · p. 16
  • INT8 GPU learning is infeasible under the batch-size-1 protocol, so GPU comparisons use FP32 and FP16 runs, against which CLP-SNN’s latency and energy advantages persist.Jetson tensor-core INT8 acceleration supports dense GEMM, while the evaluated learning operations are not GEMM and PyTorch autograd does not support INT8 gradients.Source: Cross-platform latency and energy… · p. 16
  • Benchmark characterization uses 1280 input dimensions and 40 classes, with 300 pre-allocated prototypes for CLP and CLP-SNN.The full CLP-SNN hyperparameter set is provided in Supplementary Table S3.Source: Cross-platform latency and energy… · p. 16

Data Availability

The paper provides public access to the OpenLORIS dataset, processed features, benchmark outputs, and figure-source data, while raw Loihi 2 logs and proprietary software internals are not redistributable.

Data Availability

  • OpenLORIS data, pretrained EfficientNet-B0 weights, processed features, benchmark outputs, and figure-source data are publicly available through the cited sources and reproducibility repository.The repository includes notebooks to regenerate the paper’s main-text and supplementary display items.Source: Data Availability · p. 16
  • Raw Loihi 2 measurement logs and Intel proprietary software internals are not redistributable.Aggregated per-sample latency and energy measurements derived from those logs are included in the repository.Source: Data Availability · p. 16
  • The dataset and pretrained weights are available from their original authors and standard public deep-learning libraries, respectively.Source: Data Availability · p. 16

Supplementary Material

The supplementary material examines forgetting, learning-rule stability, hardware deployment, and benchmark configurations, including the effects of dimensionality and variance on the INT8 rule.

Supplementary Figures

  • CLP and CLP-SNN achieve the lowest forgetting metric among methods, while their forgetting remains low as classes accumulate.The figure reports that non-OCL baselines have FM ≥0.55, whereas OCL methods cluster between 0.11–0.17; it also cautions that FM conflates knowledge loss with the increasingly difficult classification task.Source: Figure S1 · p. 20
  • At high dimensionality, INT8 weight updates can be truncated to zero, producing norm and cosine-similarity oscillations, although the final dot-product similarity converges to one.The OpenLORIS results align with the synthetic-cluster findings; the figure identifies lower-dimensional spaces as preferable for the INT8 rule on unit hyperspheres.Source: Figure S2 · p. 21
  • As intra-class variance increases, CLP-SNN INT8 shows larger norm deviation and slower convergence, especially at d = 1280, while dot-product similarity converges to ≈1 across variants.The main-experiment regime, d = 1280 and effective σ ≈0.025–0.050, is within the stated stable region of all three implementations.Source: Figure S3 · p. 22
  • The 1280-feature × 300-prototype Loihi 2 deployment uses 41 of 128 neurocores, with online plasticity—not network size—setting core demand.Dense plastic synapses and their learning state saturate memory on prototype-hosting cores; a frozen-weight version would require substantially fewer cores.Source: Figure S4 · p. 23

Supplementary Tables

  • The supplementary tables document SLDA learning-step components and benchmarking under per-sample and amortized inversion cadences, alongside CLP-SNN hyperparameters.Table S2 distinguishes T = 1 from T = 60; Table S3 states the threshold constraint used for hardware and simulator parameterizations.Source: Table S1 · p. 24, Table S2 · p. 24, Table S3 · p. 25

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