FTCircuitBench: A Benchmark Suite for Fault-Tolerant Quantum Compilation and Architecture

Motivation

• The benchmark targets fault-tolerant compilation because QEC introduces substantial hardware and classical-control overhead, including real-time decoding, costly non-Clifford gates, and difficult compilation.QEC encodes logical qubits into many physical qubits to suppress logical errors, but scaling FTQC remains challenging.Source: §1 · p. 4

Background

• Clifford+T and Pauli Based Computation offer distinct fault-tolerant paradigms whose suitability depends on logical-operator overhead and hardware topology, making model-specific translation and optimization important.Clifford+T combines Clifford and T gates, whereas PBC uses adaptive non-Clifford Pauli-product operators.Source: §1 · p. 4

Contribution

• FTCircuitBench provides pre-compiled algorithm instances in Clifford+T and Pauli Based Computation, addressing the need for standardized resources to compare optimization, compilation, and architecture choices.The suite includes initial unoptimized compilations as baselines for optimization studies and supports circuits with varied complexity.Source: §1 · p. 4
• Its Python toolkit compiles user-defined algorithms into either model, supports custom optimization passes, and evaluates trade-offs such as gate-decomposition precision and logical-operator error.Parameters including precision and recursion expose configurable compilation behavior, while layer-specific optimizations can be applied throughout the pipeline.Source: §1 · pp. 4–5

Scope and organization

• The work is an engineering and infrastructure contribution that builds on established synthesis and benchmarking components while adding pre-compiled dual-model circuits, materialized PBC tableaux, and structural characterization metrics.Its analyses concern static logical-level compilation outputs between algorithm-expression frameworks and physical resource estimators, and the artifacts are publicly available on GitHub.Source: §1 · p. 5

2.1 Quantum Circuit Benchmark Suites

• NISQ benchmark suites such as QASMBench, MQT Bench [25], SupermarQ [26], QED-C benchmarks, Benchpress, and Arline Benchmarks [29] provide standardized workloads and evaluation metrics, but target physical-qubit circuits and near-term compiler or hardware quality.FTCircuitBench adopts their standardized corpora, reproducible pipelines, and workload-characterization philosophy for the fault-tolerant regime, where costs emphasize non-Clifford resources and code-dependent execution constraints.Source: §2.1 · pp. 5–6

2.2 Fault-Tolerant Resource Estimation Frameworks

• Fault-tolerant resource-estimation tools—including Qualtran [30], pyLIQTR, BenchQ, and the Azure Quantum Resource Estimator [33]—estimate resources but generally do not provide standardized compiled logical circuits with structure-level analysis.The missing analyses include interaction topology, non-Clifford spatial-temporal distribution, and PBC Pauli-weight profiles; pyLIQTR generates concrete circuits but focuses on quantum-simulation constructions and does not compile PBC models.Source: §2.2 · p. 6

2.3 Positioning of FTCircuitBench

• FTCircuitBench occupies the compilation-and-characterization layer by materializing Clifford+T and PBC instances from arbitrary QASM inputs and supplying structural metrics to complement physical resource estimators.Its pipeline uses Solovay-Kitaev or precision-adjustable Gridsynth synthesis, then converts Clifford+T circuits to PBC by commuting Clifford gates through T-gates and absorbing them into measurement bases.Source: §2.3 · p. 6, Figure 1 · p. 7

Computational models

• Clifford+T approximates arbitrary Rz(θ) rotations with finite sequences, while PBC uses adaptive Pauli product rotations and measurements after commuting Clifford gates to final measurements.In both models, each non-Clifford step consumes a magic state; PBC circuits are characterized by Pauli weight and support.Source: §3 · p. 7

QEC-code realization

• Surface codes implement logical operations through lattice surgery between patches, whereas high-rate qLDPC codes such as Bivariate Bicycle execute them within densely encoded blocks.These code-dependent implementation costs motivate characterization metrics in Section 5.Source: §3 · p. 7

4 FTCircuitBench Overview

• FTCircuitBench processes QASM algorithms through configurable Clifford+T and PBC compilation stages, producing logical circuit representations and resource-analysis statistics for fault-tolerant studies.Inputs are first compiled to Clifford + Rz(θ), decomposed into Clifford+T using Gridsynth or Solovay-Kitaev [39, 24], and optionally translated to PBC.Source: §4 · p. 8
• Its analysis tools characterize global and local circuit structure through metrics including T-gate spatial-temporal densities, Pauli operator weight distributions, and circuit depth.These statistics target entanglement structure, circuit complexity, and potential fault-tolerant execution bottlenecks.Source: §4 · p. 8

4.1.1 Clifford+T Transpilation

• Gridsynth provides the recommended fast, low-T-count route for precise Rz(θ) synthesis, while Solovay-Kitaev [24] offers configurable recursion and approximation-depth baselines.Gridsynth achieves typical T-count 3 log2(1/ϵ) + O(log log(1/ϵ)) with O(polylog(1/ϵ)) expected runtime, whereas Solovay-Kitaev supports exploration across recursion regimes.Source: §4.1.1 · pp. 8–9

4.1.2 Pauli Based Computation Compilation

• The PBC compiler uses tableau-based reverse traversal to absorb Cliffords, accumulate T-induced Pauli rotations, and iteratively layer and merge them to reduce T-count and T-depth.Layering groups mutually commuting rotations, while merging combines identical rotations or cancels inverse pairs; the process repeats until no further π/4-rotation reduction occurs [36, 9].Source: §4.1.2 · pp. 9–10

4.2 Utilizing FTCircuitBench

• The library offers single-circuit analysis and batch benchmarking with configurable decomposition parameters, command-line and Python interfaces, visualization utilities, and accelerated C++ support for very large circuits [41].The circuit analyzer automates transpilation, PBC conversion and optimization, whereas the benchmark generator evaluates the QASM collection across precision levels and recursion degrees.Source: §4.2 · p. 11

5.1.1 Fidelity

• Fidelity is scalablely lower-bounded by multiplying individual Rz(θ) decomposition fidelities, avoiding Hilbert-space-dimension scaling for user-sized circuits.Gridsynth or Solovay-Kitaev approximations satisfy a specified precision ε, while the product bound uses single-qubit decompositions.Source: §5.1.1 · pp. 12–13

5.1.2 Clifford Gate Counts

• Clifford+T characterization reports per-gate and total counts plus circuit depth, distinguishing easy H, X, Z gates from hard S, CNOT gates.The classification reflects differing surface-code costs, with S and CNOT performed using lattice surgery.Source: §5.1.2 · p. 13

5.1.3 Interaction Graphs

• Weighted interaction graphs capture logical-qubit interactions and lattice-surgery-inducing operations, with modularity, density, degrees, and communities informing compilation and mapping.High modularity indicates independently compilable modules, while high interaction-degree variation suggests greater benefit from intelligent qubit placement; weighted density targets CNOT and lattice-surgery reduction.Source: §5.1.3 · pp. 13–14

5.1.4 T gate Statistics

• T-gate timestamps and target qubits expose temporal bursts, concurrency, and per-qubit demand, informing magic-state-factory throughput and decoding-delay requirements.Inter-T intervals, peak concurrency, and per-qubit mean, variance, and maximum counts characterize spatial-temporal demand.Source: §5.1.4 · pp. 14–15

5.2 Pauli Based Computation Metrics

• PBC metrics compare computational models and optimization strategies through Pauli supports, interaction structure, operator weights, and rotation reductions.Pauli weight counts non-identity terms, while supports identify the participating qubits.Source: §5.2 · p. 15

5.2.1 Interaction Graphs

• PBC interaction graphs connect qubits co-occurring in Pauli supports, typically yielding denser, higher-weight structure than analogous Clifford+T graphs and supporting hardware-mapping analysis.Graph modularity, community counts, and interaction-degree distributions remain available for PBC circuits.Source: §5.2.1 · p. 15

5.2.2 Pauli Weight Statistics

• Pauli-weight distributions reveal entanglement growth and execution difficulty, while FTCircuitBench provides histograms and operator-density colormaps before and after optimization.The same compiled circuit can have different costs across QEC architectures because weight, support geometry, and Pauli type affect implementation differently.Source: §5.2.2 · pp. 15–16

5.2.3 Optimization Metrics

• PBC optimization is evaluated by Pauli rotation-count reduction and average-weight reduction, exposing tradeoffs between reducing circuit depth and lowering high-weight-operation costs.The benchmark includes unoptimized circuits and a basic layering-and-merging baseline for comparison with other compilers.Source: §5.2.3 · p. 16

Benchmark workload classes

• The library spans Hamiltonian simulation, recurring arithmetic and Fourier subroutines, and composite algorithms including phase estimation, linear-systems solvers, and quantum singular value transformation.Instances are provided at multiple sizes and compiled through all Section 4 pipelines.Source: §6 · p. 16

Released circuit representations

• Hamiltonian-simulation circuits use 20 or 5 Trotter steps and are released in Clifford+Rz, Clifford+T, and Pauli Based Computation representations.Clifford+T instances include Gridsynth and Solovay-Kitaev at two settings each.Source: Table 4 · p. 17

Extending the library

• Any OpenQASM 2.0 circuit can enter the pipeline, including Cirq circuits from pyLIQTR and Qualtran bloqs lowered to Cirq [30].The repository documents this ingestion path, while curated qubitization-based simulation entries are planned for a future release.Source: §6 · p. 17

7.1 Circuit Parameters

• The suite specifies four synthesis pipelines, Gridsynth precision ϵ = 10−8, Hamiltonian simulations with 20 Trotter steps and ∆t = 0.05, and QPE constructions for H2 and Hubbard models.QPE used the exact ground state, with H2 in a cc-pVDZ basis truncated to 6 spatial orbitals and 4- and 5-site Hubbard models using U = 5 and t = 1.Source: §7.1 · p. 17, §7.1.1 · p. 18, §7.1.4 · p. 18

7.2.1 Gate Counts

• Circuit sizes span 23 to 39,526,510 compiled Clifford+T gates, while interaction graphs, T-density maps, and PBC statistics expose substantial structural variation across algorithms.The 13-qubit QSVT is the largest circuit, and the 4-qubit adder is the smallest reported example.Source: §7.2.1 · p. 19, §7.2.2 · p. 19, §7.2.3 · p. 19

7.5 Case Study: From Weight Distributions to Architectural Verdicts

• PBC weight profiles distinguish architecture-relevant workloads: 1D Ising circuits are low-weight and placement-tolerant, whereas Heisenberg circuits are predominantly high-weight and difficult on patch-based architectures.The 100-qubit Ising circuit has 630,520 rotations with mean weight 19.97 ± 29.54, while the Heisenberg circuit has 2,902,360 rotations with mean weight 73.51 ± 9.22.Source: §7.3.1 · p. 20, §7.5 · pp. 24–26

7.3.1 Pauli Weight Statistics

• PBC distributions reveal three execution regimes: structured low-weight circuits may be easy to optimize, intermediate circuits retain spatial-temporal structure, and random high-weight circuits are hardest.The 100-qubit 1D Ising, 29-qubit QFT, and 128-qubit 1D Fermi Hubbard examples illustrate these regimes.Source: §7.3.1 · p. 21

7.3.2 Optimization Metrics

• PBC layering-and-merging reduces Pauli-rotation counts but often increases average Pauli weight, characterizing a tradeoff that alternative optimizers may change.The benchmark reports reductions in rotation count and changes in average weight as an optimization fingerprint.Source: §7.3.2 · p. 22

7.4 Parameter Sweeps Across the Compilation Stack

• Synthesis precision increases T-counts predictably for Gridsynth but variably for Solovay–Kitaev, while structural metrics remain nearly unchanged across pipelines.Across 58 circuits, the Gridsynth gs-8/gs-5 median T-count ratio is 1.626, whereas sk-2/sk-1 has median 2.2 and reaches 10.8; interaction-graph density is identical for all 58 circuits.Source: §7.4 · pp. 22–23
• Misaligned Trotter and synthesis precision can trivialize benchmarks: all 33 twenty-step Hamiltonian circuits lose 100% of Pauli rotations under sk-1, compared with less than 0.3% median reduction under Gridsynth.The results motivate aligning algorithm-construction and synthesis error budgets and merging sequential Rz gates before advanced optimization.Source: §7.4 · p. 24, §7.7 · p. 27

7.6 Bridging to Physical Resource Estimation

• The benchmark bridges compiled logical circuits to physical estimation, showing that tightening Gridsynth from ε = 10−5 to 10−8 makes 100-qubit Heisenberg simulation 1.9× longer but increases physical qubits only 4%.The bridge evaluates 234 circuit/pipeline combinations and supports multiple hardware models; arithmetic merging reduces Pauli rotations by 43%, making count-based accounting overestimate sequential operations by 1.75×.Source: §7.6 · pp. 26–27

7.7 Distilled Observations of Fault-Tolerant Compilation

• Circuit statistics and complementary visualizations reveal algorithmic structure, symmetries, subroutines, and interaction patterns that can inform compilation decisions, as illustrated by HHL’s structured registers and uncomputation.The HHL visualization highlights the connected vector-b register as a circuit core and makes the algorithm’s state preparation, controlled simulation, rotations, and uncomputation apparent.Source: §7.7 · p. 29
• FTCircuitBench’s PBC compiler, summary statistics, and visualizations expose unexpected Pauli-weight distributions and help characterize which metrics predict suitability for Clifford+T or PBC execution.Commuting entangling gates through the T-rotation tableau makes PBC circuits difficult to anticipate structurally, complicating hardware-model selection.Source: §7.7 · p. 29

7.8 From Static Circuit Features to System-Level Performance

• Spatial-temporal T-gate density, Pauli supports, and interaction-graph modularity connect static circuit profiles to magic-state throughput, routing and decoding pressure, parallelism, and modular execution.These metrics are direct inputs to dynamic performance, but delivered throughput also depends on magic-state delivery, scheduling, and real-time decoding.Source: §7.8 · pp. 29–30
• Metrics are descriptive statistics grounded in published hardware-derived cost models, not direct measurements, and require validation with cycle-level simulation, decoder-aware studies, and future logical-hardware demonstrations.The benchmark library is intended to provide workloads for these future validation studies.Source: §7.8 · p. 30

8 Conclusion & Outlook

• FTCircuitBench standardizes evaluation of fault-tolerant compilation by connecting algorithmic requirements with architectural constraints.It addresses the complex parameter space in which local optimizations can produce unforeseen global consequences.Source: §8 · p. 30
• The toolkit characterizes algorithms in Clifford+T and Pauli Based Computation models, providing a stable reference for studying algorithm–architecture interactions.Source: §8 · p. 30
• Lower-precision gate decomposition can interact with Pauli Based Computation compilers to trivialize circuits, distorting resource estimates and circuit representations.This demonstrates why local approximation errors must be balanced against global execution overheads.Source: §8 · p. 30
• An end-to-end perspective is necessary to reveal sensitivities across compilation layers and preserve meaningful estimates of computational cost.Source: §8 · p. 30
• The quantitative tooling helps determine decomposition precision, locate bottlenecks in mappings to logical topologies, and assess how compiled-circuit structure affects physical resource estimates.Source: §8 · p. 30
• FTCircuitBench makes structural properties and trade-offs visible through measures such as T-gate densities and Pauli weight distributions.These measurements support co-optimization of algorithms, error-correcting codes, and computational models.Source: §8 · p. 30

QEC principles

• QEC encodes k logical qubits into n physical qubits and uses stabilizer measurements, decoding, and correction or Pauli-frame updates to suppress hardware-induced errors [55].CSS codes construct independent X-type and Z-type checks from pairs of classical linear codes [56].Source: §A.1 · p. 42

Code performance

• When pphys < pth, increasing code distance exponentially reduces plog, whereas above threshold errors proliferate; the surface code has pth ≈0.8% under standard assumptions [57].The code parameters [[n, k, d]] define the physical-qubit count, logical-qubit count, and minimum error weight causing a logical failure.Source: §A.1 · p. 42

Universal computation

• Fault-tolerant universal computation combines fault-tolerant Clifford gates with non-Clifford magic-state injection, most commonly using the T gate [59] [14].The Clifford+T gate set enables arbitrary quantum computations [61].Source: §A.1 · p. 42

Code families

• Surface codes offer strictly two-dimensional local connectivity, while high-rate qLDPC codes can provide substantially better logical-qubit yield but require structured non-local connectivity and added compilation overhead [57] [38].The gross code is a [[144, 12, 12]] BB qLDPC code with r = 1/24, requiring 288 physical qubits and maintaining pth ≈1% [38].Source: §A.1 · pp. 42–43

Compilation and co-design

• Fault-tolerant execution requires compilation models and optimization for mapping and resource trade-offs across qubits, runtime, magic states, and measurement rounds [36] [33].These costs motivate co-designing algorithms with QEC architectures because algorithmic structure and code choice jointly affect total resources [11] [67].Source: §A.1 · p. 43

The Surface Code

• The rotated distance-d surface code uses d^2 physical data qubits to encode k = 1 logical qubit and is both a CSS and qLDPC code.It is defined on a square lattice with local, mutually commuting X- and Z-type stabilizers of weight at most 4, while boundary stabilizers have weight 2.Source: §A.1.1 · p. 43
• Error syndromes from repeated stabilizer measurements are decoded classically, such as with Minimum Weight Perfect Matching (MWPM) [69], to infer and track likely errors without hardware correction.Syndrome outcomes of +1 indicate valid code-space states, whereas −1 signals an error; the code distance d is defined by the minimum nontrivial logical X_L or Z_L operator modulo stabilizers.Source: §A.1.1 · p. 43
• The surface code has an error threshold of p_th ≈ 0.8% under circuit-level uniform depolarizing noise and has received support from experimental demonstrations.Its robustness and local architecture make it a prominent route toward fault-tolerant computation.Source: §A.1.1 · p. 43
• Universal quantum computation in the surface-code framework is typically implemented with the Clifford+T gate set {S, H, T, CNOT}.The framework is associated with high error thresholds, nearest-neighbor connectivity, and a clear path to fault-tolerant computation [57].Source: §A.1.1 · p. 43

• High-rate qLDPC codes achieve asymptotic constant encoding rate and ideally polynomial or linear distance, promising lower qubit overhead than vanishing-rate topological codes such as the surface code.Their checks and qubit participation have constant weight, while bounded-degree structure supports realistic hardware implementation despite nonlocal geometry.Source: §A.1.2 · p. 43
• BB codes [38] [13], including the gross code [38] [76], are prominent high-rate qLDPC candidates with concrete paths toward practical quantum error correction.The gross code has received early hardware demonstrations [75].Source: §A.1.2 · pp. 43–44
• The [[144, 12, 12]] gross code uses 144 data qubits, encodes 12 logical qubits at rate 1/24, reaches p_th ≈1% under circuit-level noise, and supports depth-8 CNOT syndrome extraction.Its weight-six stabilizers yield uniform degree-6 Tanner-graph connectivity; thickness-2 planar decomposition and long-range-interaction platforms suggest implementation routes despite nonlocal 2D-grid connectivity.Source: §A.1.2 · p. 44

A.1.3 The Evolving Landscape of Quantum Error Correction Codes

• QEC code quality depends jointly on parameters, hardware compatibility, logical-gate overhead, and real-time decoding, while non-local qLDPC, modified surface, and Floquet codes illustrate an evolving search for better architectures.Universal FTQC also faces the Eastin-Knill constraint, making code-dependent compilation overheads central to practical viability.Source: §A.1.3 · p. 45

A.2.1 From High-Level Algorithm to Logical Operators

• Compilation transforms high-level algorithms into elementary gates, approximates arbitrary rotations with Clifford+T sequences, and can further convert Clifford+T circuits into Pauli product measurements for PBC architectures.Kernpiler, Qiskit, and t|ket⟩ support initial elementary-gate decomposition, while Ross-Selinger is a common Clifford+T baseline.Source: §A.2.1 · pp. 45–46

A.2.2 Magic States for Universal Computation

• The T-state enables universal computation with Clifford gates, while other resources such as CCZ states and qutrit or arbitrary-angle magic states broaden the universal fault-tolerant resource landscape.The section focuses on T-state purification because it aligns with the computational models under discussion.Source: §A.2.2 · p. 46
• High-fidelity magic-state synthesis is a major fault-tolerant resource cost, with distillation reducing many noisy states to fewer purified states and cultivation growing one encoded state through error-detecting checks.The 15-to-1 protocol yields an output error of approximately 35p^3, whereas cultivation uses code-size increases and an escape into a larger code; both support universal computation with Clifford operations.Source: §A.2.2 · p. 46

A.2.3 Rz to Clifford+T Decomposition

• For Rz(θ) approximation at precision ϵ, Gridsynth produces near-optimal Clifford+T sequences with T-count 3 log2(1/ϵ) + O(log(log(1/ϵ))) and expected runtime O(polylog(1/ϵ)).The method is based on solving Diophantine equations and can find T-optimal solutions with a factoring oracle.Source: §A.2.3 · p. 47
• Solovay-Kitaev provides a general recursive alternative with T-count scaling O(log^c(1/ϵ)), where c is approximately 3.97, making it less favorable than specialized Clifford+T decomposition methods.Although RUS circuits can reduce expected T-count by 2.5 times versus the ancilla-free theoretical lower bound, FTCircuitBench excludes them from baseline circuits because they require ancillas and non-deterministic mid-circuit measurements.Source: §A.2.3 · p. 47

A.2.4 The Clifford+T Computational Model

• Clifford+T is a leading universal fault-tolerant computational model in which Clifford operators supplemented by T-gates approximate arbitrary single-qubit unitaries to arbitrary precision.Its universality follows from the Solovay-Kitaev theorem when the finite gate set generates a dense subgroup of SU(2).Source: §A.2.4 · pp. 47–48
• Although T-count historically dominated Clifford+T resource estimates, magic-state cultivation is narrowing the cost gap with Clifford operations, leaving code-dependent compilation and resource accounting non-trivial.Estimating overheads therefore remains specific to the chosen QEC code and its compilation strategies.Source: §A.2.4 · p. 48

A.2.5 Pauli Based Computation

• PBC reduces circuits to non-Clifford Pauli product measurements by commuting Clifford operations through the circuit, trading explicit Clifford gates for potentially higher-weight measurements.This can improve resource efficiency for codes, algorithms, and architectures that efficiently support multi-qubit Pauli measurements.Source: §A.2.5 · pp. 48–49
• PBC implements non-Clifford π/4 Pauli rotations using |T⟩ magic states, with measurement outcomes driving feed-forward corrections and Pauli-frame updates.The implementation uses joint data-ancilla measurements, conditional Clifford corrections, and software-recorded Pauli corrections.Source: §A.2.5 · p. 48, Figure 14 · p. 49

A.2.6 Optimizing Fault-Tolerant Algorithms

• Fault-tolerant optimization must reduce global implementation cost across synthesis and hardware compilation because local improvements do not guarantee globally optimal resource requirements.A fully global optimization is generally intractable, motivating co-designed optimization across compilation layers.Source: §A.2.6 · p. 49
• Fault-tolerant resource costs depend on restricted logical-gate synthesis and spatio-temporal scheduling, rather than primarily on gate counts or circuit depth.Existing approaches include commutation-aware PPM scheduling and surface-code schedulers that minimize spatio-temporal resources.Source: §A.2.6 · p. 49

A.3 Performing Fault-Tolerant Logical Computation

• Logical-operation overhead is quantified by space-time volume, so computational models should be paired with QEC codes whose native primitives align with the model’s operations.The discussion focuses on Clifford+T and PBC models.Source: §A.3 · p. 50
• For Clifford+T, surface codes support individually addressed single-qubit operations but require lattice-surgery ancilla patches for distant entangling gates, whereas BB codes efficiently realize logical Clifford gates through code automorphisms.BB-code non-Clifford operations still use magic states, and PPM costs depend on the required Pauli strings rather than only the number of T gates.Source: §A.3 · p. 50
• High-weight PPMs are costly in surface codes because they require ancilla-connected lattice-surgery sequences, while BB-code logical-error rates are largely independent of operator weight within a single code patch.BB-code degradation occurs when inter-block logical operators exceed the patch size, making BB codes promising for PBC.Source: §A.3 · p. 50

A.3.1 Performing Logical Clifford+T Gates on Surface Code

• Surface-code logical X and Z gates are transversal, with Z tracked in software through the Pauli frame and adding no operational overhead.These operations can be absorbed into syndrome extraction, while software tracking avoids physical implementation and added error sources.Source: §A.3.1 · pp. 50–51
• The transversal H gate exchanges logical X and Z operators, potentially requiring surface-code patch reorientation and extra overhead.Clifford gates therefore have non-uniform costs even when some are transversal.Source: §A.3.1 · pp. 50–51
• Logical S and T gates use teleportation from |Y⟩ and |T⟩ resource states, with measurement-controlled corrections that can be tracked or applied conditionally.The T-gadget applies a CNOT and X-basis measurement, followed by an S correction with 50% probability; the S-gadget’s Z correction can enter the Pauli frame.Source: §A.3.1 · p. 51, Figure 15 · p. 51
• Surface-code logical CNOTs commonly use an ancilla patch, joint XX and ZZ lattice-surgery measurements, and conditional Z corrections, making overhead layout- and connectivity-dependent.All-to-all platforms can instead execute transversal CNOTs without an ancilla patch, but correlated errors require decoders beyond MWPM.Source: §A.3.1 · p. 51, Figure 15 · p. 51

A.3.2 Performing Pauli Based Computation in the Gross Code

• Gross-code Pauli Based Computation represents circuits as Pauli product rotations R_P(θ)=exp(−iθP/2), with non-Clifford R_P(π/4) rotations typically requiring magic states.Clifford rotations such as θ=π/2 or π do not require magic states.Source: §A.3.2 · p. 51
• An ancilla |T⟩ state enables R_P(π/4) through a first joint measurement of P_D⊗Z_γ, followed by a conditional R_P(π/2) correction.The correction is applied when the first measurement outcome is m_1=+1 and omitted when m_1=−1.Source: §A.3.2 · p. 52
• A second ancilla X measurement produces m_X and conditionally applies R_P(π), completing the measurement-based non-Clifford rotation protocol.The correction is applied for m_X=+1 and omitted for m_X=−1.Source: §A.3.2 · p. 52
• Gross-code conditional Clifford corrections can be commuted out of the circuit, but logical measurements must remain fault-tolerant and synchronized with decoding.Non-Clifford rotations still require an auxiliary system capable of preparing high-fidelity magic states [47] [109].Source: §A.3.2 · p. 52

B Benchmark Algorithm Details

• The selected benchmark algorithms are intended to represent impactful workloads for fault-tolerant quantum computation and to support evaluation across the compilation stack.The library organizes these algorithms as reusable benchmark instances for studying optimization and architecture-aware compilation.Source: B Benchmark Algorithm Details · p. 53

B.1.2 Utility in Quantum Chemistry and Materials Science

• The benchmark’s application scope is motivated by quantum simulation’s relevance to interacting-system dynamics, quantum chemistry, and materials science, where classical methods can become intractable.Strongly correlated electronic systems and many-body material models provide representative challenging workloads.Source: §B.1 · p. 53, §B.1.2 · p. 53

B.1.1 Quantum Simulation Algorithms

• Trotterized quantum simulation is a primary optimization target because it is simple, general, experimentally accessible, and offers substantial co-design opportunities despite nonoptimal asymptotic scaling.The benchmark covers generic second-quantized electronic-structure Hamiltonians and correlated models including Fermi-Hubbard, Heisenberg, and Ising systems.Source: §B.1.1 · p. 53, §B.1.3 · p. 54

B.2 Common Quantum Subroutines

• Quantum arithmetic and QFT workloads capture recurring subroutines whose resource trade-offs expose logical-qubit, depth, CNOT, and non-Clifford costs.FTCircuitBench includes multiple adder designs and QFT implementations because these routines support multiplication, modular exponentiation, phase estimation, Hamiltonian simulation, and other algorithms.Source: §B.2.1 · p. 55, §B.2.2 · p. 55

B.3 Other Quantum Algorithms

• The advanced-algorithm suite includes standard QPE, HHL, and QSVT implementations, covering phase readout, linear-system solution states, and polynomial transformations of block-encoded operators.HHL is especially informative as a composite benchmark because it combines Hamiltonian simulation, QFT, and QPE; QSVT is demonstrated through a linear-system solver.Source: §B.3.1 · p. 56, §B.3.2 · p. 56

C FTCircuitBench Code Example

• The code example demonstrates an end-to-end workflow that compiles an HHL circuit into Clifford+T and PBC forms, analyzes circuit statistics, visualizes structure, and estimates hardware resources.The example uses Gridsynth and Solovay–Kitaev decompositions before PBC layering and merging, then resolves a superconducting hardware model.Source: C FTCircuitBench Code Example · p. 57

D Clifford+T Statistics

• The benchmark reports Clifford+T circuit statistics covering total gates, depth, Clifford and T-family gates, and graph density across algorithm pipelines.These measurements characterize compiled circuit structure for comparing decomposition and optimization choices.Source: Table 5 · p. 58, D Clifford+T Statistics · p. 59

E PBC Statistics

• The benchmark separately reports PBC circuit statistics through raw-rotation measurements, including a dedicated table for Hamiltonian circuits using five Trotter steps.These tables provide workload-specific PBC accounting alongside the Clifford+T statistics.Source: Table 6 · p. 61, E PBC Statistics · p. 62, Table 7 · p. 64