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FTCircuitBench: A Benchmark Suite for Fault-Tolerant Quantum Compilation and Architecture

Adrian Harkness, Shuwen Kan, Chenxu Liu, Meng Wang, John M. Martyn, Shifan Xu, Diana Chamaki, Ethan Decker, Ying Mao, Luis F. Zuluaga, Tamás Terlaky, Ang Li, Samuel Stein

arXiv:2601.03185v2quant-ph

TL;DR

Fault-tolerant quantum computing needs standardized benchmarks and compilation tools because logical execution introduces constraints distinct from NISQ computation. FTCircuitBench provides precompiled Clifford+T and PBC circuits, a configurable end-to-end pipeline, and structural analysis tools; its benchmarks show that compilation-layer interactions can trivialize circuits and distort resource estimates, while validation against system-level simulation remains future work.

  • Problem

    Fault-tolerant compilation lacks standardized accessible circuits and end-to-end tools for comparing optimization strategies across computational models.

  • Method

    FTCircuitBench combines precompiled algorithm benchmarks, configurable Clifford+T/PBC compilation, custom optimization support, and multistage circuit analysis.

  • Results

    The benchmark suite demonstrates that low-precision decomposition can interact with PBC compilation to produce trivialized circuits and distorted resource estimates.

  • Takeaways & Limitations

    FTCircuitBench provides a standardized reference environment for evaluating how algorithm structure, compilation choices, and architecture affect fault-tolerant logical execution.

  • Takeaways & Limitations

    Its metrics are descriptive and hardware-model grounded, but have not yet been validated against cycle-level architectural simulation or hardware execution.

Abstract

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Realizing large-scale quantum advantage is expected to require quantum error correction (QEC), making the compilation and optimization of logical operations a critical area of research. Logical computation imposes distinct constraints and operational paradigms that differ from those of the Noisy Intermediate-Scale Quantum (NISQ) regime, motivating the continued evolution of compilation tools. Given the complexity of this emerging stack, where factors such as gate decomposition precision and computational models must be co-designed, standardized benchmarks and toolkits are valuable for evaluating progress. To support this need, we introduce FTCircuitBench, which serves as: (1) a benchmark suite of impactful quantum algorithms, featuring pre-compiled instances in both Clifford+T and Pauli Based Computation models; (2) a modular end-to-end pipeline allowing users to compile and decompose algorithms for various fault-tolerant architectures, supporting both prebuilt and custom optimization passes; and (3) a toolkit for evaluating the impact of algorithms and optimization across the full compilation stack, providing detailed numerical analysis at each stage. FTCircuitBench is fully open-sourced and maintained on Github.

1 Introduction

FTCircuitBench addresses the lack of standardized fault-tolerant benchmark circuits and end-to-end analysis tools. It provides precompiled Clifford+T and PBC instances, configurable compilation, optimization integration, and circuit characterization.

  • 1 Introduction: Standardized fault-tolerant benchmarks are needed because compilation parameters can interact in difficult-to-predict ways.Relevant parameters include algorithm construction choices such as Trotter steps and approximate gate-decomposition precision.
  • 1 Introduction: FTCircuitBench provides precompiled benchmark circuits in both Clifford+T and Pauli Based Computation models.The library includes unoptimized baseline compilations for comparing transpilation, optimization, resource estimation, and architecture choices.
  • 1 Introduction: The toolkit compiles user-defined algorithms, supports custom optimization passes, and evaluates effects across the compilation pipeline.Users can vary parameters such as decomposition precision and recursion degree while analyzing compiled outputs.
  • 1 Introduction: The benchmark suite targets algorithm instances with varied circuit complexities and supports detailed numerical analysis of their compiled representations.Its metrics include structural statistics intended to characterize low-level and high-level circuit properties.
  • 1 Introduction: FTCircuitBench builds on established synthesis, benchmark, and graph-theoretic components while claiming new precompiled Clifford+T/PBC libraries and a tableau-based PBC pipeline.The paper labels the provenance of characterization metrics individually.

2 Related Work

FTCircuitBench extends NISQ-era benchmarking and fault-tolerant resource-estimation tools with materialized logical circuits and compilation-oriented characterization. Its distinctive role is an intermediate compilation-and-characterization layer connecting algorithm generators to physical resource estimation.

  • 2 Related Work: NISQ benchmark suites emphasize physical-qubit circuits and near-term compiler or hardware quality, whereas FTCircuitBench targets discrete fault-tolerant models.Its cost focus is non-Clifford resources and code-dependent execution constraints.
  • 2 Related Work: Fault-tolerant resource-estimation frameworks commonly derive aggregate counts or symbolic expressions without materializing compiled logical circuits.The cited tools differ in scope, while FTCircuitBench supplies concrete circuit artifacts for analysis.
  • 2 Related Work: FTCircuitBench contributes precompiled Clifford+T and PBC instances, a parameterized compilation pipeline, and structural circuit metrics.The pipeline combines Gridsynth or Solovay–Kitaev synthesis with tableau-based PBC conversion.
  • 2 Related Work: The overview pipeline loads an algorithm, synthesizes Clifford+T circuits through configurable pathways, converts them to PBC, and saves circuits with statistics.The synthesis options are adjustable by recursion degree or approximation precision.

3 Preliminaries

The paper targets two fault-tolerant computational models: Clifford+T and Pauli Based Computation. Their suitability depends on logical-operation costs imposed by the underlying QEC code and hardware topology.

  • 3 Preliminaries: Clifford+T combines Clifford gates with non-Clifford T gates to provide universal quantum computation.Approximated single-qubit rotations use finite Clifford+T sequences, with T gates consuming distilled or cultivated magic states.
  • 3 Preliminaries: PBC uses adaptive non-Clifford Pauli-product operators as an alternative fault-tolerant computational paradigm.Its operational suitability depends on how efficiently the code implements these logical operators.
  • 3 Preliminaries: Fault-tolerant implementation costs depend on the QEC code: surface codes use lattice surgery, while qLDPC codes execute operations within densely encoded blocks.These differences motivate architecture-relevant characterization metrics.

4 FTCircuitBench Overview

FTCircuitBench ingests QASM algorithms, produces configurable Clifford+T and PBC representations, and computes metrics describing their structure and fault-tolerant resource characteristics. Its PBC conversion uses tableau tracking, Clifford absorption, and iterative rotation optimization, while its decomposition baselines expose precision and recursion trade-offs.

  • 4 FTCircuitBench Overview: FTCircuitBench processes QASM algorithms through multistage compilation and evaluates low- and high-level circuit statistics.The framework is designed for studying fault-tolerant architectures and compilation strategies.
  • 4.1.1 Clifford+T Transpilation: Initial transpilation produces Clifford+Rz(θ), after which Gridsynth or Solovay–Kitaev decomposes rotations into finite Clifford+T sequences.Gridsynth exposes precision settings, while Solovay–Kitaev exposes recursion and base-approximation settings.
  • 4.1.1 Clifford+T Transpilation: Gridsynth achieves nearly minimal-length Rz(θ) approximations and typically uses 3 log2(1/ϵ) + O(log log(1/ϵ)) T gates.For fixed precision, the paper identifies Gridsynth as faster in practice and lower-T-count than Solovay–Kitaev, while limited to single-qubit Rz rotations.
  • 4 FTCircuitBench Overview: The resulting PBC circuit contains multi-qubit Pauli rotations followed by varying-weight Pauli-product measurements.The materialized output is suitable for resource estimators and architecture simulators supporting PBC.
  • 4 FTCircuitBench Overview: The PBC pipeline reverses the Clifford+T circuit, absorbs Clifford operations into a measurement tableau, and accumulates T gates as Pauli Z rotations.Tableau transformations track Pauli strings in the Heisenberg picture.
  • 4 FTCircuitBench Overview: PBC rotation optimization iteratively layers mutually commuting rotations and merges identical or inverse rotations to reduce rotation count and depth.The implementation repeats layering and merging until no further reduction is obtained, using earliest-fit layering.
  • 4 FTCircuitBench Overview: The analyzer accepts QASM files and configurable compilation parameters, returning logical circuit representations alongside resource-analysis statistics.The framework prioritizes stable, unoptimized baselines rather than highly optimized circuits.

5 FTCircuitBench Characterization Metrics

FTCircuitBench characterizes fault-tolerant circuits with standard, adapted, and original metrics spanning synthesis fidelity, logical-gate costs, interaction structure, Pauli weights, and optimization effects. Its statistics and visualizations support comparing computational models, compilation choices, and architecture-dependent execution constraints.

  • Overview: FTCircuitBench combines circuit statistics and visualizations to help identify suitable computational models and compilation parameters for algorithm co-design.The toolkit analyzes both high- and low-level circuit features across compilation, error correction, and computational-model choices.
  • 5.1.1 Fidelity: Synthesis fidelity is evaluated by approximating target unitaries with Clifford+T sequences at precision ε, with scalable lower bounds formed from individual Rz decomposition fidelities.Direct fidelity calculation becomes intractable for large circuits, while the product of single-qubit decomposition fidelities avoids Hilbert-space-dimension scaling.
  • 5.1.2 Clifford Costs: The benchmark distinguishes easy Cliffords H, X, and Z from hard Cliffords S and CNOT because surface-code implementations impose different resource costs.S and CNOT are performed with lattice surgery in the surface code, whereas H, X, and Z have low fault-tolerant overhead.
  • 5.1.3 Interaction Graphs: Interaction-graph metrics capture logical connectivity, weighted operation costs, modular structure, and placement opportunities, including high-degree hubs and degree-distribution variability.Weighted graph density is especially relevant when compilers target CNOT and lattice-surgery reduction, while high degree variation indicates potential benefit from intelligent placement.
  • 5.2.2 Pauli Weight Statistics: PBC analysis uses Pauli weights and interaction graphs to expose entanglement structure and architecture-dependent execution difficulty.Weight costs vary across surface-code, BB-code, qLDPC, and long-range-connectivity architectures, so count-only estimators cannot distinguish these regimes.
  • 5.2.3 Optimization Metrics: The toolkit provides baseline unoptimized circuits and a layering-and-merging optimizer for comparing PBC compilation tradeoffs through before-and-after Pauli-weight distributions.Histograms and summary statistics make optimization effects directly visible while preserving unoptimized circuits for baseline comparisons.

6 The Benchmark Library

The FTCircuitBench library covers fault-tolerant workloads from Hamiltonian simulation and recurring subroutines to composite algorithms, with multiple sizes and compilation representations. It also accepts externally generated OpenQASM 2.0 circuits for full-pipeline compilation and characterization.

  • Workload coverage: The library covers Hamiltonian simulation, arithmetic and Fourier subroutines, and composite algorithms including phase estimation, linear-systems solvers, and quantum singular value transformation.These workload classes target condensed-matter and electronic-structure models, recurring algorithmic subroutines, and deep structured circuits.
  • Instance construction: Each algorithm is provided at multiple sizes and compiled through all pipelines described in the benchmark toolkit.Exact generation parameters for the released instances are specified in Section 7.
  • Released representations: Hamiltonian-simulation circuits use 20 or 5 Trotter steps and are released in Clifford+Rz, Clifford+T, and PBC representations.The Clifford+T releases include Gridsynth and Solovay–Kitaev synthesis at two settings each.
  • Extending the library: Any OpenQASM 2.0 circuit can enter the FTCircuitBench pipeline after decomposition to standard gates, enabling compilation and characterization of externally generated workloads.The paper gives ingestion paths from pyLIQTR and Qualtran through Cirq, while identifying scaled qubitization-based entries as a next-release priority.

7 Evaluation

FTCircuitBench evaluation spans circuit scale, interaction structure, operator distributions, synthesis sensitivity, and architecture-level consequences. The results show that compilation choices can change resource costs and PBC structure, while some structural metrics remain stable across synthesis settings.

  • 39,526,510 gates in the 13-qubit QSVT versus 23 gates in the 4-qubit adder demonstrates FTCircuitBench’s broad circuit-size range.
  • 7.3.1 Pauli Weight Statistics: PBC diagnostics distinguish workloads: QFT shows increasing but structured Pauli weights, whereas Hamiltonian-simulation circuits develop random-looking high-weight operators that are harder to optimize.
  • 7.4 Parameter Sweeps Across the Compilation Stack: Synthesis precision changes T-counts predictably for Gridsynth but less predictably for Solovay–Kitaev, with gs-8 achieving tighter error at 2.4× the median T-count of sk-2.
  • 7.4 Parameter Sweeps Across the Compilation Stack: Interaction-graph density is identical across all 58 circuits and Louvain modularity across 37 of 58, separating synthesis-dependent costs from largely synthesis-invariant structure.
  • 7.4 Parameter Sweeps Across the Compilation Stack: Synthesis precision can create misleading PBC optimization gains: all 33 20-Trotter Hamiltonian circuits receive 100% Pauli-rotation reduction under sk-1, but less than 0.3% median reduction under Gridsynth.
  • 7.5 Case Study: From Weight Distributions to Architectural Verdicts: The 100-qubit Ising and Heisenberg circuits have opposite PBC weight profiles, leading to different architecture decisions despite both being Trotterized spin evolutions.Ising has 630,520 rotations with mean weight 19.97 ± 29.54, while Heisenberg has 2,902,360 rotations with mean weight 73.51 ± 9.22; the latter creates large supports and serialization pressure on patch-based architectures.

8 Conclusion & Outlook

FTCircuitBench provides a standardized, modular environment for studying how algorithmic requirements interact with fault-tolerant architectural constraints. Its benchmarks expose cross-layer trade-offs, including cases where low-precision decomposition trivializes PBC circuits.

  • FTCircuitBench offers a standardized environment and modular toolkit for evaluating fault-tolerant compilation across algorithms, optimizations, and architectures.It is intended to navigate the complex parameter space in which local compilation choices can have global consequences.
  • Lower-precision gate decompositions can interact with PBC compilers to produce trivialized circuits, illustrating a cross-layer compilation artifact.The observed interaction motivates balancing local approximation errors against global execution overheads.
  • The toolkit quantifies decomposition precision, execution overheads, logical-topology bottlenecks, and structural effects on physical resource estimates.These analyses support questions about algorithmic integrity, optimization bottlenecks, and the interpretation of count-based estimates.

A.1 Quantum Error Correction

Quantum error correction encodes logical qubits into physical qubits and suppresses errors when physical noise is below a code threshold. Fault-tolerant universality and architecture selection then require managing non-Clifford resources, connectivity, and compilation trade-offs across code families.

  • QEC encodes logical qubits into many physical qubits and can exponentially suppress logical error rates.Stabilizer measurements detect errors by identifying violations of the code’s commuting stabilizer constraints.
  • Below the threshold pphys < pth, logical error rates decrease exponentially with increasing code distance, whereas above threshold they increase.The threshold therefore separates error-suppressing from error-proliferating regimes.
  • Fault-tolerant universal computation requires non-Clifford operations because Clifford gates alone are classically efficiently simulable.The supplied passages identify non-Clifford gates as an additional implementation challenge.
  • Surface codes favor two-dimensional local connectivity, while high-rate qLDPC codes can improve qubit yield but require structured non-local connectivity.The cited comparison describes a trade-off between implementation locality and encoding efficiency.
  • Fault-tolerant execution requires co-design of algorithms, compilation models, and QEC architectures to manage qubit, runtime, magic-state, and measurement-round overheads.Mapping and optimization must account for substantial resource trade-offs across the stack.

A.1.1 The Surface Code

The surface code is a local, lattice-based QEC code whose stabilizers are repeatedly measured to obtain syndromes for decoding. It offers a high threshold and supports universal computation through Clifford+T operations and magic-state-based non-Clifford gates.

  • A rotated distance-d surface code uses d^2 physical data qubits to encode one logical qubit on a square lattice.The code is both a CSS code and a qLDPC code.
  • Repeated stabilizer measurements produce error syndromes that a classical decoder uses to infer likely errors and track them in software.Minimum Weight Perfect Matching is given as an example of a decoding algorithm.
  • The surface code has threshold pth ≈0.8% under circuit-level uniform depolarizing noise and typically realizes universality with {S, H, T, CNOT}.Magic-state injection provides the usual route for universal computation within the surface-code framework.

A.1.2 High-Rate qLDPC Codes: The Bivariate Bicycle Family

High-rate qLDPC codes use sparse, bounded-degree checks without strict two-dimensional locality, and the Bivariate Bicycle family provides a concrete implementation-oriented construction. The gross code exemplifies this trade-off with high encoding rate, regular connectivity, and non-local hardware demands.

  • qLDPC codes use sparse parity checks in which each check and qubit participate in only a constant number of interactions.Unlike surface codes, high-rate qLDPC codes do not require strict two-dimensional geometric locality.
  • Bivariate Bicycle codes are highlighted as promising high-rate qLDPC codes with a concrete route toward practical quantum error correction.Their implementation relevance motivates including them in evaluation and benchmarking.
  • BB-code Tanner graphs admit a thickness-2 decomposition into two planar subgraphs, but their non-local connectivity still imposes hardware and compilation demands.The architecture trades implementation overhead for resource savings.
  • The gross code is a [[144, 12, 12]] BB code encoding 12 logical qubits with rate 1/24 using 288 total physical qubits.It is reported to achieve pth ≈1% and support a depth-8 CNOT syndrome-extraction circuit.
  • The gross code has uniform degree-6 Tanner-graph connectivity, with weight-six checks and each qubit participating in three X-type and three Z-type checks.This regular structure contrasts with the surface code’s variable, typically lower-weight stabilizers.

A.1.3 The Evolving Landscape of Quantum Error Correction Codes

Fault-tolerant compilation must account for evolving QEC-code options, magic-state costs, and increasingly important interactions between decomposition choices and logical resource overheads.

  • QEC-code quality depends on code parameters, hardware compatibility, stabilizer structure, and practical fault-tolerance overhead rather than a single metric.
  • Universal fault-tolerant computation requires non-transversal resources such as T or CCZ magic states because no code supports a universal transversal gate set.
  • Magic-state distillation and cultivation improve fidelity through different procedures, but high-fidelity state synthesis remains a major contributor to fault-tolerant resource cost.
  • Ross-Selinger Gridsynth provides near-optimal Clifford+T decompositions, while Solovay-Kitaev offers an alternative with T-count scaling as O(log^c(1/ϵ)).
  • As magic-state generation costs evolve, T-gate count alone becomes an insufficient resource proxy, motivating broader compilation and architecture-aware evaluation.

A.2.5 Pauli Based Computation

Pauli Based Computation recompiles Clifford+T circuits into adaptive non-Clifford Pauli measurements, trading explicit Clifford execution for potentially higher-weight measurements and architecture-dependent overhead.

  • PBC represents computation through adaptive, varying-weight Pauli product measurements and feed-forward operations, often using T-states for universality.
  • Non-Clifford Pauli rotations such as R_P(π/4) require magic states and measurement-based protocols with classically controlled Clifford corrections.
  • Clifford+T circuits can be converted to PBC by repeatedly commuting Clifford rotations, eliminating explicit Clifford gates and transforming measured Pauli operators when they anticommute.
  • PBC trades many explicit Clifford gates for potentially more complex, higher-weight Pauli product measurements whose cost depends on QEC codes, algorithms, and hardware.
  • Fault-tolerant compilation is multi-stage: local optimizations can have unforeseen global effects, while costs include synthesis and spatial-temporal operation scheduling beyond gate count or depth.

A.3.1 Performing Logical Clifford+T Gates on Surface Code

Surface-code logical Clifford+T operations combine low-overhead transversal or frame-tracked gates with teleportation and lattice-surgery constructions whose costs depend strongly on connectivity and measurement structure.

  • Logical X, Z, and H can be applied transversally, but X and Z may instead be tracked in software, while H can require surface-code patch reorientation.
  • S and T gates are teleported from high-fidelity |Y⟩ and |T⟩ resource states using CNOTs, measurements, and outcome-dependent corrections.
  • A logical CNOT on the surface code typically uses ancilla-mediated XX and ZZ lattice-surgery measurements followed by conditional corrections.
  • All-to-all platforms can execute logical CNOTs transversally without ancilla patches, reducing syndrome-extraction rounds but creating correlated errors that require dedicated decoders.
  • PBC non-Clifford rotations use magic-state ancillas, joint Pauli measurements, and classically controlled corrections whose outcomes must remain synchronized with decoding.

B Benchmark Algorithm Details

FTCircuitBench targets impactful algorithm families, especially Trotterized quantum simulations and reusable subroutines, to support fault-tolerant compilation and co-design studies.

  • Quantum simulation: The benchmark suite emphasizes Trotterized simulation because it is simple, general, experimentally accessible, and offers substantial optimization opportunities despite non-optimal asymptotic scaling.
  • Quantum simulation: Electronic-structure benchmarks use second-quantized Hamiltonians mapped to qubits and evolved with Trotterization, while correlated-electron models include Fermi-Hubbard, t–J, Heisenberg, and Ising systems.
  • Quantum simulation: The Ising model captures single-axis spin dynamics with nearest-neighbor coupling J_z and external-field strength h, supporting studies of many-body phases and dynamics.
  • Reusable subroutines: Quantum adders benchmark CNOT and Toffoli-related non-Clifford overheads using logical-qubit, circuit-depth, and T-gate-count comparisons.
  • Reusable subroutines: The QFT supports phase estimation, Shor's factoring, and Hamiltonian simulation, while QPE is included in its standard implementation.
  • Advanced algorithms: HHL and QSVT provide complex benchmark structures: HHL combines Hamiltonian simulation, QFT, and QPE, whereas QSVT applies tunable polynomial transformations to block-encoded operators.
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