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Learning to Decode in Parallel: Self-Coordinating Neural Network for Real-Time Quantum Error Correction

Kai Zhang, Zhengzhong Yi, Shaojun Guo, Linghang Kong, Situ Wang, Xiaoyu Zhan, Tan He, Weiping Lin, Tao Jiang, Dongxin Gao, Yiming Zhang, Fangming Liu, Fang Zhang, Zhengfeng Ji, Fusheng Chen, Jianxin Chen

arXiv:2601.09921v1quant-phcs.AI

TL;DR

Real-time quantum error correction requires decoders whose throughput keeps pace with continuously generated syndromes, while sliding-window methods face coordination challenges at window boundaries. This work trains a neural decoder whose window outputs can be combined directly, demonstrating scalable parallel decoding and real-time operation up to surface-code distance 25 on one TPU v6e.

  • Problem

    Decoder throughput must match the quantum computer’s syndrome-generation rate, while adjacent sliding-window decoders can produce globally equivalent but boundary-inconsistent corrections.

  • Method

    The neural network outputs one logical correction bit per window, trains adjacent windows for consistency, and combines window predictions with XOR without local merging.

  • Results

    A single TPU v6e enables real-time decoding for surface codes up to distance 25, while the framework remains compatible with alternative sequence models and inference-time efficiency optimizations.

  • Takeaways & Limitations

    Parallel window decoding can support lattice surgery with computational resources scaling linearly with the number of logical qubits, making hardware deployment practically feasible.

  • Takeaways & Limitations

    Training was performed only up to surface-code distance 7, and extensive training for larger distances was beyond the available academic resources.

Abstract

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Fast, reliable decoders are pivotal components for enabling fault-tolerant quantum computation (FTQC). Neural network decoders like AlphaQubit have demonstrated potential, achieving higher accuracy than traditional human-designed decoding algorithms. However, existing implementations of neural network decoders lack the parallelism required to decode the syndrome stream generated by a superconducting logical qubit in real time. Moreover, integrating AlphaQubit with sliding window-based parallel decoding schemes presents non-trivial challenges: AlphaQubit is trained solely to output a single bit corresponding to the global logical correction for an entire memory experiment, rather than local physical corrections that can be easily integrated. We address this issue by training a recurrent, transformer-based neural network specifically tailored for parallel window decoding. While it still outputs a single bit, we derive training labels from a consistent set of local corrections and train on various types of decoding windows simultaneously. This approach enables the network to self-coordinate across neighboring windows, facilitating high-accuracy parallel decoding of arbitrarily long memory experiments. As a result, we overcome the throughput bottleneck that previously precluded the use of AlphaQubit-type decoders in FTQC. Our work presents the first scalable, neural-network-based parallel decoding framework that simultaneously achieves SOTA accuracy and the stringent throughput required for real-time quantum error correction. Using an end-to-end experimental workflow, we benchmark our decoder on the Zuchongzhi 3.2 superconducting quantum processor on surface codes with distances up to 7, demonstrating its superior accuracy. Moreover, we demonstrate that, using our approach, a single TPU v6e is capable of decoding surface codes with distances up to 25 within 1us per decoding round.

1 Introduction

Quantum error correction can suppress physical noise, but practical decoders must handle complex hardware errors and operate fast enough for real-time fault-tolerant computation. Neural decoders improve accuracy potential, yet AlphaQubit’s global outputs and throughput limit prevent straightforward parallel deployment.

  • Quantum error correction: Surface codes encode one logical qubit in a d × d lattice, with code distance d set by the shortest logical operator.Logical fidelity improves as code size grows when physical error rates remain below threshold.
  • Decoder challenge: Decoder performance affects the fault-tolerance threshold because decoding must continuously process syndrome data and infer likely error configurations.MWPM is efficient but misses degenerate configurations and X–Z correlations, preventing optimal accuracy.
  • Hardware noise: Real hardware introduces varying qubit and coupler errors, crosstalk, leakage, and poorly understood processes that simple error models may not capture.Traditional decoders can often work with approximate models but cannot fully exploit the code’s error-correcting potential under these complications.
  • Neural decoding: Neural decoders can learn hard-to-model error features, handle degeneracy and X–Z correlations, and adapt to experimental hardware data.These capabilities have contributed to improved decoding accuracy over traditional human-designed approaches.
  • Deployment bottleneck: AlphaQubit’s throughput is insufficient for real-time superconducting decoding, and its global logical outputs cannot be directly merged across parallel windows.Parallel schemes generally require local physical corrections, whereas AlphaQubit outputs only a single global logical bit.
  • Proposed direction: The proposed approach trains a neural decoder whose per-window logical outputs remain mutually consistent, allowing them to be combined without local merging.The method is motivated by the observation that sufficiently overlapping windows make merge operations rarely necessary while preserving base-decoder accuracy.

2 Background

Real-time decoding requires sustained throughput because syndrome generation continues during computation, while sliding-window methods must manage boundary ambiguity and consistency between neighboring windows. The paper targets AlphaQubit’s incompatibility with local-merging schemes by using consistent per-window logical outputs.

  • 2.1 Real-time decoding: If decoder throughput falls below syndrome-generation rate, latency grows with measurement rounds and can cause progressively worsening stalls.AlphaQubit reportedly takes 20 µs per round even at d = 3, versus a superconducting round time of 1 µs.
  • 2.1 Real-time decoding: Low-level optimizations may reduce single-round latency, but increasing code distance or model complexity can again push inference beyond the 1 µs cycle time.Parallel inference instead allows throughput requirements to be met by increasing parallelism while retaining a constant streaming latency.
  • 2.1 Real-time decoding: Sufficient throughput keeps decoding latency asymptotically constant over long computations, although an initial window-filling latency remains.Parallel sliding-window decoders process subsequent windows at effectively the same latency once enough data has been collected.
  • 2.2 Parallel decoding without local merging: Sliding-window decoding assigns decisions to core regions and uses surrounding buffers, but degeneracy can make adjacent corrections globally equivalent yet inconsistent at their shared seam.A seam detector may connect to a logical boundary through either the core or buffer, creating a logical error when neighboring outputs disagree.
  • 2.2 Parallel decoding without local merging: Existing schemes merge local corrections between windows, which conflicts with AlphaQubit’s graph-independent output of only one global logical-correction bit.This output format prevents direct use of the usual local-merging procedure.
  • 2.2 Parallel decoding without local merging: With a sufficiently large buffer, the probability of residual flipped detectors requiring merging becomes extremely low compared with the logical error rate.For memory experiments, the stated minimum buffer length needed to preserve fault-tolerant distance without merging is d.
  • 2.2 Parallel decoding without local merging: The proposed network predicts one logical correction bit per window, and consistent window outputs can be XORed to obtain the global correction.The approach is designed to avoid local merging while retaining the parallel sliding-window structure.

3 Methods

The method divides syndrome streams into overlapping windows and trains an AlphaQubit-like recurrent model to predict each window’s core-region logical contribution. Labels derived from partitioned local corrections make XOR combination possible, while recurrent and hardware-aware training support deployment on realistic data.

  • 3.1 Parallel neural decoding scheme: Each overlapping window is embedded as a sequence of detector-event tensors and processed recurrently, producing one bit for the window’s core-region contribution.The first and last memory-experiment windows are padded so they can use the same network.
  • 3.1 Parallel neural decoding scheme: Training labels are derived from the physical errors within each window’s core region and their parity with a global logical operator.The local physical-error set is available in simulation but not directly observable in real experiments.
  • 3.1 Parallel neural decoding scheme: The architecture follows AlphaQubit but changes supervision from global logical error to local logical error within each decoding window.The implementation uses hard detector events, while syndrome measurement, soft readout, and leakage inputs remain possible extensions.
  • 3.1 Parallel neural decoding scheme: Because core regions partition the global error set, correctly predicting every window label makes XOR of the window predictions equal the overall logical correction.The converse need not hold: an even number of window mistakes can cancel, whereas inconsistent neighboring predictions can cause a logical error.
  • Training: The model is pretrained on Stim-generated circuit-level noise using binary cross entropy for the binary window-classification task.The window target is the logical-error flip in the core region, obtained from simulation.
  • Training: Recurrent training jointly exposes the network to truncated core sizes τ = 1, 2, …, c, using intermediate recurrent states to produce predictions without extra recurrent-core invocations.This progressively guides learning and is especially useful for larger code distances.
  • Hardware-aware training: After simulation pretraining, the model is fine-tuned for realistic hardware decoding through DEM calibration and subsequent end-to-end adaptation on limited experimental data.Pretraining is reported as important because direct optimization on complex hardware-aware noise is difficult; DEM fine-tuning improves performance over simulation-only training.
  • Hardware-aware training: A differentiable Soft-XOR combines per-window probabilities into a global prediction, enabling end-to-end backpropagation using experimental runs that provide only global labels.This preserves the model architecture while replacing window-level predictions and labels with global counterparts in the final loss.

4 Results

The proposed neural decoder combines parallel window decoding with self-coordination to preserve high accuracy while meeting real-time throughput requirements. Across simulated, hardware, and scalability experiments, it achieves strong decoding accuracy and supports substantially larger code distances than prior neural decoders on a single TPU v6e.

  • Evaluation scope: The evaluation covers decoding accuracy, throughput, and scalability on simulated and experimental data.Traditional baselines include PyMatching, Correlated-Matching, and Belief-Matching, using global decoding graphs and matched decoding priors.
  • Throughput and scalability: A single TPU v6e decodes surface codes up to d = 25 within 1 µs per syndrome round, compared with approximately d = 11 for AlphaQubit 2 on the same hardware.The result is achieved without further engineering optimizations and addresses the throughput requirement for real-time decoding.
  • Decoding accuracy: 0.76% is the neural decoder’s estimated fault-tolerance threshold under the simulated circuit-level noise model.This exceeds the reported thresholds of approximately 0.62% for PyMatching, 0.73% for Belief-Matching, and 0.74% for Correlated-Matching.
  • Self-coordination: Window mispredictions are correlated: global logical error rates are consistently lower than independent-error estimates, especially as code distance increases.At d = 7, many individual window mispredictions pair and cancel in the final XOR operation.
  • Self-coordination: Self-coordination lets separate decoding threads process windows in streaming parallel and combine their 1-bit outputs by XOR for arbitrarily long experiments.The behavior is attributed to consistent, topologically equivalent handling of errors at seams between neighboring windows.
  • Decoding accuracy: The decoder maintains roughly constant logical error rate per round as measurement rounds increase, indicating that parallel decoding does not noticeably reduce accuracy.It significantly outperforms pure MWPM and exceeds Correlated-Matching and Belief-Matching across increasing memory lengths.
  • Throughput and scalability: The demonstrations train models only through distance 7, while training-sample requirements grow rapidly with code distance.The authors report no fundamental architectural barrier to scaling and expect training through d = 11 with comparable hardware resources.
  • Throughput and scalability: The framework achieves real-time decoding through fully parallel processing of disjoint subgraphs, making its parallelism independent of the underlying neural architecture.This distinguishes the strategy from scaling primarily through larger neural models and more computational resources.

5 Summary and Outlook

The work addresses the throughput limitations of neural decoders by enabling parallel inference while retaining high accuracy. It demonstrates real-time decoding scalability and outlines remaining deployment and training challenges.

  • Existing learning-based decoders can be accurate but often lack the throughput and scalability required for real-time fault-tolerant quantum computing.
  • The proposed scheme preserves AlphaQubit-type accuracy while enabling parallelized inference without changing the underlying architecture.
  • A single TPU v6e can reportedly support real-time decoding for surface codes up to distance 25.
  • Current hardware deployment remains limited because final constant decoding latency has not been tuned for small-scale experiments.
  • The framework is compatible with more efficient sequence models and inference optimizations such as quantization, pruning, and KV-cache reuse.

Appendix A Model Architecture in Detail

The architecture converts surface-code syndrome data into spatial embeddings, processes complete decoding windows recurrently with transformer layers, and produces one logical prediction for each core region. Initial, bulk, and final windows are aligned so one network can handle all window types.

  • Window organization: Boundary padding and constant core sizes align the semantics of the three window types for shared processing.
  • Window organization: The global decoding graph is divided into initial, bulk, and final windows, with one initial and final window and m − 2 bulk windows.
  • Syndrome representation: Each syndrome cycle is mapped to a (d + 1) × (d + 1) tensor, flattened into a vector, and prepared for transformer processing.
  • Syndrome representation: A residual Conv1D layer is applied before positional encoding to capture local error features from flattened syndrome data.
  • Syndrome representation: Fixed sinusoidal positional encoding is added to the convolutional representation to preserve spatial location information.
  • Recurrent decoding: The recurrent decoder processes buffer, core, and buffer regions one round at a time, updating its state through syndrome transformer layers.
  • Logical readout: After the final round, convolution, directional pooling, and linear projection reduce the decoder state to a singular logical prediction for the core region.

B.1 Pretraining stage

Pretraining uses large simulated syndrome datasets that are split into mixed decoding windows before optimization. Training requirements increase sharply with code distance and with lower testing physical error rates.

  • Pretraining generates global syndrome data with roughly 3d ∼ 5d rounds and splits it into 3 ∼ 5 decoding windows.
  • The training data are sampled with a relatively large initial physical error rate to help the model learn difficult decoding scenarios.
  • Training samples needed to match traditional-decoder performance grow exponentially with code distance and as the testing physical error rate decreases.
  • The hyperparameter setup includes feature dimension, attention heads, batch size, and learning rate for different code distances.
  • Hardware fine-tuning calibrates a detector error model from empirical syndrome data before sampling mixed window types for neural-network training.

Appendix C Ablation Study

The ablation study evaluates architectural and training choices on distance-3 models using matched datasets and parallel three-window decoding. It identifies batch-normalization behavior and self-consistent joint training as especially important.

  • Ablations are restricted to d = 3 because training costs grow almost exponentially with code distance.
  • The study compares positional-encoding order, batch-normalization statistics, readout blocks, window-specific models, and mixed training.
  • Independent models for different windows underperform the jointly trained approach, supporting the role of self-consistency.
  • All variations use three 200M-sample datasets and are evaluated on 3d-round memory experiments split into three parallel windows.
  • Disabling running statistics in BatchNorm is essential, likely because recurrent batches are not identically distributed between training and evaluation.
  • The ordering of positional encoding and ResNet appears less important, while the Feedforward layer converges better than GatedDenseBlock at larger distances.

Appendix D Noise Analysis of Hardware Data

The analysis motivates in-situ diagnosis because experimental superconducting processors exhibit structured, non-i.i.d. noise, and introduces detection event probability as a compact probe of temporal and spatial noise variation. It also states consistency assumptions needed for analyzing parallel sliding-window decoding.

  • Hardware noise analysis: Experimental superconducting processors can exhibit long-lived leakage and correlated errors across QEC cycles, violating common i.i.d. noise assumptions.This motivates diagnosing the hardware error environment directly from detection events.
  • Hardware noise analysis: Detection event probability (DEP) probes effective full-cycle noise while revealing temporal non-stationarity and spatial heterogeneity.The passage identifies transient-to-steady-state behavior, end-of-sequence effects, slow drift, and variation across patch locations or detector types.
  • Parallel-decoding assumptions: Parallel decoding without merging may remain viable when the buffer region is at least d, with consistency between neighboring windows as an essential ingredient.This is presented as an argument motivating the buffer-size choice rather than a direct neural-decoder result.
  • Parallel-decoding assumptions: A QEC event is exponentially unlikely when a threshold pth exists such that its probability decays exponentially under the stated condition.
  • Parallel-decoding assumptions: For a decoding graph, the boundary ∂C contains vertices incident to an odd number of edges from edge subset C.Virtual vertices on a window’s time boundary may belong to the boundary, whereas virtual vertices of the entire graph do not.
  • Parallel-decoding assumptions: The analysis assumes adjacent-window correction subsets are identical whenever they produce the same detection-event boundary.This property is expected for MWPM when edge weights are perturbed to break ties.

E.2 Proof

The proof shows that, under the correction-consistency assumption, a non-trivial seam syndrome requires a physical error configuration with total weight at least half the weighted buffer size. The argument uses the symmetric difference between corrections from adjacent windows.

  • Theorem: A non-trivial seam syndrome requires a physical error configuration with total weight at least wb/2, where wb is the weighted buffer size.The weighted buffer size is the shortest weighted distance from a seam vertex to a virtual time-boundary vertex.
  • Proof: The symmetric difference D = C1 ⊕ C2 has a boundary entirely outside the overlap because both window corrections agree with observed detection events there.
  • Proof: A connected component of D touching a seam vertex must also reach outside the overlap, creating a path of weighted length at least wb.
  • Proof: Because the path is composed of edges from both corrections, one window correction has weight at least wb/2, and MWPM bounds the physical-error weight from below by the correction weight.

E.3 Discussion

The theorem’s weight bound is not sufficient for a practical exponential-probability result, so the discussion states a conjecture requiring a buffer size of at least d and highlights the unresolved counting difficulty.

  • Discussion: The theorem may be impractical because a window contains O(d^3) possible error locations, making total error weight almost certainly larger than wb at constant physical error rate.
  • Discussion: When the buffer size is at least d and Assumption 1 holds, the parallel MWPM sliding-window decoder is conjectured to produce non-trivial seam syndromes with exponentially small probability.
  • Discussion: A counting proof remains difficult because the correction path avoids certain space-boundary contacts while physical errors may touch the space boundary.The discussion notes that total physical-error weight still bounds correction weight, but the physical errors have more freedom in their paths.

E.4 Idea to prove Conjecture 1

The proposed proof strategy counts candidate physical-error and correction paths associated with seam syndromes. It argues that candidate probabilities and counts form a geometrically decaying series under sufficiently low physical error rates, yielding an exponentially unlikely bound.

  • Candidate construction: The proof constructs a path P in the symmetric difference between adjacent-window corrections and separates its correction edges from the remaining candidate construction.
  • Candidate construction: Candidate pairs are generated in two phases: first a path and correction subset are chosen, then the remaining physical-error and correction edges are constructed.
  • Counting candidates: For candidates taking n steps, the number of possibilities is bounded using the seam-vertex count and maximum graph degree.The stated bound is N̂_n = |V_seam| · (2k)^n.
  • Probability bound: The candidate probability is bounded using the fact that one correction component carries at least half the path weight.
  • Exponential decay: For sufficiently large minimum edge weight, the product of candidate probability and candidate count forms a geometrically decaying series.
  • Exponential decay: With b = 4⌈d/2⌉, the leading term scales as poly(d) · O(p)⌈d/2⌉, and sufficiently small p keeps the full sum exponentially unlikely.The passage also reports experimental validation of this observation in Fig. E5.
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