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Spacetime-Efficient and Hardware-Compatible Complex Quantum Logic Units in qLDPC Codes
Willers Yang, Jason Chadwick, Mariesa H. Teo, Joshua Viszlai, Fred Chong
TL;DR
Utility-scale qLDPC computing must address not only footprint but also efficient logical operations for relevant algorithms. RASCqL co-designs qLDPC codes, targeted compilations, and reconfigurable neutral-atom implementations around common subroutines such as arithmetic and state preparation. It reports 2×–7× footprint reductions with space-time volume comparable to surface-code architectures, while acknowledging remaining full-system scheduling and decoder-latency gaps.
Problem
Although qLDPC codes reduce footprint, achieving utility-scale computation with high threshold, high rate, and space-time-efficient logical operations remains challenging.
Method
RASCqL co-designs qLDPC codes with a specialized CISQ instruction set, targeted subroutine compilations, predictive resource-state preparation, and reconfigurable neutral-atom implementations.
Results
RASCqL reports up to 7x footprint reduction for adders, 10× volume reduction for GHZ states, and space-time reductions or comparable costs relative to surface-code baselines.
Takeaways & Limitations
The results support treating qLDPC codes as specialized accelerators for dominant algorithmic subroutines rather than reproducing a universal RISC-style instruction set.
Takeaways & Limitations
End-to-end performance remains dependent on efficient resource-state provisioning, full-system scheduling, and decoder latency; the study conservatively assumes decoding on the order of a 3.9 ms QEC cycle.
Abstract
from arXiv · showhide
Quantum low-density parity-check (qLDPC) codes offer a promising route to scalable fault-tolerant quantum computing due to their substantially reduced footprint. However, these gains can be diluted at utility scale if we cannot also realize space-time efficient logical operations for relevant quantum applications. We present RASCqL, a reaction-time-limited architecture for space-time efficient complex-instruction-set quantum computation with qLDPC logic. RASCqL supports key algorithmic subroutines such as quantum arithmetic and state preparation directly within co-designed qLDPC codes, achieving $2\times$ to $7\times$ reductions in qubit footprint while maintaining space-time volume comparable to state-of-the-art transversal surface-code architectures. Unlike prior approaches that aim for versatile logical instruction sets for arbitrary circuits, RASCqL adopts an application-tailored code modification that embeds specific complex Clifford transformations useful for common subroutines as virtually implementable operations arising from code automorphisms. RASCqL further leverages parallel physical operations available in reconfigurable neutral-atom arrays to enable fast QEC cycles and high-fidelity transversal operations. At the cost of increased design complexity and specialization, RASCqL can improve end-to-end resource estimates for applications such as factoring and quantum chemistry simulation in both footprint and space-time volume under realistic physical error rates of approximately $2\times10^{-3}$ to $5\times10^{-4}$, without requiring additional hardware capabilities. These results demonstrate that qLDPC codes can serve as complex quantum logic units for useful quantum algorithms, extending their practical utility in fault-tolerant quantum computing architectures.
1 Introduction
RASCqL addresses the tension between qLDPC codes’ lower footprint and their limited logical instruction sets by tailoring codes and compilations to useful quantum subroutines. The architecture combines specialized qLDPC logic with neutral-atom implementations to improve arithmetic and state-preparation resources while retaining hardware compatibility.
- FTQC requires logical operations with error rates as low as 10^-9 to 10^-16, while current devices operate near 10^-3 physical error rates.
- Surface codes provide hardware-compatible, expressive logical operations but incur qubit overhead that can reach 1000× physical qubits per logical qubit.
- qLDPC codes can reduce space-time overhead but introduce greater hardware complexity and more limited instruction sets.
- RASCqL co-designs qLDPC codes with targeted compilations so limited automorphism gates directly accelerate adders, magic-state distillation, and quantum lookup.
- Up to 7x footprint and 1.25x Clifford-volume reductions are reported for adders versus transversal surface-code baselines, alongside 10× volume reduction for GHZ-state factories.
- The architecture supplies explicit neutral-atom layouts and movement schedules, with millisecond-scale QEC cycles and resource estimates for factoring and chemistry subroutines.
2 Background
qLDPC codes can reduce space-time overhead but impose greater hardware complexity and more limited logical instruction sets than surface codes. RASCqL addresses this gap by specializing qLDPC codes for useful subroutines while retaining hardware compatibility and in-block execution.
- The FTQC stack connects abstract algorithms, error-correcting logical operations, and hardware-dependent physical implementation costs.
- Surface codes offer simple local checks and expressive logical primitives, but their qubit overhead scales quadratically with code distance.
- qLDPC codes can avoid polynomial space-time overheads in distance, but generally trade this advantage for greater hardware complexity and limited instruction sets.
- Existing qLDPC approaches struggle to deliver competitive utility-scale space-time performance when generic algorithms are compiled through surface-code-like RISC instructions.
- RASCqL instead co-designs qLDPC codes with a limited set of automorphism-based operations tailored to recurring subroutines such as arithmetic, magic-state distillation, and lookup.
- RASCqL trades flexibility and design simplicity for in-block logical execution, retaining footprint advantages and matching reconfigurable neutral-atom capabilities.
3 RASCqL Architecture
RASCqL compiles supported algorithms into tailored qLDPC-based complex instructions, uses predictive resource-state preparation to limit reaction time, and maps logical operations to parallel neutral-atom hardware schedules. Its simulations and physical compiler support realistic estimates of logical performance and space-time cost.
- RASCqL architecture: RASCqL compiles input algorithms into supported subroutines executed by co-designed Complex Quantum Logic Units and Predictive Resource-State Preparation.
- CQLU design: The architecture embeds a small group of useful Clifford operations as code automorphisms through LDPC-preserving code modifications.
- CQLU design: Instance-specific measurements and CNOT fan-outs use gate teleportation with O(1) reaction time when resource states are provisioned.
- PReP design: Resource states support non-native gates and reactive measurements, whose implementation speed determines runtime and reaction-time-limited space-time volume.
- PReP design: PReP predicts and provisions modified GHZ states, reducing reaction time to O(1) in expectation and enabling savings from pipelining.
- Physical implementation: The physical compiler maps QEC cycles and complex instructions to explicit movements, gate schedules, and mappings on reconfigurable neutral-atom arrays.
- Physical implementation: Circuit-level noise simulations estimate logical performance using additional gate errors and idle time, reporting a 0.78% threshold for neutral-atom HGPS codes.
4 Methods
RASCqL constructs application-tailored qLDPC complex quantum logic units by embedding useful logical operations as code automorphisms and compiling subroutines onto them. The design combines virtual operations, resource-state provisioning, and hardware-compatible neutral-atom execution.
- CQLU Construction: RASCqL modifies codes to embed selected logical operations as matrix automorphisms, enabling those operations through virtual qubit relabeling.The construction adapts augmentation and extension techniques and provides a general virtual-instruction theorem.
- CQLU Construction: Q4’s simple one-direction check shifts improve cycle time relative to codes requiring two-direction shifts under RNAA systolic scheduling.The comparison includes rotated surface and bivariate bicycle codes.
- CQLU Construction: Simplex-seeded HGP codes provide dirty cyclic shifts and a four-bit CNOT circuit as matrix automorphisms for the CQLU instruction set.For Q4, the [[450, 32, 8]] code supports both automorphism families without additional overhead.
- State Preparation: CQLU instructions prepare GHZ states by applying embedded operations across a block and selectively measuring qubits outside the desired support.Arbitrary-support preparation first entangles the qubits, then measures out unwanted positions using a mixed |0⟩/|+⟩ pattern.
- State Preparation: For magic-state distillation, magic-state injection is the only non-native operation and dominates resource costs.Future improvements to injection schemes could improve RASCqL performance.
- Targeted Compilation: Adder compilation maps fan-in and fan-out operations to repeated embedded CNOT circuits and global H gates, with reactive corrections handled after measurements.The compilation targets Gidney’s ripple-carry adder and uses separate qLDPC blocks for bridge qubits.
5 Evaluation
The evaluation uses circuit-level simulations and compares RASCqL subroutines with surface-code baselines across logical errors, state preparation, magic-state distillation, and adders. RASCqL achieves substantial footprint reductions, while space-time benefits vary by workload and resource assumptions.
- Simulation Setup: Circuit-level simulations model initialization, measurement, gate, idle, movement, and transversal-operation errors using Stim and BP-OSD decoding.The noise model assigns probability p to initialization and measurement bit flips and one- and two-qubit depolarizing errors, with additional errors for movement-based operations.
- GHZ State: More than 7× GHZ-state footprint reduction translates to similar space-time-volume savings relative to the transversal surface-code baseline.The comparison uses CQLU-optimized GHZ preparation.
- Magic State Distillation: Magic-state distillation achieves up to 2× footprint reduction, but space-time volume can be 3× worse.The evaluation spans HGPS, concatenated HGPS–surface-code schemes, and surface codes across multiple distances.
- Adders: Adder implementations achieve up to 7.84× footprint reduction and up to 1.25× Clifford-volume reduction compared with the surface-code baseline.The 1.25× volume result uses a 3.9 ms reaction time, while the analysis excludes magic-state generation costs.
- Adders: Adder Clifford volume remains only 50% worse when RASCqL reaction time is increased to 10× the surface-code value.This comparison also excludes the cost of generating |T⟩ states.
6 Discussions
RASCqL co-designs qLDPC codes, logical instructions, functional compilation, and neutral-atom implementations to execute selected subroutines directly in-block. It reports footprint and spacetime advantages while identifying resource-state scheduling, decoder latency, and code-family exploration as remaining scale-up issues.
- Results: Up to 7x footprint reduction is achieved for reaction-time-limited adders, with spacetime reduction in Clifford volume against surface-code baselines.State factories have comparable costs to state-of-the-art surface-code baselines.
- Limitations: End-to-end scaling remains incomplete because the reaction-time model assumes efficient provisioning, storage, and routing of resource states.The paper calls for a full-system scheduler jointly optimizing footprint, latency, and state throughput.
- Limitations: Decoder latency is also unresolved: the evaluation conservatively assumes decoding on the order of a 3.9 ms QEC cycle despite sub-millisecond decoder proposals.Sensitivity analysis across decoder latency, movement time, gate duration, and measurement overhead is identified as necessary.
- Future directions: Although HGPS codes are the focus, the code-modification framework is stated to apply to other quantum error-correcting code families.The paper proposes searching jointly over automorphism structure, LDPC constraints, and hardware compatibility.
- Architectural perspective: RASCqL treats qLDPC codes as specialized accelerators for dominant algorithmic subroutines rather than reproducing a universal RISC-style instruction set.The paper frames this complex-instruction-set approach as a question of how far it can scale toward full utility-level workloads.
A.3 Logical Operations
Logical operations are represented as code-preserving coordinate permutations whose induced transformations act on encoded information. The paper distinguishes automorphism groups from their logical automorphism gates and relates these structures to check-matrix transformations.
- Definitions: A code automorphism is a coordinate permutation that preserves the code and induces a logical transformation through an invertible linear map.The resulting operations are distance preserving when qubit permutations are treated as noiseless or virtually relabeled.
- Group structure: The automorphisms form a group under composition, while the associated automorphism gates form a group of logical transformations induced through the generator matrix.The mapping from code automorphisms to automorphism gates is described as a group homomorphism.
- Representation: When generator-matrix columns are unique, the automorphism-group representation and the resulting logical-action representation are isomorphic.The paper separately notes that duplicated columns require tracking before code modification when distance guarantees matter.
- Check compatibility: A matrix automorphism is a code automorphism whose induced transformation also preserves the check-matrix structure.This condition connects logical coordinate permutations to stabilizer-check transformations.
A.5 Automorphism group of the Simplex codes
Simplex-code automorphisms provide a rich source of logical transformations, and HGPS constructions transfer these actions to selected logical sectors. Fault-tolerant realization requires additional matrix-automorphism or gauge-qubit structure.
- Simplex automorphisms: The simplex code's automorphism group contains all linear transformations, saturating the upper bound for codes with the same number of logical bits.The corresponding automorphism-gate statement is L_G(S_r) = GL_r(F2).
- Fault-tolerant realization: HGPS codes inherit logical gates from simplex automorphisms, but physical fault-tolerant permutations require the classical automorphisms to also act as check-matrix automorphisms.The paper states that this condition does not hold in general.
- Left-sector construction: Gauging out problematic right-sector logical qubits yields a left-sector subsystem code on which selected tensor-product automorphisms act fault-tolerantly.The construction designates right-sector logical qubits as gauge qubits and applies the logical transformation to left-sector qubits.
- Fault tolerance: Fault tolerance is preserved because entangling gates affect gauge-supported qubits while logical observables remain disjoint from those physical qubits.The paper argues that the distance of the dressed logical operators therefore cannot decrease.
- Instruction coverage: The HGPS construction can efficiently synthesize arbitrary CNOT-type operators with doubled qubit overhead but cannot implement diagonal gates through that approach.
- Trade-off: Rich automorphism groups can reduce encoding rate, motivating codes that embed only the smaller gate subsets required by practical computations.The paper identifies this as a design question for improving code efficiency.
B.1 Prescribing Automorphisms
The automorphism-completion framework constructs code families that embed prescribed logical transformations while controlling code length, distance, and LDPC check weight. Specialized choices can make selected commuting circuits virtual, with overhead depending on the target group and sparsity.
- Automorphism completion: An automorphism-completion construction embeds a prescribed group of logical transformations into a code family with bounded length and distance changes.For a group of size m, the construction gives n′ ≤ nm and d′ ≤ dm.
- Construction: The construction forms an invariant set of generator-matrix columns under the desired group and uses it to define the modified code.This orbit-based construction is paired with a check matrix retaining LDPC properties.
- Overhead trade-offs: Expanding to the full GL_k(F2) automorphism group can cause exponential code-length growth, while smaller groups can provide sharper length and distance guarantees.The simplex code appears at the extreme with n = 2^k−1 after redundancy removal.
- LDPC preservation: The modified code preserves LDPC structure when the original checks and prescribed automorphisms have bounded row and transformation weights.The resulting check matrix is (w + t + 1)-bounded under the stated assumptions.
- Construction: The framework's general construction uses orbit and basis transformations to produce a valid check matrix for the prescribed automorphism group.
- Specialized expansions: For CNOT fan-out on up to w+1 bits, a code with parameters [2n,k,2d] can embed the operation while using a (w + 2)-bounded check matrix.
- Specialized expansions: A set of m commuting CNOTs on t bits can be made virtual in a code with parameters [nm,k,md] and (w + t + 1)-bounded checks.The result applies to circuits involving only the prescribed commuting CNOT set.
B.2 Converting Automorphisms
The section develops conversions that turn selected code automorphisms into matrix automorphisms, enabling fault-tolerant logical operations through qubit relabeling. The constructions bound the added checks and preserve controlled sparsity under stated assumptions.
- Matrix automorphism condition: Matrix automorphisms are characterized by row invariance under coordinate permutations, expressed by Hσ = ρH.This condition makes the induced logical action compatible with the check matrix.
- Matrix Automorphism Conversion: Theorem 5 constructs a check matrix with at most (n−k) × m rows, while increasing check weight from w to wm.The construction stacks transformed checks and removes duplicate rows.
- Expanded Matrix Automorphism Conversion: Theorem 6 expands a code to [[nm,k,dm]] with (w+mt)-bounded checks and (m−1)mk additional checks, making every g ∈ G a matrix automorphism.The result applies when the original checks and group elements are respectively w- and t-bounded.
- Local CNOT conversion: For an order-2 CNOT circuit on t bits, conversion requires t additional checks and increases check weight to at most w+t+1.The converted matrix admits a row permutation satisfying ρH′σ = H′.
- Logical implementation: These guarantees lift to Hypergraph Product and Homological Product codes, where automorphisms become fault-tolerant logical operations implemented by qubit relabeling.The section focuses on HGPS codes and their matrix automorphism groups.
C.1 Dirty Shifts
Dirty cyclic shifts are realized as matrix automorphisms of binary simplex codes, with a basis chosen so the induced logical action combines a cyclic row permutation and CNOT fanout.
- Construction: For the binary simplex code S_r with circulant check matrix H_r, the cyclic shift P_(2^r−1) is a matrix automorphism.A suitable generator basis realizes the corresponding logical action.
- Logical action: The induced logical operation implements a cyclic row permutation of the generator matrix together with a CNOT-fanout gate.The basis is built from cyclic shifts of a spanning nonzero codeword.
C.2 autoCNOTs
The section constructs autoCNOT-related logical actions from matrix automorphisms of the simplex code and shows that generator-basis choices can embed desired operations within a conjugacy class. The construction supports additional transversal operations in HGPS codes, but larger simplex codes require code modifications.
- S4 automorphism: For S4, the permutation P_auto is a matrix automorphism under H4 = I + P15 + P4.A suitable basis realizes logical actions conjugate to the induced permutation action.
- Basis selection: Changing the generator matrix by an invertible basis transformation produces different logical operators in the same conjugacy class.This gives multiple code realizations with distinct desired logical actions.
- Instruction-set design: Many choices satisfy the propositions, yielding codes with desired instruction sets.The result connects the automorphism construction to application-specific logical ISAs.
- Limitation: For r > 4, numerical searches found that the reported primitive polynomials do not admit similar symmetries, making code modifications unavoidable.More general circulant constructions are left for future work.
- Additional transversal operations: HGPS codes also provide transversal H-SWAP, CZ-S, sibling-CZ, homomorphic CNOT, and homomorphic measurement operations.These operations support diagonal-state production and consumption in the code construction.
D Circuit Compilations
The circuit-compilation section derives exact CQLU implementations for quantum adders and related state preparation by commuting corrections and measurements. It also identifies offline preparation opportunities for initial states, T states, and GHZ states.
- CQLU compilation: CQLU circuits are compiled explicitly for a quantum adder and related state-preparation routines.The derivation includes the full adder and motivates analogous transformations for UMA and temporary AND-Toffoli circuits.
- Adder derivation: The adder derivation propagates Pauli and S corrections, commutes CNOTs through Bell measurements, and introduces corresponding CNOT corrections.These transformations produce the exact compiled circuit while tracking corrections in software when they commute with non-Clifford operations.
- Related subroutines: UMA and temporary AND-Toffoli derivations follow similar transformations, while QROM uses temporary-AND Toffolis and CNOT fanouts consuming an n-qubit GHZ state.The GHZ resource is included in the compiled circuit description.
- Offline preparation: Initial-state preparation and T preparation can be performed completely offline, while GHZ preparation for reactive measurements can be mostly offline.The GHZ path requires two additional CNOTs and one measurement.