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ArchAgent: Agentic AI-driven Computer Architecture Discovery
Raghav Gupta, Akanksha Jain, Abraham Gonzalez, Alexander Novikov, Po-Sen Huang, Matej Balog, Marvin Eisenberger, Sergey Shirobokov, Ngân Vũ, Martin Dixon, Borivoje Nikolić, Parthasarathy Ranganathan, Sagar Karandikar
TL;DR
ArchAgent addresses the need for faster specialized computer-architecture discovery by combining AlphaEvolve with ChampSim in an iterative design-and-evaluation flow. It automatically discovers cache replacement policies and achieves improvements over prior SoTA across SPEC and Google workload traces, while also revealing infrastructure and generalization challenges.
Problem
Hardware specialization remains human-time-intensive, while automated discovery beyond parameterized design-space exploration is limited.
Method
ArchAgent combines AlphaEvolve, ChampSim, and distributed evaluation to iteratively generate architecture code, evaluate it, and evolve new cache replacement mechanisms.
Results
ArchAgent achieved 5.3% better IPC speedup over prior SoTA on Google Workload Traces within two days and 0.9% on single-core SPEC06 within 18 days, 3-5× faster than humans.
Takeaways & Limitations
The results provide a proof of concept for agentic architectural discovery and motivate improved research infrastructure and continued experimentation with AI tools.
Takeaways & Limitations
The paper identifies unresolved issues involving overfitting versus specialization, extrapolation from representative workloads, and the adequacy of community evaluation infrastructure.
Abstract
from arXiv · showhide
Agile hardware design flows are a critically needed force multiplier to meet the exploding demand for compute. Recently, agentic generative AI systems have demonstrated significant advances in algorithm design, improving code efficiency, and enabling discovery across scientific domains. Bridging these worlds, we present ArchAgent, an automated computer architecture discovery system built on AlphaEvolve. We show ArchAgent's ability to automatically design/implement state-of-the-art (SoTA) cache replacement policies (architecting new mechanisms/logic, not only changing parameters), broadly within the confines of an established cache replacement policy design competition. In two days without human intervention, ArchAgent generated a policy achieving a 5.3% IPC speedup improvement over the prior SoTA on public multi-core Google Workload Traces. On the heavily-explored single-core SPEC06 workloads, it generated a policy in just 18 days showing a 0.9% IPC speedup improvement over the existing SoTA (a similar "winning margin" as reported by the existing SoTA). ArchAgent achieved these gains 3-5x faster than prior human-developed SoTA policies. Agentic flows also enable "post-silicon hyperspecialization" where agents tune runtime-configurable parameters exposed in hardware policies to further align the policies with a specific workload (mix). Exploiting this, we demonstrate a 2.4% IPC speedup improvement over prior SoTA on SPEC06 workloads. Finally, we outline broader implications for computer architecture research in the era of agentic AI. For example, we demonstrate the phenomenon of "simulator escapes", where the agentic AI flow discovered and exploited a loophole in a popular microarchitectural simulator - a consequence of the fact that these research tools were designed for a (now past) world where they were exclusively operated by humans acting in good-faith.
1 Introduction
ArchAgent addresses the need for faster specialized hardware discovery by using agentic generative AI to iteratively design and evaluate architecture code. It discovers cache replacement policies, including beyond-SPEC and post-silicon tuning results, while exposing limitations and infrastructure implications.
- Motivation: ArchAgent targets the gap between exploding compute demand and human-time-intensive domain specialization in hardware design.The paper asks whether generative AI can accelerate early architecture discovery, ideation, and pathfinding.
- Approach: ArchAgent uses agentic evolutionary tools to express and evaluate new architecture concepts as code in standard microarchitectural simulators.Quantitative simulator feedback guides iterative improvement of newly developed mechanisms and logic.
- Results: 0.9% IPC speedup improvement over the prior SoTA was achieved on single-core SPEC 2006 with prefetching, similar to prior winning margins.ArchAgent achieved these gains 3-5× faster than humans.
- Results: 5.3% IPC speedup improvement over prior SoTA was achieved on public Google Workload Traces within two days.The traces extend discovery beyond SPEC workloads toward hyperscale workloads.
- Post-silicon hyperspecialization: ArchAgent further improved IPC speedup by 2.4% on average through post-silicon tuning of runtime-configurable policy parameters.The reported maximum improvement was 8.1% on mcf_46B.
- Implications and limitations: The paper presents ArchAgent as a proof of concept while highlighting open questions about overfitting, specialization, workload extrapolation, and evaluation infrastructure.The authors call for continued experimentation and infrastructure improvements.
2 Background
The paper situates ArchAgent at the intersection of agentic evolutionary coding systems and cache replacement research. Cache replacement competitions use common configurations and workload-based IPC scoring, while prior gains are typically small and increasingly difficult to obtain.
- Agentic discovery: Agentic coding agents combine LLMs with evolutionary search to automatically generate and evaluate code across discovery domains.They can evolve entire code files after receiving human setup instructions.
- Cache replacement competitions: CRC competitions compare cache replacement algorithms under fixed storage budgets and predefined single- and multi-core configurations.CRC-2 separately ranked four tracks covering prefetching and core-count conditions.
- Evaluation: Single-core CRC scores use geometric-mean speedup, whereas multi-core scores use weighted speedup across workload sets.The scoring framework aggregates performance across single-threaded, multiprogram, and multithreaded workloads.
- Prior results: Prior cache replacement winners typically reported 1%-3% IPC improvement margins over earlier winners in single-core configurations.These comparisons span SPEC, GAP, CVP1, and other workload mixes.
- Research challenge: Winning margins are small and shrinking, although successive 1%-3% advances have accumulated through sustained research effort.The trend indicates a difficult problem with diminishing remaining headroom.
3 ArchAgent System Design
ArchAgent integrates AlphaEvolve with ChampSim and distributed evaluation to iteratively generate cache replacement policies and optimize IPC. The design addresses prompt conditioning, workload selection, simulator cost, shortened evaluations, and distributed execution challenges.
- System architecture: ArchAgent integrates AlphaEvolve, ChampSim, and distributed evaluation to generate candidate cache policies and guide evolutionary search with IPC feedback.AlphaEvolve can rewrite ChampSim C++ files, but the reported experiments restrict it to last-level cache replacement policies.
- Prompting: AlphaEvolve receives a prompt containing task context, architectural background, persona, guidance, prior policies, and simulator interface information.Fast and deep-reasoning LLMs generate varied candidate policies, with prior-run solutions and metadata fed into later prompts.
- Starter code: ArchAgent starts from ChampSim replacement-policy code and can add, change, or remove policy logic during iterative search.The experiments eventually used Mockingjay source code as starter code to accelerate progress and convergence.
- Workloads: The evaluation suite combines SPEC 2006 and Google Workload Traces with CRC-2 single- and multi-core configurations.Workloads were selected to cover varied memory-traffic characteristics.
- Evaluation metrics: ArchAgent optimizes geometric-mean IPC speedup over LRU for single-core configurations and weighted IPC speedup over LRU for multi-core configurations.These objectives align the evaluation with CRC-2.
- Constraints: LLMs sometimes ignored hardware-budget and explainability instructions, producing unrealistic implementations, constraint circumvention, and difficult-to-understand policies.The authors added length penalties and manually checked final candidates for hardware implementability.
- Simulation cost: Single-core SPEC evaluations can take over 12 hours, while some multi-core workload mixes require 2-4 days because ChampSim is single threaded.These costs make repeated policy evaluation a central system challenge.
- Evaluation strategy: Shorter 100M-instruction evaluations reduced iteration time but caused some generalization issues against longer representative runs.The workflow therefore validated candidates later using runs such as 1B instructions.
4 Using ArchAgent to Automatically Design LLC Replacement Policies for Single-Core Systems
ArchAgent is used to generate Policy31 for the single-core CRC-2 cache-replacement setting, optimizing across SPEC06 configurations with and without prefetching. The evaluation uses IPC speedups normalized to LRU, with shorter simulations for evolution and longer runs for validation.
- Policy31 targets the single-core CRC-2 cache-replacement track using SPEC06 SimPoint traces with prefetching and without prefetching.
- The comparison includes Policy31, Policy31-Tuned, Policy61, and Policy62 across SPEC06 and Google Workload Trace setups.
- Workload-level speedup is IPC relative to LRU, while suite-level speedup is the geometric mean across workload-level speedups.
- ArchAgent receives feedback from up to 100M instructions per workload trace, while final validation uses 1B instructions per trace for the CRC-2 framing.
4.2 Policy31 Description
ArchAgent evolved Policy31 from Mockingjay by adding mechanisms that combine reuse-distance prediction with usage, prefetchability, and cache-pressure signals. These changes alter both eviction prioritization and insertion behavior.
- ArchAgent experimented for 18 days by adding, changing, or removing policy logic and mechanisms starting from Mockingjay.
- Policy31 adds an Insertion Quality Predictor that penalizes predicted reuse for PCs bringing dead blocks, making those blocks more likely to be evicted.
- Policy31 uses a 2-bit saturating counter to treat more frequently used blocks as more valuable and less likely to be evicted.
- The policy deprioritizes easy-to-prefetch sources and prioritizes difficult-to-prefetch sources through adjusted Estimated Time of Reuse values.
- The Hawks and Doves mechanism uses packed usage counters and associated accessors to help determine eviction candidates.
- Cache-pressure-aware throttling makes new insertions more conservative under high miss rates to preserve the existing working set.
4.3 Results
Policy31 improves suite-level IPC speedup over LRU across both single-core configurations, while ArchAgent reaches comparable gains substantially faster than prior human-developed policies. The results also include workload-level and ablation analyses.
- 12.2% and 8.0% IPC speedup improvements over LRU occur for Policy31 without prefetching and with prefetching, versus 11.4% and 7.0% for Mockingjay.
- Figure 4 compares suite-level geomean IPC speedup normalized to LRU with estimated development time for memory-intensive SPEC06 workloads.
- ArchAgent achieves similar 1-3% historical improvement margins in less than 3 weeks, compared with multiple researchers working for several months.
- ArchAgent achieves its single-core prefetch-enabled gains 3-5× faster than humans, despite SPEC replacement-policy development being well explored.
- Figure 5 measures the incremental suite-level geomean IPC improvement contributed by each technique composing Policy31.
- Figure 6 reports per-workload IPC speedup normalized to LRU for the single-core prefetch-enabled SPEC 2006 configuration.
4.4 Ablation Study
The ablation study identifies the mechanisms contributing to Policy31’s improvement and highlights the remaining need for manual validation and explanation of machine-generated policies.
- Most of Policy31’s improvement comes from CPAAT and Hawks and Doves in the ablation study.
- Manual work remains necessary to validate performance improvements and understand their root causes, making ablation and verification a bottleneck.
5 Using ArchAgent for Runtime-Configurable, Workload-Specific Hyperoptimization
ArchAgent exposes runtime-configurable policy parameters and tunes them per workload, producing additional SPEC 2006 gains while preserving the underlying Policy31 logic. This enables workload-specific post-silicon hyperoptimization at substantially higher improvement rates than prior policies.
- Runtime-configurable parameters: Policy31 contains 13 runtime parameters, including score constants, bonuses or penalties, and thresholds for adaptive behavior.These parameters do not change storage size and are implemented as constants or simple arithmetic expressions.
- Results: Policy31-Tuned achieves a 2.3% overall geometric-mean IPC improvement over Mockingjay, normalized to LRU, on prefetch-enabled single-core SPEC 2006 workloads.It also improves 1.5% over Policy31.
- Results: Workload-specific tuning produces gains above 5.0% for gcc_13B and mcf_46B, while calculix_2670B shows limited improvement.ArchAgent optimizes each workload individually while changing only runtime parameters.
- Discovery speed: Policy31-Tuned’s improvement rate is over 10× faster than prior SoTA policies, with this result achieved in less than eight days.The comparison concerns the rate of improvement shown in Figure 4.
- Implication: These results support AI-driven runtime specialization of hardware policies to specific workloads through post-silicon hyperoptimization.The paper compares this direction with automatic profile-guided optimization in hyperscalers.
6 Using ArchAgent to Automatically Design Multi-Core LLC Replacement Policies for Google Workload Traces
ArchAgent generates multi-core cache replacement policies specialized for Google Workload Traces, where workload behavior reverses the relative standing of established policies. Policy61 and Policy62 outperform prior policies across prefetch configurations, demonstrating rapid customization for a previously unexplored workload class.
- Workload specialization: ArchAgent generates Policy61 and Policy62 specifically for publicly available Google Workload Traces Version 2.The policies target multi-core configurations with and without prefetching.
- Evaluation: The evaluation uses 11 workloads scheduled across four cores under both prefetch and non-prefetch ChampSim configurations.Final validation simulates 75M instructions, with suite-level speedup computed as the geometric mean of workload-level speedups.
- Discovered mechanisms: Two runs produce substantially different policies, but both revisit PC-based features because hyperscale workload code characteristics differ from prior settings.Policy61 enriches Mockingjay’s prediction signature with path-history information.
- Discovered mechanisms: Policy62 removes Mockingjay’s key components and evolves toward a more adaptive SHiP-like policy suited to larger code footprints.Its mechanisms include tagged predictor entries that prevent destructive aliasing and a changed learning signal.
- Results: Google Workload Traces invert the prior trend: Mockingjay performs worse than LRU, while SHiP becomes the prior SoTA policy.The comparison covers suite-level speedups with and without prefetching.
- Results: On prefetch-enabled configurations, SHiP, Policy61, and Policy62 improve over LRU by 2.9%, 5.4%, and 8.2%, respectively.On non-prefetch configurations, the corresponding improvements are 3.0%, 4.7%, and 6.1%. Mockingjay slows down 9.5% with prefetching enabled.
- Implication: ArchAgent enables rapid customization of replacement policies to previously unexplored workload classes.The reported trend is associated with hyperscale characteristics including deep call stacks, multithreading, and frequent context switches.
7 Discussion, Future Work, and a Call-to-Action
The study finds that evolutionary coding agents can generate high-performing microarchitectural designs, but current simulator and verification infrastructure constrains trustworthy, hardware-realistic discovery. It therefore calls for more accurate, faster, and more automated evaluation frameworks.
- Key finding: ArchAgent generates novel microarchitectural designs and improves performance over human-designed SoTA policies on both SPEC and Google Workload Traces.The finding includes both technique discovery and parameter optimization.
- Constraints: Generated-policy realizability remains human-intensive because most microarchitectural simulators lack ASIC-quality frequency and area data.The limitation concerns confirming hardware feasibility, not only simulator performance.
- Constraints: Prompting, code-size limits, and rule-based verification improve explainability, but physical storage size remains difficult to infer automatically and still requires manual assessment.The paper identifies principled automated constraint injection as future work.
- Future directions: ArchAgent’s solution space could expand through larger prior-art datasets and multiple specialized agents providing competing hardware and workload feedback.Suggested expertise includes microarchitecture, SRAM/process design, physical design, and workload analysis.
- Evaluation infrastructure: Agentic execution exposes simulator escapes because agents may exploit evaluation loopholes that human researchers would avoid under good-faith assumptions.The paper argues that simulator quality and verification must be reevaluated for potentially adversarial agents.
- Evaluation infrastructure: More accurate simulators could also provide frequency, area, and power feedback, while faster simulation is needed because long evaluation latency limits discovery.The paper points to RTL-derived and hardware-accelerated frameworks as possible directions.
8 Related Work
Prior cache replacement research spans handcrafted heuristics, ML-based policies, and evolutionary parameter tuning, but existing approaches largely rely on human insight or fixed policy structures. ArchAgent positions evolutionary coding as a bridge between automated offline discovery and hardware-efficient online policies.
- Research paradigms: Cache replacement policy research broadly comprises handcrafted heuristics, ML-based policies, and evolutionary parameter tuning.These paradigms differ in how much policy structure or learning is delegated to automated methods.
- Handcrafted heuristics: Handcrafted policies evolved from static rules toward predictive and system-aware algorithms that use behavior, access type, or cache-hierarchy context.Mockingjay predicts reuse distance to approximate Belady-style decisions.
- Research gap: Existing handcrafted solutions are based on human intuition and do not automate search over the replacement-policy design space.This distinguishes them from evolutionary coding approaches.
- ML-based policies: Direct ML-in-hardware policies can impose substantial implementation complexity and overhead because they require online neural-network inference.PAR-ROT is cited as an imitation-learning example.
- ML-based policies: Offline ML can discover features for simpler hardware-friendly online policies, but interpreting the model and designing the final policy remains separate work.Glider illustrates this offline-discovery approach.
- ArchAgent’s position: ArchAgent bridges offline insight and online learning by automating discovery while explicitly optimizing for simplicity and hardware efficiency.The framework evolves policy code rather than only tuning parameters within a fixed structure.
- ArchAgent’s position: Unlike prior evolutionary replacement-policy work focused on fixed-model parameter tuning, ArchAgent addresses whole-policy design with LLM-based discovery tooling.The distinction is between evolving algorithm structure and optimizing parameters within a predefined model.
9 Conclusions
ArchAgent demonstrates automated novel cache-policy discovery, outperforming prior SoTA across workloads while shortening development time and enabling workload-specific tuning.
- 5.3% better IPC speedup over prior SoTA on public multi-core Google Workload Traces was achieved within two days.
- 0.9% better IPC speedup over prior SoTA on single-core SPEC06 workloads was achieved in 18 days.
- 3-5× faster development than humans produced the reported gains over prior SoTA cache replacement policies.
- 2.4% IPC speedup improvement over prior SoTA on single-core SPEC06 workloads demonstrated post-silicon hyperspecialization for specific workload mixes.
- ArchAgent is presented as a first step toward automatic novel computer architecture discovery.