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QGPU: Parallel logic in quantum LDPC codes

Boren Gu, Andy Zeyi Liu, Armanda O. Quintavalle, Qian Xu, Jens Eisert, Joschka Roffe

arXiv:2603.05398v1quant-ph

TL;DR

qLDPC codes offer resource-efficient protection, but compiling fault-tolerant logical operations is hindered by overlapping logical supports and limited parallelism. The paper introduces clustered-cyclic codes with clustered logical bases and parallel product surgery, using an auxiliary patch to perform many measurements per round. It proves distance preservation for hypergraph product codes, verifies it numerically for listed clustered-cyclic instances, and demonstrates full Clifford generation on a four-qubit data block.

  • Problem

    Fault-tolerant computation with qLDPC codes is constrained by logical operators that lack transparent organization and by limited parallelism in logical measurement layers.

  • Method

    The paper introduces clustered-cyclic LP codes with clustered logical bases and parallel product surgery using an auxiliary data patch and engineered product connections.

  • Results

    Up to k/2 joint logical Pauli measurements can be scheduled per round for clustered-cyclic codes, while distance preservation is proved for arbitrary HGP codes and numerically verified for listed k = 8 instances.

  • Takeaways & Limitations

    For the [[24, 8, 3]] clustered-cyclic code, four auxiliary logical qubits enable arbitrary parallel CNOTs on four data qubits, and the resulting operations generate the full Clifford group fault-tolerantly.

  • Takeaways & Limitations

    Parallel product surgery supports only certain compatible Pauli-product measurement configurations, requiring a hybrid gadget for more general measurements.

Abstract

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Quantum error correction is critical to the design and manufacture of scalable quantum computing systems. Recently, there has been growing interest in quantum low-density parity-check codes as a resource-efficient alternative to surface codes. Their adoption is hindered by the difficulty of compiling fault-tolerant logical operations. A key challenge is that logical qubits do not necessarily map to disjoint sets of physical qubits, which limits parallelism. We introduce clustered-cyclic codes, a quantum low-density parity-check code family with finite-size instances such as [[136,8,14]] and [[198,18,10]] that are competitive with state-of-the-art constructions. These codes admit a directly addressable logical basis, enabling highly parallel logical measurement layers. To leverage this structure, we propose parallel product surgery for quantum product codes. Using an auxiliary copy of the data patch and an engineered product-connection structure, the protocol performs many logical Pauli-product measurements in a single surgery round with small, fixed overhead. For clustered-cyclic codes, this yields surface-code-style maximal parallelism: up to k/2 disjoint Pauli-product measurements per round under explicit algebraic conditions. We prove that parallel product surgery preserves the code distance for hypergraph product codes and numerically verify distance preservation for the listed clustered-cyclic instances with k = 8. Finally, for the [[24,8,3]] clustered-cyclic code, treating half of the logical qubits as auxiliaries enables arbitrary parallel CNOTs on disjoint pairs; combined with symmetry-derived operations, these gates generate the full Clifford group fault-tolerantly.

I. INTRODUCTION

The paper co-designs clustered-cyclic qLDPC codes and parallel product surgery to make logical operators directly addressable and enable many fault-tolerant Pauli-product measurements per round at fixed overhead.

  • I. INTRODUCTION: The construction addresses a qLDPC bottleneck: overlapping logical operators make independently applying gates and defining parallelism difficult.This contrasts with surface codes, where logical qubits occupy separate patches and disjoint merges can be performed simultaneously.
  • I. INTRODUCTION: Up to k/2 joint logical Pauli measurements can be scheduled in one round for clustered-cyclic codes, matching surface-code lattice-surgery parallelism.The protocol uses an auxiliary data patch and an engineered connection structure.
  • I. INTRODUCTION: Clustered-cyclic codes provide a structured logical basis that makes selective measurement and scheduling reducible to combinatorial operations on physical clusters.Each logical operator is supported on an entire cluster, while anti-commuting basis elements share that cluster.
  • I. INTRODUCTION: Product surgery is restricted to compatible measurement configurations, so a hybrid gadget combines it with gauging-based routines for more general Pauli-product measurements.The hybrid method applies parallel surgery to compatible subsets and standard routines to the remainder.
  • I. INTRODUCTION: For the [[136, 8, 14]] code, maximally parallel surgery reduces the auxiliary space overhead by approximately 150 physical qubits on average for selected measurements.The comparison concerns combinations of single logical operators and joint logical-operator pairs.
  • I. INTRODUCTION: The [[24, 8, 3]] code supports arbitrary parallel CNOT connectivity on four data logical qubits when four logical qubits are used as reusable auxiliaries.Together with fold-transversal and automorphism-induced operations, these primitives generate the full Clifford group on the four-qubit data block.

B. The chain complex representation of CSS codes

The paper represents CSS codes as chain complexes, where binary lifting preserves the relevant algebraic structure and product constructions yield quantum codes. This framework underlies lifted-product and clustered-cyclic code design.

  • Binary representation: Binary representation preserves matrix multiplication, boundary conditions, and the homology and cohomology groups of the original complex.This connects ring-module constructions to binary stabiliser codes on qubits.
  • CSS codes: CSS codes use purely X- and Z-type check matrices whose compatibility is the chain-complex boundary condition.Logical X and Z operators correspond naturally to cohomology and homology, respectively.
  • Lifted-product codes: Lifted-product codes are CSS codes obtained from the tensor product of chain complexes associated with two classical seed codes.Their tensor-product structure enables logical-operator characterisation through the Künneth formula, particularly over finite odd-order cyclic groups.
  • Lifted-product codes: The Künneth formula decomposes lifted-product logical operators into contributions from the two seed complexes.For hypergraph product codes, the construction specializes to the binary-field case.
  • Clustered-cyclic codes: Clustered-cyclic codes impose cyclic ring and seed-matrix constraints on lifted products to obtain structured logical operators and finite-size parameters.The supplied construction includes code families with k=8 and k=18, and reports [[198, 18, 10]] alongside the [[144, 12, 12]] Gross BB code.

A. Clustered logical operator basis

Clustered-cyclic codes provide a logical operator basis organized into disjoint physical clusters with explicit X/Z pairing. This structure gives the operators the addressability needed for parallel fault-tolerant operations.

  • Motivation: Unlike generic high-rate qLDPC codes, clustered-cyclic codes are designed with a logical basis that supports systematic scheduling of logical measurements.The construction targets joint measurements of same-type logical-operator pairs.
  • Clustered basis: Each clustered logical operator is supported on a cluster of p physical qubits, partitioning the physical qubits into consecutive clusters.This converts the ring-level basis into a directly addressable binary structure.
  • Clustered basis: The clustered basis ensures that X- and Z-type operator pairs either overlap on an entire cluster or do not overlap.This support geometry determines which operators anticommute and which same-type operators remain disjoint.
  • Clustered basis: Clustered-cyclic codes have a clustered logical operator basis in which each logical Z operator anticommutes with exactly one logical X operator.Same-type logical operators occupy distinct equal-sized clusters, while paired opposite-type operators overlap on one cluster.
  • Construction: The basis is derived from the lifted-product homology structure and has explicit binary representatives for the [[24, 8, 3]] example.The construction uses the binary representation of the ring element χ to obtain independent logical operators.

V. PARALLEL SURGERY FOR PRODUCT CODES

Parallel product surgery uses an auxiliary copy of the data code and an engineered product-connection code to measure multiple logical Pauli products in one surgery round. For product codes, the construction achieves logical-level parallelism with fixed auxiliary overhead.

  • Motivation: Generic qLDPC codes face a trade-off between parallelism and auxiliary overhead because overlapping logical supports restrict jointly measurable operators.The product-surgery protocol is designed to address this bottleneck for product-code constructions.
  • Overhead: Each surgery round uses 2N auxiliary physical qubits, independent of the number of measurements performed in that round.The overhead consists of N data auxiliaries and N check auxiliaries; compatibility constraints limit the simultaneous measurements.
  • Construction: The merged-code construction implements target joint logical observables through measured stabilisers while preserving CSS validity through commutative chain-complex diagrams.The merged code is treated as a subsystem code containing logical and gauge degrees of freedom.
  • Construction: Parallel product surgery performs multiple logical Pauli-product measurements within a single surgery round using a product-connection construction.The auxiliary patch is another copy of the data code, and the connection maps are chosen from a same-size product code.
  • Clustered-cyclic specialization: For clustered-cyclic codes, an appropriate product-connection code saturates the natural upper bound on merges per round.The allowed configurations are characterized by compatibility conditions for the chosen Pauli-product measurements.

B. Parallel product surgery procedure

Parallel product surgery uses an auxiliary copy of the data patch and an engineered connection code to perform multiple logical measurements in one surgery round. For clustered-cyclic codes, suitable algebraic conditions achieve the maximum of k/2 disjoint merges, while preserving the measurement outcomes as targeted Pauli-product measurements.

  • Procedure: An auxiliary patch copies the data code, and engineered product-connection checks define the merged code used for parallel surgery.The auxiliary qubits begin in |+⟩ states, are incorporated through new Z stabilisers, and are later split back by transversal X measurements.
  • Procedure: The protocol measures merged-code stabilizers for d rounds, then splits the patches and applies Pauli corrections according to the auxiliary measurement outcomes.Here d is the distance of the data patch, so the stabilizer-measurement stage supplies the required fault-tolerance duration.
  • Procedure: Each non-zero row of the connection matrix H′_Z defines a merge of same-type logical operators, with the merged-code outcomes realizing the targeted Pauli-product measurements.The target measurements are obtained as products of Z-type stabilizer outcomes in the merged code.
  • Maximal parallelism: For a CSS code with k logical qubits, at most k/2 disjoint logical-pair merges fit in one round, and CC codes attain this bound when the connection code has full-rank check matrices.Under rank H′_Z = n_a n_b, the merged code admits n_a n_b independent joint Z-type measurements, matching the upper bound.
  • Overhead: Maximal parallelisation reduces effective time overhead by k/2, while CC-code instances have space overhead around 2kd and total space-time overhead around 4d^2 for a single merge.The comparison defines space overhead as the auxiliary physical qubits required by the protocol.

D. Limitations of product surgery and hybrid gadget

Product surgery is powerful but supports only algebraically compatible measurement configurations, so a hybrid gadget applies it to compatible subsets and standard routines to the remainder. For the [[24,8,3]] CC code, the allowed operations combine with code symmetries to generate the full Clifford group on four data logical qubits.

  • Limitations: Product surgery can merge different-sector same-type logical operators, while same-sector merges require alignment along a common row or column.This tensor-product constraint limits which requested Pauli-product measurement configurations are directly compatible with one surgery round.
  • Logical gates: For the [[24,8,3]] CC code, four logical qubits serve as auxiliaries while the allowed surgery configurations and symmetry-derived gates generate the full Clifford group on the other four.The construction therefore achieves a complete Clifford gate set only on the four data logical qubits selected in this arrangement.
  • Hybrid gadget: The hybrid gadget applies parallel product surgery to any compatible subset of requested measurements and standard logical measurement routines to the remainder.This preserves generality while exploiting product surgery’s low-overhead structure where available.
  • Overhead comparison: For the [[136,8,14]] CC code, 867 of 7192 non-overlapping measurement combinations are boostable via parallel surgery.Boostable configurations contain at least one subset compatible with product surgery.
  • Overhead comparison: The largest reported boost reduces the overhead for four joint pairs from 758 auxiliary qubits to a fixed 272, saving 486 qubits.The four pairs are (1,7), (2,8), (3,5), and (4,6) in the Z basis.

VI. FAULT TOLERANCE OF PARALLEL PRODUCT SURGERY

The fault-tolerance analysis requires LDPC homomorphisms and preservation of phenomenological distance proportional to the data-code distance. Parallel product surgery satisfies the LDPC condition for suitable codes, is proven distance-preserving for HGP codes, and shows no distance decrease in the tested k=8 CC instances.

  • Fault-tolerance criteria: A fault-tolerant surgery procedure requires LDPC homomorphisms and phenomenological distance preservation at Ω(d).The LDPC requirement limits error propagation, while distance preservation keeps protection proportional to the underlying code distance.
  • LDPC structure: Parallel product surgery satisfies the LDPC requirement when both the data code Q and connection code P are LDPC.The CC construction is LDPC by design, including the data and auxiliary patches.
  • Distance preservation: Parallel product surgery is rigorously distance-preserving for HGP codes when both the data and connection HGP codes are LDPC.This establishes fault tolerance for that code family under the stated LDPC condition.
  • Connection-code structure: The connection-code check weight is constant, with common single- and two-logical-operator merges corresponding to W_P = 1 and W_P = 2.Thus the usual merge scenarios use a bounded number of logical operators in each connection check.
  • CC-code verification: For every tested k=8 CC instance and all 256 corresponding merged codes, the numerically estimated merged-code distance was no smaller than the original data-code distance.The exhaustive estimates were performed with QDistRnd.

VII. FAULT-TOLERANT CLIFFORD OPERATIONS: EXPLICIT CONSTRUCTIONS AND CASE STUDIES

The paper combines parallel product surgery with automorphisms and fold-transversal operations to construct fault-tolerant Clifford operations for clustered-cyclic codes. For the [[24, 8, 3]] code, four data qubits and four reusable auxiliaries support parallel CNOTs and generate the full Clifford group on the data block.

  • Case study: [[24, 8, 3]]: The [[24, 8, 3]] code uses four data logical qubits and four reusable auxiliaries to implement arbitrary logical CNOT connectivity in parallel.Auxiliaries are initialized in Pauli eigenstates, mediate entangling operations, and are measured out with byproducts tracked in the Pauli frame.
  • Parallel product surgery: Parallel product surgery provides the basic primitive for parallel logical measurements, state initialization, and CNOT constructions with constant space overhead.The protocol uses an auxiliary data-patch copy and a tailored product connection structure.
  • Case study: [[24, 8, 3]]: Two disjoint logical CNOT pairs can be implemented in parallel for the four data qubits at fixed space overhead.This maximally parallel CNOT layer is combined with logical SWAP operations and symmetry-derived gadgets.
  • Clifford generation: The resulting operations generate the complete Clifford group on four logical qubits fault-tolerantly up to global phase.The construction combines parallel surgery with fold-transversal and automorphism-induced operations.
  • Compilation constraints: Product surgery has compilation constraints: same-sector merges require row-or-column alignment, while arbitrary inter-sector merges are allowed.The hybrid gadget supplements incompatible configurations with standard logical measurement routines.
  • Fault tolerance: Parallel product surgery is distance preserving for HGP codes in general and is numerically fault-tolerant for the tested k = 8 CC instances.The general result assumes the data and product connection codes are LDPC.

Appendix A: Kernel and image of the seed codes of the CC code

The appendix characterizes kernels and images of seed-code matrices over the ring R = F2[x]/(x^p + 1), then uses these structures to identify compatible logical-operator merges in clustered-cyclic codes.

  • Kernel and image characterization: For binomial diagonal matrices diag_n[x^α(1 + x^β)], the kernel is generated by diag_n(χ) and the image by diag_n(1 + x).Here χ = 1 + x + · · · + x^(p−1), with 0 ≤ α < p and 0 < β < p.
  • Proof strategy: The kernel and image claims follow from χ annihilating each binomial factor, factorization through 1 + x, and a rank-nullity dimension check over F2.The argument is extended to the seed matrices and their conjugate transposes.
  • Seed-code corollary: For CC seed matrices, the kernel is the row span of diag_na(χ), while the image is the row span of diag_na(1 + x).The same structural statement holds for the conjugate-transpose seed matrix.
  • Logical-operator merges: Two Z-type logical operators can be merged when they lie in different sectors or are aligned in the same row or column within a sector.The construction chooses a product connection code whose check matrix realizes the required logical support pattern.

Appendix D: Product surgery is distance preserving for HGP codes

The appendix proves that parallel product surgery preserves distance for hypergraph product codes by showing that any reduction in data-patch weight is compensated on the auxiliary patch.

  • Main result: Parallel product surgery is distance preserving for arbitrary HGP codes equipped with their canonical logical-operator basis.The proof applies to the product-surgery construction described for HGP codes over F2.
  • Proof construction: The proof represents arbitrary HGP logical Z operators using classical-codeword and unit-vector bases before analyzing their behavior under merging.The merged-code parity checks are then used to bound the minimum logical-operator weight.
  • Z-type distance: For Z-type logical operators, every weight reduction on the data patch produces at least weight-one compensation on the auxiliary patch.Therefore the merged code’s Z-type distance cannot fall below the original data-code distance.
  • X-type distance: The X-type distance is preserved automatically for Z-type merges under arbitrary CSS surgery.Together with the Z-type argument, this establishes distance preservation for the full HGP surgery construction.

Appendix E: Proof of Theorem VII.1

Theorem VII.1 shows that arbitrary CNOTs, paired phase gates, a global Hadamard, and Paulis generate the full Clifford group for m ≥ 3. The appendix proves this through symplectic representations and validates the numerical distance-estimation confidence used for CC-code analyses.

  • Theorem VII.1: For m ≥ 3, arbitrary CNOTs, paired phase gates, a global Hadamard, and Paulis generate the full m-qubit Clifford group up to global phase.The proof synthesizes each single-qubit phase and Hadamard gate from the available operations.
  • Symplectic proof: The symplectic representation reduces Clifford-group generation to generating the full symplectic action together with access to Pauli operators.CNOTs generate the embedded GL(m, 2) subgroup, while the global Hadamard swaps the X and Z blocks.
  • Gate synthesis: Single-qubit phase gates are synthesized by conjugating a paired phase gate with CNOT circuits, and single-qubit Hadamards follow from the global Hadamard and synthesized phases.The construction uses three distinct qubits, explaining the m ≥ 3 requirement.
  • Theorem limitation: The condition m ≥ 3 is necessary because one or two qubits do not provide enough resources to synthesize a single-qubit phase action.For m = 2, conjugation of the available paired phase cannot produce the required single-qubit phase.
  • Numerical confidence: For each k = 8 CC code, numerical estimates examine all 256 merged codes and report worst-case failure bounds for X- and Z-type distance searches.The estimates use 10^5 randomized QDistRnd trials, with confidence statistics summarized by the minimum observed multiplicity.

Appendix G: Circuit-level memory simulations for CC codes

The appendix describes circuit-level memory simulations for CC codes and concrete parallel-surgery examples, including fixed-overhead measurements and preserved distance in merged codes.

  • Circuit-level memory simulations: Circuit-level simulations compare CC-code logical failure rates across physical error rates for 8- and 18-logical-qubit families, including comparison with the Gross BB code.The simulations use repeated syndrome extraction under circuit-level depolarizing noise.
  • Circuit-level memory simulations: CNOT scheduling partitions Tanner-graph interactions by direction, colors conflict graphs with DSATUR, and executes each color class as a non-conflicting time-step.Stim compiles and samples the circuits, while BP+OSD decodes detector-error-model parity checks.
  • Circuit-level memory simulations: Logical failure rates are converted to per-round and per-logical-qubit rates using independent-failure assumptions across syndrome rounds and logical qubits.The conversion supports comparisons among codes with different numbers of logical qubits.
  • Parallel-surgery examples: For the [[24, 8, 3]] CC code, parallel surgery performs four pairs of joint logical measurements with fixed overhead of 24 physical qubits and 24 checks.The merged code has parameters [[48, 4, 4, 3]] in the displayed example, while another two-pair example retains [[48, 6, 6, 3]].
  • Parallel-surgery examples: The examples show that maximizing the number of merges per round determines implementation efficiency when the data-patch resource cost remains constant.The protocol’s stated maximum is k/2 merges per round.

Appendix J: Fold-transversal and automorphism Clifford operations for the [[24, 8, 3]] CC code

The appendix constructs logical Clifford operations for the [[24, 8, 3]] CC code from fold-transversal physical gates and automorphisms, including a CZ−S operation with a specified logical action.

  • Logical interpretation: The clustered logical basis makes the physical operations’ logical action directly interpretable through the code’s clustered structure.The appendix uses this interpretation to identify the logical CZ−S action explicitly.
  • CZ−S fold-transversal gate: The [[24, 8, 3]] CC code supports a logical CZ−S gate implemented by applying S, S†, and CZ gates to physical-qubit clusters.The combined physical operation preserves the stabilizer group and acts on the clustered logical basis as a product of logical S, S†, and CZ gates.
  • CZ−S fold-transversal gate: The physical S and CZ operations update the Z-type parity-check matrix while leaving the X-type parity-check matrix unchanged.For S, the update uses B(H_Z) + B(H_X)B(A_S)B(H_X)^T; CZ has the analogous B(A_CZ) update.

2. H−SWAP Hadamard-type fold-transversal gates

The appendix shows how physical automorphisms and parallel surgery implement parallel and arbitrary logical CNOT patterns in the [[24, 8, 3]] CC code using auxiliary logical qubits.

  • Automorphism operations: Physical SWAP operations generate logical automorphisms that reorder the logical qubits and support the subsequent parallel-surgery CNOT procedures.The appendix gives explicit physical SWAP products and uses Aut(1), Aut(2), and Aut(3) to obtain the required logical reorderings.
  • Parallel CNOT synthesis: Each logical CNOT is synthesized from joint Z- and X-Pauli measurements involving an auxiliary |+⟩ qubit, followed by auxiliary measurement and Pauli-frame correction.Parallel surgery supplies the joint measurements, while automorphisms reorder qubits between stages.
  • Parallel CNOT synthesis: With logical qubits 1, 3, 5, and 7 initialized as auxiliaries, the code can maximize parallel CNOT execution over data qubits 2, 4, 6, and 8.The construction realizes multiple disjoint CNOT pairings, including CNOT6→2 with CNOT8→4 and CNOT2→6 with CNOT4→8.
  • Parallel CNOT synthesis: The same parallel-surgery procedure extends to other pairings after automorphism-based reordering of the logical qubits.Examples cover CNOT2→6 with CNOT4→8, CNOT2→8 with CNOT4→6, and reversed-control pairings.

Appendix L: Full Clifford group over four logical qubits of the [[24, 8, 3]] CC code

The appendix combines parallel surgery with fold-transversal and automorphism gates to realize the full Clifford group over four data logical qubits of the [[24, 8, 3]] CC code.

  • Full Clifford synthesis: The construction treats logical qubits 1, 3, 5, and 7 as auxiliaries and targets the full Clifford group on data qubits 2, 4, 6, and 8.The demonstrated gate set is realized fault-tolerantly through parallel surgery, fold-transversal gates, and automorphisms.
  • Phase-type gates: Arbitrary logical S_iS_j† gates are obtained by initializing auxiliary qubits in |0⟩, applying the CZ−S fold-transversal gate, and reordering qubits with logical SWAPs.The auxiliary qubits make the CZ action on selected data qubits trivial, leaving the desired S_iS_j† action.
  • Phase-type gates: The arbitrary S_iS_j† operations are fault-tolerant because the CZ gates act between data and auxiliary logical qubits, whose error propagation can be ignored.This scope is explicitly tied to the four data logical qubits of the code.
  • Hadamard-type gates: Logical SWAPs simplify the H−SWAP construction, while the resulting logical H operations act as H⊗4 on the four data qubits.Together with arbitrary CNOTs and S_iS_j† gates, these operations generate the full Clifford group.
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