Source-linked AI summary
Tsim: Fast Universal Simulator for Quantum Error Correction
Rafael Haenel, Xiuzhe Luo, Chen Zhao
TL;DR
Quantum error-correction research needs classical simulators that support realistic noise models and extremely high-throughput sampling, while large-scale fault-tolerant hardware remains unavailable. Tsim addresses this with a GPU-accelerated universal noisy-circuit simulator using parameterized ZX reduction and stabilizer-rank decomposition, achieving strong sampling performance and large speedups over quizx.
Problem
Large-scale fault-tolerant quantum computers remain beyond current hardware capabilities, so QEC development relies on simulators that handle realistic Pauli noise and billions to trillions of low-error-rate shots.
Method
Tsim combines parameterized ZX-calculus reduction, stabilizer-rank decomposition, compile-once sampling, and vectorized CPU/GPU execution for universal noisy quantum circuits.
Results
Tsim achieves CPU sampling performance comparable to or faster than Stim on practical Clifford and non-Clifford QEC gadgets, GPU improvements of up to two orders of magnitude, and low-T-count GPU speedups of more than five orders of magnitude over quizx.
Takeaways & Limitations
Tsim provides a Stim-compatible simulator for universal noisy circuits whose compile-once architecture supports high-throughput QEC sampling and extends simulation beyond Clifford-only operations.
Takeaways & Limitations
The approach scales exponentially with stabilizer rank as the number of non-Clifford gates increases, and ZX reduction may not separate all detectors from observables.
Abstract
from arXiv · showhide
We present Tsim, an open-source high-throughput simulator for universal noisy quantum circuits targeting quantum error correction. Tsim represents quantum circuits as ZX diagrams, where Pauli channels are modeled as parameterized vertices. Diagrams are simplified via parameterized ZX rules, and then compiled for vectorized sampling with GPU acceleration. After the one-time compilation, one can sample detector or measurement shots in linear time in the number of Clifford gates and exponentially only in the number of non-Clifford gates. Tsim implements the Stim API and fully supports the Stim circuit format, extending it with T and arbitrary single-qubit rotation instructions. For low-magic circuits, Tsim throughput can match the sampling performance of Stim.
1 Introduction
Tsim targets practical QEC simulation by combining universal-circuit support with efficient handling of predominantly Clifford circuits, realistic Pauli noise, and extremely high shot-throughput demands.
- Tsim is a GPU-accelerated universal noisy-circuit simulator based on stabilizer rank decomposition and the ZX-calculus.
- QEC simulations often use gadgets with hundreds to thousands of physical qubits that are predominantly Clifford circuits.
- Practical QEC simulators must model realistic circuit-level Pauli noise, which dominates much of the community’s simulation effort.
- Parameterized ZX vertices let Tsim reuse diagram reduction across noise configurations and achieve linear-time sampling for Clifford circuits with deterministic detectors.
- Estimating logical error rates at 10^-9–10^-12 can require billions to trillions of shots, motivating vectorized CPU and GPU execution through JAX and XLA.
- Tsim implements the Stim API and extends the instruction set with non-Clifford gates.
2 Methods
Tsim compiles noisy circuits into parameterized ZX diagrams, separates detector and observable structure when possible, and samples compiled representations efficiently across noise realizations.
- Compilation pipeline: Tsim accepts multiple circuit formats and translates them into an intermediate representation before compilation.
- Compilation pipeline: Pauli noise is represented symbolically in parameterized ZX diagrams, allowing one reduced compiled sampler to be reused across noise configurations.
- Sampling: JAX/XLA evaluates many independent noise realizations in parallel on CPU or GPU, producing measurement or detector samples.
- Diagram reduction: ZX reduction can separate detectors from logical observables, allowing the two parts to be evaluated independently when they lack quantum correlations.
- Detector sampling: The detector-error matrix produced by ZX rewriting is equivalent to Stim’s Tanner graph, with entries indicating which errors flip each detector or observable.
- Detector sampling: Sparse geometric sampling reduces expected per-shot cost from O(Eδ) to O(pEδ+1) in the low-noise regime.
- Detector sampling: Detector sampling can reduce per-shot cost by a factor of N_m relative to measurement sampling because detector components separate after reduction.
- Limitation: The detector–observable separation is heuristic and may fail with non-Clifford gates, requiring autoregressive evaluation for some detectors.
3 Benchmarks
Tsim is benchmarked on QEC and random circuits across CPU and GPU settings, with performance varying by circuit type, physical error rate, and non-Clifford count. Its compile-once strategy produces major speedups over quizx and favorable low-error-rate behavior against Stim.
- Experimental setup: Tsim benchmarks compile detector samplers on Apple M4 Pro CPU and NVIDIA Grace Hopper GH200 systems after JAX/XLA warmup.Batch sizes were autotuned for maximum throughput, and sampling time was recorded after just-in-time compilation.
- Non-Clifford circuits: Roughly two orders of magnitude of GPU acceleration reduce tensor-contraction cost for non-Clifford circuits when stabilizer rank is not too large.The first three benchmark panels cover non-Clifford distillation, cultivation, and surface-code-related circuits.
- Clifford circuits: O(p) scaling lets Tsim outperform Stim for p < 10^-3 on purely Clifford diagrams with deterministic detectors.This path uses a sparse geometric sampler and has similar CPU and GPU runtimes because it is not GPU-accelerated.
- Comparison with quizx: More than five orders of magnitude of GPU speedup over quizx occur at low T count, narrowing to about 10^4 on GPU and 10^2 on CPU as T increases.The comparison uses 20-qubit random circuits with Pauli-string weights 2–4, depths 1–21, Cat5 decomposition, and depolarizing noise p = 0.001 after every gate.
4 Discussion
Tsim combines parameterized ZX-calculus reduction and stabilizer rank decomposition with a compile-once, sample-many architecture for universal noisy QEC circuits. Its main boundary is exponential stabilizer-rank scaling with the number of non-Clifford gates, while broader noise models and further compilation improvements remain future work.
- Contribution: Tsim uses parameterized ZX-calculus reduction and stabilizer rank decomposition to simulate universal noisy quantum circuits targeting QEC.It implements the Stim API and accepts circuit formats including Bloqade, OpenQASM, Cirq, and QIR.
- Performance: GPU acceleration improves throughput by up to two orders of magnitude, while Tsim reaches up to five orders of magnitude speedup over quizx.The compile-once, sample-many design makes per-stabilizer-term CPU sampling comparable to or faster than Stim on practical Clifford and non-Clifford QEC gadgets.
- Limitations and future work: The primary computational bottleneck is exponential stabilizer-rank scaling with the number of non-Clifford gates.Proposed directions include structure-aware cutting, improved rewrite rules, and approximate decompositions that trade output-distribution error for reduced rank.
- Limitations and future work: Extending beyond Pauli channels to coherent errors, atom loss, and leakage is identified as future work for broader hardware applicability.Other future directions include a Rust ZX-reduction backend, branch merging, extended autoregressive sampling, and alternative graphical calculi.
A.1 Rewrite rules
The rewrite system transforms ZX diagrams while preserving their represented linear maps, reducing Clifford diagrams efficiently and handling parameterized Pauli vertices. Non-Clifford phases require a restriction: the π-commutation rule is ignored when it would generate non-Pauli phases.
- ZX representation: ZX diagrams represent quantum processes as graphs of green Z and red X spiders carrying real-valued phase parameters.Edges encode tensor contraction, juxtaposition encodes tensor products, and blue edges represent Hadamard operations.
- Rewrite rules: ZX rewrite rules preserve the represented linear map while transforming diagrams algebraically.Latin letters denote binary variables, whereas Greek letters denote continuous phases.
- Parameterized Pauli vertices: Parameterized Pauli vertices have phases 0 or π, and Clifford reduction rules remain agnostic to their presence because Paulis only flip measurement outcomes.The rules can therefore apply to vertices with phases aπ for a ∈ [0, 1].
- Clifford reduction: For Clifford graphs, successive rewrite applications remove all spiders and reduce the diagram to a scalar with cubic vertex scaling.This avoids the potentially exponential-in-qubit cost of direct tensor contraction.
- Measurements: Measurements use doubled ZX notation, with quantum objects represented separately from classical wires carrying measurement outcomes.Measurement projects and reinitializes into |0⟩ or |1⟩, while an X spider carries the outcome on a disconnected classical wire.
- Noise channels: Pauli channels are encoded by parameterized X and Z vertices whose sampled binary variables determine channel-specific error configurations.General single-qubit Pauli channels use two random bits, while multi-qubit channels are constructed analogously.
- Channel reduction: Channel reduction minimizes sampled error bits without changing the induced detector and observable distribution.The pipeline performs null-column elimination, channel normalization, identical-channel merging by XOR convolution, and subset absorption.
- Detector error model: After factorizing joint distributions into approximate independent single-bit channels, the reduction pipeline yields the detector error model used as decoder input.Each resulting error mechanism is characterized by a probability and a detector–observable column signature.
C Stabilizer decompositions
Tsim handles non-Clifford vertices by decomposing them into sums of Clifford diagrams, with decomposition growth controlled by identities such as partial Cat5. It then samples output bit strings autoregressively from marginal probabilities.
- Decomposition: Non-Clifford vertices are decomposed into sums of Clifford vertices so the resulting diagrams can be evaluated with stabilizer-based methods.A T state decomposes into two Clifford terms, while simultaneous identities can improve on naive independent decomposition.
- Decomposition: Naively decomposing n non-Clifford vertices produces 2^n Clifford diagrams, but simultaneous decompositions reduce the exponential growth rate to 2^αn with α = 0.5.
- Decomposition: Tsim applies a partial Cat5 decomposition that supports arbitrary rotation angles θ.For θ = π/4, it reduces to a previously reported ZX diagram, and the asymptotic growth rate is α ≈0.396.
- Sampling: Marginal probability distributions are represented by diagrams with measurements traced out, and output bit strings are sampled by autoregressive conditioning on those marginals.The procedure computes successive probabilities P(m0), P(m0, m1), and so on before drawing the corresponding bits.
- Sampling: QEC detector and observable outcomes are obtained from measurements through linear XOR transformations represented directly in ZX graphs.Detector outcomes are sampled by evaluating marginal-probability diagrams for the transformed outputs.
E Parameterized evaluation of Clifford ZX diagrams
Parameterized Clifford ZX diagrams encode Pauli-noise configurations through binary parities and phase terms. Tsim tracks these terms in compiled tensor structures so many parameter configurations can be evaluated in parallel.
- Phase representation: Parameterized Pauli vertices reduce to products of phase factors whose arguments depend on parities of selected binary parameters.The phase-term table organizes the possible parameterized forms using parity variables a and b.
- Phase representation: Tsim restricts attention to phase-pair terms because other term types can be represented as special cases, enabling efficient individual-term tracking.
- Phase representation: Each phase-pair term uses selector vectors to determine which binary parameters contribute to its two parities.The binary parameters are f1, ..., fn, and the selectors identify the participating variables.
- Evaluation: The complete reduced scalar is assembled from phase-pair terms with a constant prefactor, and non-Clifford circuits first undergo stabilizer-rank decomposition.
- Evaluation: A parameterized ZX diagram is specified by coefficients, phase selectors, and stabilizer-rank terms, with an added batch dimension for parallel parameter configurations.The batch dimension supports evaluating multiple amplitudes with different parameter configurations in parallel.
- Evaluation: Tensor contraction is the computational bottleneck, so Tsim converts binary tensors and parameters to floating point to use fast BLAS kernels.
F Validation
Tsim’s probability outputs agree with independent simulators on randomized circuits, while its repository includes extensive automated testing. Validation covers state-vector and PyZX tensor-contraction comparisons across circuit depths and gate types.
- Probability validation: Tsim probabilities agree with a state-vector simulator and PyZX tensor contraction up to fp32 precision across randomized circuits of varying depth and gate type.The comparison uses random circuits with terminal measurements.
G Additional benchmarks
Additional benchmarks evaluate Tsim on CPU and GPU systems with autotuned shot batches and compare normalized runtime against Stim. Unnormalized results show marginally higher throughput on GH200 than RTX 5090.
- Benchmark setup: CPU benchmarks use an Apple M4 Pro, while GPU benchmarks use NVIDIA Grace Hopper GH200 and RTX 5090 systems.
- Benchmark setup: Tsim autotunes shot batch size for each benchmark until throughput stops improving or the batch no longer fits device memory.Large batches typically use most available VRAM on the evaluated GPU systems.
- Runtime comparison: Figure 2(a) normalizes Tsim runtime by the number of stabilizer terms when comparing it with Stim.Unnormalized execution times are provided separately in Figure 4.
- Runtime comparison: Tsim throughput is marginally higher on the GH200 system than on the RTX 5090 in the unnormalized comparison.
H Related simulators
Tsim is compared with Stim, SOFT, and other approaches through asymptotic scaling, sampling performance, and supported circuit regimes. The section also describes Tsim’s workflow, interfaces, and visualization and sampling capabilities.
- Simulator comparisons: Tsim follows Stim’s compile-once, sample-many pattern, while SOFT is a GPU-accelerated extended tableau simulator supporting non-Clifford gates.
- Simulator comparisons: In the low-magic limit, Tsim has linear asymptotic scaling in the number of gates, whereas SOFT and Stim’s Tableau Simulator scale at least quadratically in qubit count.
- Sampling performance: Tsim reports 2.4 µs per shot on GH200 for the d = 3 cultivation circuit, compared with SOFT’s 6.68 µs on a single H800 GPU.SOFT scales to the d = 5 cultivation circuit, which Tsim is not yet able to simulate.
- Simulator comparisons: A low-rank decomposition approach reports shot times > 10ms for the distance-3 cultivation circuit but is restricted to circuits that propagate Pauli errors to Cliffords.
- Interfaces: Tsim accepts Stim-style intermediate representations through the Stim API and is integrated into the Bloqade framework.
- Sampling and visualization: Tsim supports detector and measurement sampling, with reduced ZX diagrams providing visual representations for measurement outcomes, detectors, observables, and autoregressive sampling.