Source-linked AI summary
InCoder-32B-Thinking: Industrial Code World Model for Thinking
Jian Yang, Wei Zhang, Jiajun Wu, Junhang Cheng, Tuney Zheng, Fanglin Xu, Weicheng Gu, Lin Jing, Yaxin Du, Joseph Li, Yizhi Li, Yan Xing, Chuan Hao, Ran Tao, Ruihao Gong, Aishan Liu, Zhoujun Li, Mingjie Tang, Chenghua Lin, Siheng Chen, Wayne Xin Zhao, Xianglong Liu, Ming Zhou, Bryan Dai, Weifeng Lv
TL;DR
Industrial code generation lacks reasoning traces grounded in specialized hardware constraints and toolchain dynamics. InCoder-32B-Thinking combines ECoT synthesis with ICWM-guided execution modeling to generate and validate such traces, achieving top-tier open-source results across general and industrial benchmarks.
Problem
Industrial software development lacks expert reasoning traces for hardware constraints and timing semantics, while leading models remain limited on industrial code tasks.
Method
InCoder-32B-Thinking combines ECoT error-correction trace synthesis with ICWM predictions of domain-toolchain feedback for self-verification and scalable trajectory generation.
Results
The model achieves top-tier open-source results across 14 general and 9 industrial benchmarks, including 81.3% on LiveCodeBench V5 and strongest open-source results across several industrial domains.
Takeaways & Limitations
Grounding thinking traces in learned industrial execution dynamics supports broad coding competence alongside specialized capabilities in chip design, GPU optimization, embedded systems, and 3D modeling.
Takeaways & Limitations
ICWM fidelity is constrained by cases where syntactic validity and plausible dimensions mask geometric backend failures, such as CadQuery degenerate geometry.
Abstract
from arXiv · showhide
Industrial software development across chip design, GPU optimization, and embedded systems lacks expert reasoning traces showing how engineers reason about hardware constraints and timing semantics. In this work, we propose InCoder-32B-Thinking, trained on the data from the Error-driven Chain-of-Thought (ECoT) synthesis framework with an industrial code world model (ICWM) to generate reasoning traces. Specifically, ECoT generates reasoning chains by synthesizing the thinking content from multi-turn dialogue with environmental error feedback, explicitly modeling the error-correction process. ICWM is trained on domain-specific execution traces from Verilog simulation, GPU profiling, etc., learns the causal dynamics of how code affects hardware behavior, and enables self-verification by predicting execution outcomes before actual compilation. All synthesized reasoning traces are validated through domain toolchains, creating training data matching the natural reasoning depth distribution of industrial tasks. Evaluation on 14 general (81.3% on LiveCodeBench v5) and 9 industrial benchmarks (84.0% in CAD-Coder and 38.0% on KernelBench) shows InCoder-32B-Thinking achieves top-tier open-source results across all domains.GPU Optimization
1. Introduction
Industrial code generation requires reasoning grounded in specialized hardware constraints and toolchain feedback, which existing general-purpose reasoning models do not adequately integrate. InCoder-32B-Thinking combines error-driven reasoning synthesis with an Industrial Code World Model to address this gap and achieves strong general and industrial benchmark performance.
- Motivation: Industrial tasks require reasoning about specialized semantics and hardware constraints absent from web-scale corpora.Verification also depends on learning complex domain-specific toolchain behavior for feedback injection.
- Motivation: Leading models show limited success on Triton generation and Verilog checking despite strong general performance.This motivates integrating reasoning with learned toolchain dynamics.
- Approach: ECoT synthesizes reasoning traces by modeling error correction through failed attempts, environmental feedback, and correct solutions.The process captures iterative refinement patterns associated with industrial engineering expertise.
- Approach: ICWM learns causal relationships between code and hardware behavior from domain-specific execution traces, enabling self-verification and efficient exploration without repeated toolchain execution.Its traces include Verilog simulation, GPU profiling, compiler diagnostics, and embedded-system logs.
- Results: 81.3% on LiveCodeBench_v5 accompanies the model’s strongest open-source results across evaluated industrial domains.The reported industrial domains include chip design, GPU kernel optimization, embedded systems, compiler optimization, and 3D modeling.
2. Error-driven thinking synthesis from Industrial Code World Model
The data engine grounds reasoning traces in real execution feedback, then uses ICWM as a calibrated proxy to amplify multi-turn trajectories at scale. The resulting corpus combines grounded real and simulated feedback for training.
- Pipeline: The pipeline first collects multi-turn responses with real execution feedback, trains ICWM, and then uses it to synthesize thinking content at scale.It operates through grounded collection followed by ICWM-driven amplification.
- Environment grounding: Task seeds are bundled with domain-specific environments, such as testbenches, simulators, synthesis scripts, memory layouts, and linker scripts.These bundles provide reproducible execution contexts for downstream generation and verification.
- Grounded collection: A prompt router selects domain-specific instructions before generating reasoning traces and candidate code.Examples include warp divergence and shared-memory budgets for GPU kernels, and path depth and clock-domain crossings for RTL.
- Grounded collection: Real backends return outcome labels and diagnostic logs for candidate code across Triton/CUDA, Renode, CadQuery, and Yosys/Icarus.The feedback supplies concrete execution results for iterative correction.
- Grounded collection: Up to K=4 correction rounds feed execution observations back to the generator, whose revised reasoning and code form multi-turn trajectories.Trajectories terminate after passing all checks or reaching the maximum number of turns.
- Training data: Both successful and unsuccessful intermediate turns are retained, allowing the corpus to include failure modes and the reasoning that resolves them.Full trajectories train the code model, while single-turn pairs train ICWM.
- ICWM: ICWM approximates backend feedback from the environment and candidate code, predicting execution status, diagnostics, and task-specific outputs.It serves as a learned proxy for expensive industrial execution backends.
- ICWM-driven amplification: The ICWM replaces real backends during synthesis, using single-pass predictions and periodic calibration against real execution.The final corpus D = Dreal ∪ Dicwm contains trajectories produced by real execution or verified against it.
3. Evaluation
The evaluation compares InCoder-32B-Thinking with matched baselines across broad general-code and industrial-code benchmarks. Results show strong code reasoning and broad transfer to hardware-aware programming, alongside a moderate trade-off on concise-response tasks.
- Evaluation setup: The evaluation uses separate baseline sets for general-code and industrial-code benchmarks because the two families emphasize different capability profiles.The comparisons include open-weight systems and proprietary APIs, with reference models matched to each benchmark family.
- General-code benchmarks: The general-code suite spans code generation, reasoning, efficiency, text-to-SQL, agentic coding, and tool use across benchmarks including LiveCodeBench, SWE-bench Verified, and BFCL V3.The suite also includes EvalPlus, BigCodeBench, FullStackBench, CRUXEval, Mercury, Spider, BIRD, Terminal-Bench, Mind2Web, and τ2-bench.
- Industrial-code benchmarks: The industrial-code suite covers chip design, GPU kernel optimization, low-level code optimization, and 3D modeling.It includes VeriScope, RealBench, ArchXBench, VeriRepair, KernelBench, TritonBench, EmbedCGen, SuperCoder, and CAD-Coder.
- General-code results: 81.3 on LiveCodeBench V5 is the highest score among open-weight models, including models with an order of magnitude more parameters.The result is reported as evidence of strong code reasoning, while the model remains broadly competitive across code-generation and agentic tasks.
- General-code results: The model ranks first on τ2-bench Retail, while showing a moderate trade-off on benchmarks favoring concise responses such as Mercury and Text2SQL.The same pattern is reported for other thinking-augmented systems.
- Industrial-code results: InCoder-32B-Thinking achieves the best open-weight scores by a wide margin on RealBench module-level chip design tasks and surpasses Claude-Sonnet-4.6 on CAD-Coder and SuperCoder.It remains competitive on VeriScope, VeriRepair, and KernelBench, with improvements spanning chip design, GPU programming, 3D modeling, and embedded systems.
4. Analysis
ICWM closely matches real execution across industrial domains, while multi-turn trajectory agreement falls modestly because errors compound across correction turns. Thinking-trace depth and performance both vary with task demands and training-data scale.
- ICWM Fidelity Analysis: 1.6–2.8 percentage points separate outcome accuracy from trajectory agreement because a mispredicted turn can redirect later correction paths.The gap reflects error compounding across multi-turn sequences.
- ICWM Fidelity Analysis: The GPU kernel case reproduced a MEMORY_FAULT and then PASS after BLOCK_N fell from 128 to 64, matching the real two-turn trajectory.The initial failure exceeded the per-SM shared-memory budget.
- Adaptive Thinking Depth: Median thinking length spans 209×, from 91 characters per step in agentic coding to 19,015 characters in GPU kernel optimization.GPU optimization requires diagnosing hardware-level configuration, memory, and scheduling issues.
- Effects of Thinking Training Data: Scaling thinking data from 180M to 540M tokens raised VeriScope from 61.8 to 75.4 and KernelBench L2 from 16.0 to 38.0.TritonBench execution correctness stayed at 100, while KernelBench L3 remained at 12.0.
5. Related Work
Related work spans industrial code generation, thinking models, and code-specific reasoning, but remains fragmented across sub-domains. InCoder-32B-Thinking combines execution-grounded correction trajectories with an industrial code world model for unified industrial reasoning.
- Industrial Code Intelligence: Existing industrial approaches cover hardware design, GPU kernels, embedded systems, compiler optimization, and 3D modeling, but typically target isolated domains.The literature includes fine-tuning, reinforcement learning, and domain-specific benchmarks.
- Industrial Code Intelligence: InCoder-32B established a multi-domain code foundation model spanning chip design, GPU optimization, embedded systems, compiler optimization, and 3D modeling.Its three-stage Code-Flow pipeline combines general pre-training, context extension, and execution-grounded post-training.
- Thinking and Code Reasoning: Thinking-model research uses long reasoning traces, reinforcement learning, and distillation, while code-specific methods adapt these techniques to programming tasks.Prior code-reasoning methods did not target industrial domains or leverage execution feedback for trace synthesis.
- Thinking and Code Reasoning: InCoder-32B-Thinking unifies these threads by synthesizing thinking content from multi-turn execution-grounded correction trajectories.Failed attempts and diagnostic feedback are incorporated into subsequent reasoning and implementation.
6. Conclusion
InCoder-32B-Thinking combines ECoT’s error-correction traces with ICWM’s learned code–hardware dynamics to address industrial reasoning demands. It reports strong general and industrial benchmark performance, with further gains as thinking data scales.
- Conclusion: ECoT explicitly models iterative error correction, while ICWM learns causal dynamics between code and hardware behavior from domain-specific execution traces.Together they provide reasoning traces grounded in industrial execution feedback.
- Conclusion: 81.3% on LiveCodeBench V5 accompanied the strongest open-source results across chip design, GPU optimization, embedded systems, and 3D modeling.The evaluation covered 14 general and 9 industrial benchmarks.
- Conclusion: Scaling thinking data from 180M to 540M tokens yielded consistent industrial improvements.The conclusion attributes these gains to chain-of-thought synthesis grounded in world-model guidance.
A.1. General Code Benchmarks
The general-code evaluation spans functional correctness, code reasoning, efficiency, text-to-SQL, agentic coding, and tool use. These benchmarks test increasingly broad abilities, from short-program execution to multi-turn software and API interactions.
- Code Generation: EvalPlus, HumanEval, and MBPP assess functional correctness of short Python programs with expanded test coverage.EvalPlus augments HumanEval and MBPP with substantially more test cases.
- Code Generation: BigCodeBench evaluates composing calls across popular Python packages through 1,140 task-oriented prompts.It focuses on complex library API invocation.
- Code Reasoning: CRUXEval tests code understanding through input and output prediction on 800 short Python programs.The tasks require tracing program execution.
- Code Efficiency: Mercury reports Beyond@1 and Pass@1 for runtime-efficient solutions, measuring efficiency alongside correctness.The benchmark targets code efficiency.
- Text-to-SQL: Spider and BIRD test translating natural-language questions into SQL across databases with schema, join, and aggregation reasoning.They are cross-database text-to-SQL benchmarks.
- Agentic Coding: Terminal-Bench and SWE-bench Verified evaluate multi-turn terminal work and end-to-end resolution of real GitHub issues, respectively.SWE-bench Verified includes code understanding, patch generation, and test validation.
- Tool Use: Mind2Web, BFCL V3, and τ2-bench assess web navigation, function calling across API schemas, and multi-turn tool-augmented service conversations.The covered service domains are Airline, Retail, and Telecom.
A.2.1. Chip Design
The chip-design evaluation spans benchmarks for Verilog generation, repair, and complex digital-system design, using compilation, simulation, and layered verification to assess correctness.
- VeriScope: VeriScope contains 568 Verilog problems across five difficulty tiers, ranging from combinational logic to a dual-core out-of-order RISC-V SoC.Correctness is assessed through simulation with a three-level scoring scheme.
- RealBench: RealBench evaluates production-grade IP-level Verilog generation across 60 module-level and 4 system-level subtasks from four open-source IP cores.System-level tasks require implementing the entire module hierarchy from a top-level specification.
- RealBench: Syn@k measures compilation success, while Func@k additionally measures functional correctness through testbench simulation on compilable candidates.Both metrics are reported at k∈{1, 5}, separately for system-level and module-level tasks.
- ArchXBench: ArchXBench comprises 51 digital-system designs across six difficulty levels, covering domains including cryptography, signal processing, image processing, and machine learning.Tasks range from arithmetic circuits to AES cores and streaming FFT/DCT pipelines, each paired with specifications and a testbench.
- VeriRepair: VeriRepair contains approximately 22,000 training samples and 300 test samples spanning syntax, type and structural, timing and FSM, and semantic/logic errors.The benchmark is built by injecting realistic bugs into verified implementations.
A.2.2. GPU Kernel Optimization
The GPU-optimization benchmark suite covers PyTorch kernel acceleration, Triton operator generation, embedded C under real-time constraints, assembly superoptimization, and executable CAD generation.
- KernelBench: KernelBench contains 250 PyTorch workloads across three complexity levels, requiring functionally equivalent but faster implementations using available optimization tools.The levels progress from single operators to fusion opportunities and end-to-end model architectures.
- TritonBench: TritonBench evaluates Triton operator generation through 184 curated real-world operators and a track aligned with standard PyTorch interfaces.Both tracks measure call accuracy and another reported metric described in the benchmark passage.
- EmbedCGen: EmbedCGen includes 500 bare-metal embedded C problems spanning peripheral control, register operations, DMA, and state-machine coordination under hard real-time constraints.Evaluation uses ARM GCC cross-compilation followed by functional verification in the Renode simulator.
- SuperCoder: SuperCoder evaluates semantically equivalent x86-64 assembly generation from C programs and gcc -O3 outputs, using functional correctness and speed-related metrics.The benchmark contains 8,072 assembly programs averaging 130 lines, with test suites reporting 96.2% line coverage and 87.3% branch coverage.
- CAD-Coder: CAD-Coder evaluates executable CadQuery scripts for text-to-CAD generation using 110K verified text–CadQuery–3D model triplets and 1.5K chain-of-thought samples.The dataset is stratified into 8K high-quality, 70K medium-quality, and 32K hard cases.