Source-linked AI summary
Real-time virtual circuits for plasma shape control via neural network emulators: integration and testing in the MAST-U PCS
Matthew J. Marshall, Edward Jones, Graham J. McArdle, Alasdair Ross, Kamran Pentland, Nicola C. Amorisco, Charles Vincent, Martin Kochan, Colin Hogben, Graham Jones, Adam Stephen, George K. Holt, Adriano Agnello
TL;DR
Tokamak AI control requires PCS integration and pre-experimental validation that satisfy strict real-time constraints. This paper deploys neural-network emulators as a real-time virtual-circuit system in the MAST-U PCS, returning Jacobians for shape actuation. The integrated workflow reproduces emulator commands, meets measured latency requirements under the tested conditions, and has supported active MAST-U plasma control across multiple scenarios.
Problem
Conventional virtual circuits are computed offline and can lose accuracy when plasma trajectories depart from anticipated scenarios, while native neural-network interfaces do not satisfy PCS real-time constraints.
Method
The paper integrates neural-network emulators with a real-time inference server and PCS algorithm that computes Jacobian pseudoinverses and updates selected virtual-circuit entries.
Results
The integrated scheme issues the same commands as TensorFlow-based emulators in closed-loop workflows, with measured timings compatible with MAST-U experimental testing under the conditions considered.
Takeaways & Limitations
The RTVC workflow establishes readiness for plasma control and provides a basis for using other full-precision neural-network models in tokamak control functions.
Takeaways & Limitations
The implementation used generic Linux binaries because PCS hardware optimizations such as vectorization remain future work.
Abstract
from arXiv · showhide
The deployment of advanced, AI-enabled control algorithms in tokamak experiments requires robust integration with existing plasma control system (PCS) architectures and extensive pre-experimental validation. In this contribution, we describe the integration and testing of neural-network-emulated virtual circuits for plasma shape control within the MAST Upgrade (MAST-U) PCS environment. The neural network models predict the plasma shape using the plasma current, poloidal field coil currents, and plasma profile parameters. In this paper, we explain how they are deployed via a real-time C++ inference server that interfaces with the PCS, returning the shape prediction and its Jacobian, and how, from the latter, virtual circuit matrices and updated coil current requests are computed for real-time actuation. Emphasis is placed on the validation workflow and best practices adopted to ensure confidence in the proposed control framework prior to experimental deployment. This work demonstrates practical AI-based shape control components for fusion control systems, with direct relevance for upcoming MAST-U experiments and future devices.
1. Introduction
The paper integrates and tests an AI-enabled plasma shape controller in the MAST-U PCS, completing validation of real-time virtual circuits before experimental deployment. The integrated controllers reproduce expected outputs during pre-shot testing and commissioning while retaining conventional shape-control capabilities.
- Motivation and contribution: The work integrates a neural-network plasma shape controller into the MAST-U PCS for real-time shape actuation.The controller uses plasma current, PF coil currents, and plasma current density profile parameters to return state-aware virtual circuits.
- Motivation and contribution: State-aware virtual circuits adapt shape sensitivity on millisecond timescales, unlike conventional circuits computed offline before a shot.This supports scenarios with substantially evolving plasma shapes and unforeseen plasma trajectories.
- Validation scope: The work completes validation after prior checks against Grad-Shafranov solutions in static scenarios and closed-loop simulations.The contribution focuses on fully PCS-software-integrated real-time virtual-circuit controllers.
- Validation scope: R^2 > 0.99 was achieved during pre-shot testing and “piggyback” commissioning shots, while conventional shape-control capabilities were retained.The result concerns expected controller output during early commissioning activities.
2. Plasma Shape Control in the MAST-U PCS
MAST-U shape control represents plasma geometry with reconstructed descriptors and uses virtual circuits to convert requested shape changes into PF-coil current requests. Neural-network emulators provide real-time sensitivity estimates where offline virtual circuits can lose accuracy as trajectories change.
- Existing PCS capability: LEMUR reconstructs plasma shape descriptors including midplane radii, X-point position, divertor and strike-point radii, and squareness gap.These descriptors are collected in the vector P.
- Virtual-circuit control: A virtual-circuit matrix is the pseudoinverse of the sensitivity matrix S = ∂P/∂I_shape, mapping requested shape changes to PF-coil current changes.The mapping leaves other shape parameters unchanged.
- Virtual-circuit control: At each time step, requested shape-rate changes are multiplied by a virtual circuit to obtain coil-current requests, which are then subject to machine-protection limits.The limited requests are converted to PF-coil voltages.
- Motivation for emulation: Offline virtual circuits can degrade when plasma trajectories depart from the anticipated scenario, whereas neural-network emulators generate sensitivity matrices and virtual circuits in real time.The emulator inputs include PF-coil currents, total plasma current, and plasma current density profile parameters.
3. Real-time Virtual Circuit Server
The RTVC Server deploys neural-network inference under PCS real-time constraints by separating initialization from low-latency server operation. Tests show that communication and inference timing meet the stated control-cycle requirements, including for an eight-model ensemble.
- Real-time requirements: PCS operation requires initialization-only memory allocation, low-latency communication without syscalls, and a sufficiently fast cycle time.The native Python/Keras interface is unsuitable because inference is slow and jittery and cannot constrain memory allocation.
- Inference engine: TensorFlow Lite for Microcontrollers was selected because it supports inference under constraints similar to those of the PCS.ONNX, OpenVINO, and NCNN were rejected for inference-time allocation, while TVM AOT required steeper development and integration effort.
- Server architecture: The RTVC Server separates CLI validation and memory allocation from library-based server modes that perform inference and return shape parameters or Jacobians.Its modes include shape-parameters-only, Jacobian, and multi-threaded Jacobian operation.
- Ensemble operation: An ensemble averages model predictions and Jacobians to trade accuracy against the achievable virtual-circuit update rate.Multi-threading distributes perturbed finite-difference inferences across worker threads.
- Timing validation: 8 models remain sub-1ms at the 99th percentile for end-to-end requests, while a single model exceeds the 10kHz shape-control frequency through the 90th percentile.No-inference communication averages 1.5MHz, confirming communication sufficiency for the PCS 1MHz control cycle.
4. PCS Integration and Testing
The RTVC Algorithm integrates emulator-derived Jacobians into the PCS virtual-circuit workflow and validates the complete implementation through reproducible shot replay and controlled tests. The implementation is tested across representative MAST-U scenarios, with observed discrepancies attributed to simulation calibration differences.
- PCS integration: Conventional shape control runs at 10kHz on PCS CPU2 and selects virtual circuits from a pre-set schedule.PCS control functions are organized into independently scheduled Categories and Phases.
- RTVC integration: The RTVC Algorithm sends real-time measurements to the server, receives an ensemble-averaged Jacobian, computes its pseudoinverse, and overrides selected conventional virtual-circuit entries.The conventional VC Algorithm remains active in the background during overwriting.
- Timing and execution: The computational work is split across CPU2 for virtual-circuit overriding and coil-current requests and CPU5 for server communication and pseudoinversion.RTVC Server runs asynchronously on separate pinned threads.
- Scope and limitations: Architecture-specific optimizations such as vectorization were deferred, with generic Linux binaries used for the implementation.Future optimized binaries are expected to reduce jitter further.
- Validation workflow: The test suite replays MAST-U shots on development machines while comparing Jacobians, virtual-circuit matrices, and control outputs against reference emulators.Tests mock the PCS real-time heap and associated data structures to support reproducible debugging.
- Validation workflow: Shot 53000 represented high elongation and shot 53010 represented a super-X divertor in robustness tests varying timing, profiles, inverse-matrix configuration, and shape parameters.Each shot received a baseline configuration and controlled variations.
- Validation results: R^2 ≥ 0.95 was observed in most tests, with offsets attributed to mismatched ADC calibration between PCS and simulation replay.PCS uses channel-specific calibration, whereas replay applies one global offset and scaling factor.
5. MAST-U Commissioning Shots
RTVC was run in parallel with the conventional VC Algorithm during three MAST-U commissioning shots, enabling direct comparison of its unapproved coil-current derivative requests with TensorFlow emulator outputs. The requests showed almost perfect agreement, while VC updates remained within the stated commissioning latency.
- Commissioning setup: RTVC ran in piggyback mode alongside the conventional VC Algorithm on MAST-U shots 53974, 53975, and 53976.The conventional algorithm controlled the plasma, while RTVC logged the requests it would have produced from real-time measurements.
- Request agreement: The unapproved coil-current derivative requests from RTVC and the TensorFlow emulators showed almost perfect agreement across the commissioning shots.The comparison was made before machine-safety-limit clipping.
- Real-time performance: VC update latency remained within [5, 5.6]ms during commissioning, corresponding to approximately 130-144 state-dependent VCs per full 1s shot.The stated range corresponds to the number of real-time VC generations observed during the shots.
6. Conclusions
The paper integrated neural-network emulators into a real-time MAST-U PCS control scheme and validated that the resulting workflow reproduced TensorFlow-emulator commands. The measured execution was compatible with experimental testing and supports broader use of full-precision neural-network models in suitable tokamak PCS environments.
- Conclusions: The emulators were translated into a real-time control scheme integrated with the MAST-U PCS.The scheme uses emulator outputs within a closed-loop control workflow.
- Conclusions: The real-time scheme issued the same commands as the TensorFlow-based emulators in a closed-loop control workflow.This established readiness for plasma control via the RTVC Algorithm.
- Conclusions: Measured RTVC workflow timings were compatible with MAST-U experimental testing under the conditions considered, with margin for further optimisation.The remaining optimisation scope concerns inference and communication overheads.
- Conclusions: RTVC was subsequently used successfully to actively control MAST-U plasmas across a range of scenarios.Those active-control results are described separately.
- Conclusions: Real-time-appropriate latency and a general neural-network inference server lay groundwork for using other full-precision models in tokamak control.The stated scope includes system-on-a-chip PCS environments where an accuracy-latency tradeoff may not be necessary.