Source-linked AI summary
Current-Limiting Control for Fault Ride-Through of LLC-based Solid-State Transformer in Data Centers
Haoyu Wang, Chi Zhang, Mafu Zhang, Rudy Wang, Peter Barbosa
TL;DR
Downstream short circuits can force voltage-source-type SST stages toward damaging currents and shutdown before branch protection isolates the fault. The paper embeds fault detection, designated-current limiting, and coordinated ramped recovery in the LLC DC-DC control, and experiments verify fault ride-through without inrush currents.
Problem
Downstream load short circuits can rapidly produce damaging currents in voltage-source-type SST stages, while existing protection approaches may add hardware or fail to provide specified-current operation and restoration.
Method
The paper implements a local DSP strategy with four stages—normal operation, fault detection, current limiting, and recovery—using frequency surge, closed-loop duty-cycle control, and coordinated rate-limited restoration.
Results
Experiments verify sufficient fault current for protection-device action and recovery under ramped switching frequency and duty cycle without inrush currents in the resonant tank.
Takeaways & Limitations
The control-level strategy offers a feasible way to ride through downstream DC load faults while keeping the SST enabled and avoiding additional hardware.
Abstract
from arXiv · showhide
Solid-State Transformers (SSTs) are increasingly proposed as the interface between distribution grids and data centers due to flexible power flows and fast dynamic response. However, when a short-circuit fault occurs in a load branch, the SST with a voltage-source-type DC-DC stage is forced to shut down due to fault currents. Therefore, current-limiting strategies are strongly needed to prevent catastrophic equipment damage and cascading blackouts by instantly restricting massive current spikes and offering sufficient currents for protection devices to act at the faulted branch. This paper proposes a coordinated DC load fault-tolerant current-limiting and recovery strategy embedded directly in the control of the SST DC-DC stage, avoiding additional hardware cost. Specifically, the fault mechanism of an example LLC resonant converter is studied. Accordingly, a fault detection framework is implemented, a closed-loop current controller is proposed to limit the DC current to a designated value within microseconds by surging the switching frequency and adjusting the duty cycle, and a ramped recovery stage will then restore the DC bus after the fault isolation without inrush currents. Experiments on an LLC converter prototype have verified the feasibility of the proposed current-limiting strategy, enabling faster and lower-cost fault response suitable for resilient data center power architectures.
1 Introduction
SSTs are promising interfaces for data-center DC buses, but downstream short circuits can produce damaging currents before branch protection acts. The paper therefore develops a control-embedded strategy that detects faults, limits current, and restores operation without additional hardware.
- Motivation: Downstream short circuits can drive fault currents sharply upward within tens of microseconds, forcing voltage-source-type SST stages to shut down.Branch protection requires current that is regulated rather than unlimited or blocked, so fuses or breakers can selectively isolate the fault.
- Motivation: Control-level fault ride-through is attractive because it can isolate only the faulted load branch without adding hardware.Existing alternatives include feeder hardware protection and converter over-current protection that may not maintain a specified current or address restoration.
- Proposed strategy: The paper targets downstream DC load short circuits in voltage-source-type SST DC-DC stages with a coordinated current-limiting and recovery strategy embedded in control.The target is a load fault rather than a fault on the DC bus.
- Proposed strategy: The proposed framework analyzes LLC load-side faults and detects them to instantly restrict the fault current.The detection framework is one of the paper's stated contributions.
- Proposed strategy: A closed-loop current regulator maintains a designated DC current, allowing fault isolation and resilient operation without additional hardware.The regulated current is intended to support protection-device operation while keeping the converter controllable.
- Proposed strategy: A coordinated ramp jointly restores switching frequency and duty cycle after isolation, bounding inrush current during soft recharge.The recovery stage is designed to restore operation without excessive current transients.
2 DC Fault Mechanism and Analysis
The paper models a downstream short circuit in an LLC converter as a low reflected resistance that produces severe, rapid resonant-current stress. This analysis motivates current limiting for safe fault handling.
- LLC fault model: The example LLC converter uses a full-bridge inverter, resonant tank, transformer, diode rectifier, and output capacitor.The inverter drives the resonant tank through input voltage Vi, while the transformer and rectifier feed capacitor Co.
- LLC fault model: A downstream short circuit is represented by a small output resistance Rs reflected to the converter's primary side.The reflected resistance provides the low-impedance fault condition used in the analysis.
- LLC fault model: The faulted second-order resonant tank is characterized using resonant frequency, characteristic impedance, damped coefficient, damped frequency, and damping ratio.These quantities define the dynamic model used to analyze fault behavior.
- LLC fault model: With switching frequency expressed as fs = fr(1 + δ), the analysis derives steady-state peak resonant and DC currents and the transient overshoot.The expressions relate switching-frequency offset and resonant dynamics to fault-current behavior.
- Implication: A small fault resistance Rs can produce large peak currents in a very short time, causing severe system damage and requiring current limiting.The paper notes that similar fault behavior can be analyzed for other DC-DC converter types.
3 Current Limiting and Recovery Strategy
The strategy detects downstream DC faults and coordinates frequency, duty-cycle, and recovery control to limit current, support fault isolation, and recharge the bus without inrush.
- Strategy Overview: The local DSP implements four stages: normal operation, fault detection, current limiting, and recovery.The strategy requires no communication with downstream protection devices.
- Fault Detection: Fault detection uses sensed DC current and its rise rate, with software comparison avoiding additional hardware.The fault condition combines a current threshold with a threshold on current increase rate.
- Current Limiting: After switch disabling reduces the current, the controller maintains a designated limiting current so fuses can isolate the fault branch.The controller transfers authority to the current-limiting strategy after the current discharges to a system-friendly level.
- Current Limiting: A rapid switching-frequency surge reduces power capability, while duty-cycle control regulates DC current during the fault.The combined action holds Idc at Idc,lim while Vdc collapses toward a reduced limiting value, typically for milliseconds.
- Recovery: After isolation, rate-limited ramps jointly adjust switching frequency and duty cycle to recharge the DC bus and restore nominal operation without inrush.The ramps produce controlled monotonic recovery of Vdc and Idc in milliseconds.
4 Experimental Verification
Experiments on an LLC converter prototype verify the proposed strategy across normal operation, fault occurrence, current limiting, fault isolation, and recovery.
- Experimental Setup: The experimental verification uses an LLC converter prototype with its main setup parameters specified in Table 1.The prototype is shown in Fig. 4.
- Normal Operation: Under normal operation, the converter runs at fs = fr = 154 kHz, Vdc =400 V, and Idc =5 A.The prototype operates with Vi = Vdc =400 V and a simulated fault resistance Rs =2 W.
- Fault Occurrence: 117 A and 44 A are reached by Idc and ir, respectively, within 10 µs after the DC fault occurs.The controller disables the switches when Idc exceeds Idc,fault =20 A.
- Current Limiting: Idc is stably limited to Idc,lim =15 A with Vdc held at 30 V during the current-limiting stage.The stage lasts several milliseconds, providing time for fuses to melt.
- Recovery: The converter recovers after fault isolation through designed switching-frequency and duty-cycle ramps without inrush currents in the resonant tank.Fig. 5 covers the overall transition, fault transients, limiting stage, isolation, and recovery.
5 Conclusion
The paper presents a control-level fault-tolerant strategy that limits downstream fault current, supports branch protection, and restores nominal operation without added hardware or communication.
- Conclusion: The strategy detects downstream faults and limits DC current for milliseconds by coordinating a switching-frequency surge with duty-cycle-based closed-loop control.The approach targets voltage-source-type SST DC-DC stages serving DC data center buses.
- Conclusion: The limiting interval allows fuses or circuit breakers to isolate the faulted load branch while the SST remains enabled.The recovery stage then restores nominal operation without excessive recharge inrush currents.
- Conclusion: The control-loop implementation requires no additional hardware cost and no communication with downstream protection devices.Experiments on an LLC converter verified restriction of fault spikes, current support for protection devices, and recovery.