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Differentiable Partitioning with Placement and Hybrid Bonding Terminal Awareness for Optimized 3D Placement

Liwen Jiang, Xu Shi, Rufeng Xiao, Changhao Yan, Rujun Jiang, Zhiang Wang, Keren Zhu

arXiv:2609.06408v1cs.ET

TL;DR

Hybrid-bonded 3D-IC tier assignment must jointly account for placement wirelength and HBT assignment. This paper uses differentiable partitioning with placement-aware objectives and reports lower D2D HPWL than min-cut baselines and CoPlace.

  • Problem

    Tier assignment in hybrid-bonded 3D-ICs couples 3D wirelength, HBT insertion, and local area balance, while existing placement and partitioning approaches are weakly coupled.

    Source: §1 · pp. 1–2, §2.1 · p. 2
  • Method

    The framework relaxes tier assignments to continuous probabilities and optimizes a partition-sensitive Dual-Max 3D wirelength objective alongside terminal-aware cutsize and local balance.

    Source: §1 · p. 2, §4.1 · p. 4, §4.2 · p. 5
  • Results

    D2D HPWL is 1.5% and 2.6% lower than hMETIS and TritonPart, respectively, and 12.1% lower than CoPlace.

    Source: §6 · p. 7
  • Takeaways & Limitations

    Normalized results indicate that directly optimizing partition-sensitive 3D wirelength provides more placement-aware tier assignments than cutsize-oriented partitioning alone.

    Source: §5.1 · p. 6

    CoPlace-based results are not reported for macro designs because its flow does not support macro placement.

    Source: §5.2 · p. 7

Abstract

from arXiv · show

Research on 3D-ICs physical design has expanded rapidly in recent years. Hybrid bonding-enabled 3D integrated circuits (3D-ICs) offer substantial benefits in interconnect scaling and system integration, yet tier assignment remains challenging because it jointly determines 3D wirelength and hybrid bonding terminal (HBT) assignment. This paper presents a differentiable partitioning framework that directly optimizes placement-aware tier assignment for 3D-ICs through gradient-based optimization. Discrete tier assignment is relaxed to continuous probabilities, and a Dual-Max 3D wirelength model is introduced to capture per-tier half-perimeter wirelength (HPWL). In addition, a terminal-aware cutsize penalty selectively suppresses cross-die nets in HBT-congested regions, and a local balance constraint enforces grid-cell density equilibrium across tiers. Experimental results on OpenROAD benchmarks show that our method reduces D2D HPWL by 2.0% on average over two min-cut baselines and by 12.1% over the state-of-the-art 3D placer. We open-source our partition code with 3D placement flow to support reproducibility.

1 Introduction

Tier assignment in hybrid-bonded 3D-ICs must account for placement wirelength and terminal constraints, yet existing approaches leave placement and partitioning weakly coupled. The paper introduces differentiable, placement-aware partitioning and reports lower D2D HPWL than the cited baselines.

1 Introduction

  • True-3D methods can provide no effective tier-assignment gradient from D2D HPWL, while pseudo-3D flows depend on heuristic partitioning stages loosely coupled to placement.True-3D global placement also requires additional refinement or co-placement for feasible per-tier layouts.Source: §1 · p. 1
  • On the illustrated 3-pin net, 2D HPWL and D2D HPWL remain 8 across four partitions, while D2D HPWL without HBT distinguishes them as 1 < 7 < 8 < 11.This motivates a partition-sensitive wirelength objective.Source: Table 1 · p. 2
  • Cutsize correlates poorly with 3D placement wirelength, and greedy FM moves make the final partition sensitive to move ordering and initialization.A low-cutsize partition can still produce poor D2D HPWL when cross-die nets span large bounding boxes on both tiers.Source: §1 · pp. 1–2
  • 2.0% lower average D2D HPWL than two min-cut baselines and 12.1% lower D2D HPWL than CoPlace.The paper also releases its partition code and 3D placement flow for reproducibility.Source: §1 · p. 2
  • The framework relaxes discrete tier assignment to continuous probabilities and combines a Dual-Max 3D wirelength model with terminal-aware cutsize and local-balance objectives.The paper presents an integrated 3D placement flow.Source: §1 · p. 2

2 Preliminaries

In pseudo-3D flows, tier partitioning constrains downstream placement, so useful assignments must consider wirelength, cross-die terminals, and local area balance. The paper formulates F2F 3D placement as a joint problem over cell assignment, per-die placement, and terminal assignment.

2.1 Partitioning in Pseudo-3D Flow

  • Tier partitioning is a central step in pseudo-3D flows, and its outcome directly constrains downstream optimization stages.Representative flows place cells in 2D before partitioning and then perform per-tier co-placement and refinement; true-3D placers instead optimize coordinates across tiers but need further refinement for feasible layouts.Source: §2.1 · p. 2
  • A useful F2F partition must reduce per-die wirelength span, avoid excessive cross-die nets requiring HBTs, and maintain local area balance.These requirements couple discrete die assignment with continuous x-y placement and terminal planning.Source: §2.1 · p. 2

2.2 3D Global Placement

  • The problem jointly assigns cells to two dies, places them on each die, and assigns HBTs for cross-die nets under utilization and terminal constraints.Its objective is total D2D HPWL; cross-die nets are split into top- and bottom-die sub-nets augmented with the corresponding HBT as a virtual pin.Source: §2.2 · p. 2
  • HBT size and spacing constraints make the number and placement of cross-die nets affect both wirelength and terminal congestion.The resulting task integrates hypergraph partitioning, per-die placement, and terminal planning.Source: §2.2 · p. 2

3 Partitioning-First 3D Placement Flow

The flow performs differentiable partitioning before multi-die placement and discrete refinement. It then uses concrete cell and terminal locations to refine the binary tier assignment before legalization and detailed placement.

3 Partitioning-First 3D Placement Flow

  • The partitioning-first flow proceeds through partitioning, 2D initial placement, multi-die co-placement, refinement, replacement, legalization, and detailed placement.After differentiable partitioning, placement generates cell coordinates and tentative terminal locations used by a discrete FM refinement step.Source: §3 · p. 3

3.1 Differentiable 3D Partitioning

  • The differentiable partitioner optimizes tier probabilities using Dual-Max wirelength, terminal-aware cutsize, local balance, and unified 2D density penalties.It initializes logits near an unbiased 0.5 assignment, first allows positions to stabilize during exploration, then uses annealed Gumbel-Softmax to drive probabilities toward binary values.Source: §3.1 · p. 3

3.2 Multi-Die Co-Placement

  • Multi-die co-placement jointly refines cell positions and HBT locations across top-die, bottom-die, and terminal electrostatic layers.Enlarged HBT footprints allow the terminal-layer density penalty to enforce spacing constraints.Source: §3.2 · p. 3

3.3 HPWL- and Terminal-Driven FM-based Refinement

  • A discrete FM pass uses placement information to correct residual local suboptimality in the binary tier assignment.It evaluates affected-net D2D HPWL and terminal changes, prioritizes candidates in spatial bins, and retains the move prefix with the largest cumulative gain subject to destination-die utilization.Source: §3.3 · p. 4

4 Differentiable 3D Partitioning

This section formulates the tier-dependent terms of a differentiable 3D partitioner, with D2D wirelength shaped by partition topology and terminal distribution. It pairs tier-sensitive wirelength with terminal-aware cut penalties and local area balancing.

4.1 Dual-Max 3D Wirelength Model

  • Dual-Max 3D wirelength sums per-tier HPWL while excluding HBT connections, and its LSE relaxation supplies gradients that favor grouping spatially proximate pins on the same die.For binary assignments, the model reduces to the exact HPWL of each tier; the continuous formulation replaces max operations with LSE approximations.Source: §4.1 · p. 4

4.2 Terminal-Aware Cutsize Constraint

  • The terminal-aware cutsize penalty weights cut nets more heavily when their estimated HBTs overlap within a spacing threshold, checking nearby terminals with spatial hashing.The overlap mask is refreshed every K iterations to balance query cost and tracking accuracy.Source: §4.2 · p. 5

4.3 Local Balance Penalty

  • Grid-cell balance penalizes capacity overflow, while a global 1×1 balance term keeps tier-wide area within utilization bounds when large macros skew local distributions.The local term addresses spatial concentration that a tier-agnostic global density penalty may not prevent.Source: §4.3 · p. 5

5 Experimental Results

On OpenROAD benchmarks, the differentiable partitioner lowers D2D HPWL against min-cut baselines and CoPlace. Cutsize weight controls the number of cross-die nets, while runtime is concentrated in the four forward operators.

5.1 Validation on 3D Placement Flow

  • Evaluation used OpenROAD benchmarks under homogeneous ASAP7, with different random seeds to check result stability; CoPlace results are unavailable for macro designs because its flow does not support macro placement.The experiments also include scaled aes and ibex designs to stress larger design sizes.Source: §5.1 · p. 6, §5.2 · p. 7

5.2 Effectiveness of Cutsize Weight

  • At λc = 500, jpeg cutsize falls from 18,751 to 1,559; D2D HPWL reaches ∼2.5×10^6 near λc = 3 × 10^4 before rising to ∼4.5×10^6 at λc = 1.7 × 10^5.Cutsize stabilizes around 1,000–2,000 at larger λc, while over-penalizing cutsize distorts placement and degrades wirelength.Source: §5.2 · p. 6, Figure 5 · p. 6

5.1 Validation on 3D Placement Flow

  • Under homogeneous ASAP7 3D placement, the method further lowers D2D HPWL by 12.1% on average; versus hMETIS and TritonPart, it reduces D2D HPWL by 1.5% and 2.6% on average, respectively.TritonPart achieves 3.9% lower D2D HPWL on ibex ×5, while hMETIS is 0.8% lower on ariane133.Source: §5.1 · p. 6, Table 2 · p. 7

5.3 Runtime Breakdown

  • The Balance operator accounts for 27.6% of runtime, and the four core loss operators together constitute about 87% of the forward pass.All four operators can be evaluated in parallel on GPU.Source: Figure 4 · p. 6, §5.3 · p. 7

6 Conclusion

The paper presents a differentiable partitioning framework for F2F 3D-IC placement that jointly optimizes Dual-Max 3D wirelength, terminal-aware cutsize, and local balance. On OpenROAD benchmarks, it reports lower D2D HPWL than min-cut baselines and CoPlace.

6 Conclusion

  • The framework relaxes tier assignment into continuous variables and jointly optimizes Dual-Max 3D wirelength, terminal-aware cutsize, and local balance.Its Dual-Max model sums tier-specific HPWLs without HBT terminal connections, making wirelength optimization sensitive to tier assignment.Source: §6 · p. 7
  • On OpenROAD benchmarks, D2D HPWL is 1.5% and 2.6% lower than with hMETIS and TritonPart, respectively, and 12.1% lower than with CoPlace.Source: §6 · p. 7
  • The reported results support placement-aware tier assignment through direct optimization of a partition-sensitive 3D wirelength objective.Source: §6 · p. 7
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