Source-linked AI summary

AccelForge: Comprehensive Modeling and Co-Design Framework for AI Accelerators

Tanner Andrulis, Michael Gilbert, Vivienne Sze, Joel S. Emer

arXiv:2609.11906v1cs.AR

TL;DR

Tensor-algebra workloads require efficient, high-throughput accelerators, but existing frameworks do not jointly provide comprehensive modeling, optimal fast mapping, and easy extensibility. AccelForge combines these capabilities through composable models and Python-based mappers, unifying prior works into one framework for accelerator design exploration.

  • Problem

    Existing accelerator modeling frameworks do not jointly provide comprehensive design-space coverage, fast and optimal mapping, and easy extensibility for energy-intensive tensor-algebra workloads.

  • Method

    AccelForge combines composable models of devices, circuits, and architectures with mapping optimization and modular Python implementations that incorporate and extend prior works.

  • Results

    AccelForge provides a unified framework intended to support comprehensive accelerator evaluation, fast and accurate mapping, and easy extension.

  • Takeaways & Limitations

    The framework supports iterative accelerator research by making design specifications, mapping exploration, and future extensions easier to modify and evaluate.

Abstract

from arXiv · show

Tensor algebra workloads, of which deep neural networks are prominent examples, are energy-intensive workloads in modern datacenter and edge deployments, making accelerators necessary to achieve energy efficiency and high throughput. To quickly evaluate and iterate on accelerator designs, we need an accelerator modeling framework that captures salient attributes of devices, circuits, architectures, workloads, as well as optimizing the mapping of the workload onto the hardware. In this paper, we introduce AccelForge, which improves upon existing accelerator modeling frameworks in capabilities, speed, and ease-of-use. AccelForge unifies and multiple works into one framework, and it includes (1) composable user-defined and user-modifiable models of devices, circuits, and architectures, (2) fast mappers that enable accurate evaluation in orders of magnitude less (computer and human) time, and (3) easy-to-use and easy-to-extend, yet still high performance, Python implementations of both the model and mapper to enable rapid research and extension to novel optimizations.

I. INTRODUCTION

AccelForge addresses the need for energy-efficient, high-throughput tensor-algebra accelerators by combining comprehensive modeling, mapping optimization, and extensible implementations in one framework.

  • I. INTRODUCTION: Tensor-algebra workloads are energy-intensive, while slowing Moore’s law and ended Dennard scaling limit transistor-based energy and throughput gains.
  • I. INTRODUCTION: Accelerator evaluation jointly considers components, architectures, workloads, and mappings, with mappings programming workloads onto hardware spatially and temporally.
  • I. INTRODUCTION: The evaluation pipeline models component action costs, searches the mapspace for a mapping, and derives action counts and overall costs from the selected mapping.For example, a buffer read can be modeled as costing 1pJ/bit.
  • I. INTRODUCTION: Suboptimal mappings can increase latency and energy and may mislead designers toward overprovisioned hardware resources.
  • I. INTRODUCTION: The framework is intended to make parameter changes modular and intuitive, report specification errors informatively, and accommodate future mappings and hardware features.
  • I. INTRODUCTION: AccelForge unifies and extends prior work to support a comprehensive design space, fast and accurate mapping, and ease of extension.Its framework targets device, circuit, architecture, workload, and mapping choices across accelerator evaluation.

II. CITING ACCELFORGE

This section provides citation guidance for AccelForge as a whole and for its individual components, including specifications, cost models, and mappers.

  • II. CITING ACCELFORGE: The paper directs readers to cite AccelForge generally through the paper and to cite specific framework components separately when appropriate.
  • II. CITING ACCELFORGE: The listed component citations cover workload and architecture specifications, component cost models, mapping specifications, and intra- and inter-Einsum mappers.
  • II. CITING ACCELFORGE: AccelForge is available through the Accelergy-Project GitHub repository.
  • II. CITING ACCELFORGE: The component references include CiMLoop for compute-in-memory modeling, LoopTree for mapping specification, TCM for intra-Einsum mapping, and FFM for inter-Einsum mapping.
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