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Towards Block-Level Fault-Tolerant Quantum Simulation on Small High-Rate Non-CSS Codes

Zhuangzhuang Chen, Narayanan Rengaswamy

arXiv:2609.16159v1quant-phcs.ITmath.IT

TL;DR

Small non-CSS codes offer compact settings for encoded computation, but their circuit-level fault tolerance for logical dynamics remains incompletely established. This paper studies block-level logical Trotter circuits using the [[8, 3, 3]] code and examines memory protection, recovery, and fault propagation. The memory experiment reaches a pseudo-threshold near 1.5 × 10^-3, while a diagnostic protected limit restores threshold-like behavior in both logical sectors.

  • Problem

    The flagged extraction circuits, recovery tables, and circuit-level performance of the [[8, 3, 3]] non-CSS code had not previously been presented together, leaving its compatibility of memory protection with useful logical dynamics to be assessed.

    Source: §I · p. 1

  • Method

    The study examines block-level logical Trotter circuits on the [[8, 3, 3]] code and analyzes how fault records and recovery distinguish propagated errors.

    Source: §I · p. 3, §2 · p. 12

  • Results

    The memory experiment has a pseudo-threshold near 1.5 × 10^-3, and a diagnostic protected limit restores threshold-like behavior in both logical sectors.

    Source: G. Asymmetric gate-noise benchmarks… · p. 22, §VI · p. 26

  • Takeaways & Limitations

    Preserving fault-tolerant distance requires sufficient syndrome and flag information before a propagated fault closes into a logical operator.

    Source: §I · p. 3

    The protected limit relies on ideal phase and flag-gadget couplings; removing the ideal phase assumption without reintroducing a first-order logical operator remains unresolved.

    Source: §V · pp. 22, 25

Abstract

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Small high-rate non-CSS stabilizer codes provide compact platforms for encoded quantum computation, but mixed-Pauli checks and limited native transversal logical gates complicate fault-tolerant dynamics. Block-level constructions offer an alternative by mapping an entire logical block to a physical circuit rather than compiling separately protected logical gates. We investigate this approach using the high-rate [[8,3,3]] non-CSS code and logical Trotter circuits as a testbed. We construct flagged syndrome-extraction circuits and establish a circuit-level memory pseudo-threshold near \(1.5\times10^{-3}\). We then apply our symplectic-transvection construction, which maps a logical Trotter circuit to a physical circuit with the same block pattern for any stabilizer code. Although this mapping preserves the intended unitary algebraically, encoded Trotter circuits exhibit asymmetry between logical-\(X\) and logical-\(Z\) failure channels. Single-fault analysis identifies the mechanism: a fault on the shared parity ancilla can propagate through the uncomputation network into an undetectable logical operator, reducing the effective circuit distance in the affected sector. We evaluate flag-conditioned recovery, biased-noise decoding, CliNR resource verification, flag postselection, and asymmetric gate-noise models. These methods suppress propagated faults but do not simultaneously suppress both logical sectors in the realistic configurations studied. A diagnostic protected limit removing the identified malignant first-order locations restores pseudo-threshold behavior in both sectors, approaching memory performance. These results demonstrate the potential of block-level logical constructions for non-CSS codes without rich native transversal gate sets and the joint protection of the parity network, analog rotation, and recovery required to preserve fault-tolerant distance.

I. INTRODUCTION

The paper studies whether compact, high-rate non-CSS codes can support fault-tolerant logical simulation, using the [[8, 3, 3]] code as a circuit-level testbed. It maps logical Trotter blocks to physical circuits, then examines how circuit faults and available recovery information affect protection.

I. INTRODUCTION

  • Circuit-level behavior of small non-CSS codes remains comparatively unexplored despite their potential as near-term testbeds beyond CSS-specific measurement structure and native logical primitives.The code’s flagged extraction circuits, recovery tables, and circuit-level performance had not previously been presented together.Source: §I · p. 1
  • The [[8, 3, 3]] code encodes three logical qubits in eight physical qubits, has distance three, and uses mixed-Pauli checks, making it a compact non-CSS testbed.The study does not infer large-code scaling from this single example.Source: §I · pp. 1–2
  • The flagged memory experiment has a circuit-level pseudo-threshold near 1.5 × 10^-3 under the study’s ideal-cleanup boundary convention.The study constructs five two-ancilla flagged extraction circuits and recovery tables.Source: §I · p. 2
  • A single phase-containing fault on the shared parity ancilla can propagate through the closing CNOT ladder into an undetectable logical-Z operator, producing circuit-distance-one behavior in that sector.This mechanism contributes to the direct encoded circuit’s logical-sector asymmetry.Source: §I · p. 2
  • Flag-conditioned recovery, biased-noise decoding, CliNR verification, and flag postselection suppress some failures, but none of the tested noisy circuits suppresses both logical sectors simultaneously.Distinct propagated errors can share the same flag and syndrome record, so the asymmetry is not solely a decoder artifact.Source: §I · p. 2
  • Removing the identified malignant first-order Trotter mechanisms in a diagnostic protected limit restores pseudo-threshold behavior in both sectors, approaching memory performance.The paper identifies preserving sufficient syndrome and flag information before a propagated fault closes into a logical operator as a circuit-level design criterion.Source: §I · p. 3

B. Hamiltonian simulation and Pauli-rotation circuits

  • The code-independent mapping replaces each logical Pauli in a Trotter sequence with a physical representative, preserving the logical circuit’s Trotter pattern.Mapping a complete block does not itself guarantee that its parity circuit is fault tolerant.Source: §I · p. 2, B. Hamiltonian simulation and… · p. 4

C. Circuit-level fault tolerance and pseudo-thresholds

The section establishes memory benchmarks for the distance-three [[8, 3, 3]] code and explains why static code distance alone does not determine circuit-level fault tolerance. Repeated syndrome measurements suppress readout-error effects, while the code-capacity and phenomenological experiments provide finite-size reference points.

C. Circuit-level fault tolerance and pseudo-thresholds

  • A single circuit fault can propagate into a higher-weight error or logical coset, so static code distance does not by itself determine circuit fault tolerance.For a fixed small code, the pseudo-threshold is a finite-size crossing against a specified reference, not an asymptotic accuracy threshold.Source: C. Circuit-level fault tolerance and… · p. 4

A. Code description and memory benchmarks

  • Near p ≃ 0.04, the encoded logical-error curve crosses the unencoded reference PL = p, giving a code-capacity pseudo-threshold of approximately 4%.The Monte Carlo logical-error rate closely agrees with the probability of two or more data-qubit errors.Source: A. Code description and memory… · p. 5, Figure 2 · p. 5
  • At pmeas = 0.005, R = 3 and R = 5 majority-vote syndrome measurements substantially improve on R = 1 and have comparable overall logical performance.R = 3 is used subsequently because it gives the lowest sampled logical error rates with fewer measurements than R = 5.Source: A. Code description and memory… · p. 6, Figure 3 · p. 6
  • For nonzero pmeas, measurement-noise degradation is most visible at small pdata, where syndrome-readout errors constitute a relatively large fraction of observed failures; at larger pdata, data errors dominate logical failure.Source: A. Code description and memory… · p. 6

B. Circuit-level error correction and flagged syndrome extraction

The section develops two-ancilla flagged syndrome extraction and a dynamic recovery procedure for the [[8, 3, 3]] code. With ideal terminal cleanup, the single-round memory experiment reaches a circuit-level pseudo-threshold near 1.5 × 10^-3; omitting that cleanup removes the observed pseudo-threshold over the sampled range.

B. Circuit-level error correction and flagged syndrome extraction

  • The flagged circuits use a syndrome ancilla and a flag ancilla, with interactions ordered so relevant correlated errors have distinct full syndromes within each extraction circuit.If a syndrome or flag outcome is nontrivial, the protocol measures all five generators to obtain a complete syndrome for recovery.Source: B. Circuit-level error correction and… · p. 7, Figure 5 · p. 8
  • The protocol processes the five generators sequentially and uses flag-conditioned or weight-one lookup tables to decode the complete syndrome.One round is used as the circuit-level memory baseline and in subsequent plain-Trotter simulations.Source: B. Circuit-level error correction and… · pp. 8–9
  • Ideal terminal cleanup removes correctable residual weight-one errors before logical readout, and without it no pseudo-threshold is observed over the sampled range.The cleanup is outside the noisy protocol and is included in subsequent circuit-level simulations.Source: B. Circuit-level error correction and… · p. 9
  • Near p ≃ 1.5 × 10^-3, both logical-error curves cross the unencoded reference PL = p, giving the single-round protocol a circuit-level pseudo-threshold of approximately 1.5 × 10^-3.The reported experiment uses ideal terminal cleanup before final logical readout.Source: B. Circuit-level error correction and… · p. 9

C. Encoded Trotter Implementation

The section implements logical Pauli rotations as physical encoded Trotter blocks, then shows that parity-uncomputation faults can make the logical-Z sector distance one. Neither logical channel achieves a pseudo-threshold in the plain encoded-Trotter circuit.

C. Encoded Trotter Implementation

  • Both logical-error curves for the one-round flagged [[8, 3, 3]] memory cross the unencoded reference near p ≃1.5×10^-3.This is the circuit-level memory benchmark used alongside the encoded-Trotter results.Source: Figure 6 · p. 9
  • The encoded Pauli rotation accumulates the parity of data qubits 1, 5, 6, and 7 on an auxiliary qubit, applies a π/4 phase gate, then uncomputes the parity.The encoded physical circuit preserves the corresponding unencoded Trotter pattern.Source: C. Encoded Trotter Implementation · p. 9, Figure 7 · p. 10
  • Neither logical-error curve crosses below the unencoded reference over the sampled range for the plain encoded-Trotter implementation.The final measurements use ideally propagated observables, so intended logical transformations are not counted as errors.Source: C. Encoded Trotter Implementation · p. 10, Figure 8 · p. 10
  • A single auxiliary-qubit fault can propagate through parity uncomputation into logical Z2, leaving the logical-Z sector with circuit-level distance one.Its trivial stabilizer syndrome means neither flagged correction nor ideal weight-one cleanup removes it.Source: C. Encoded Trotter Implementation · p. 10
  • The logical-X curve’s approximately linear low-noise behavior is consistent with malignant first-order faults, including correlated errors from parity-computation CNOT faults.The numerical results are consistent with AX > 1 over the sampled range, preventing the logical-X curve from crossing below the unencoded reference.Source: C. Encoded Trotter Implementation · p. 10

1. Biased Noise with Flags

The biased-noise experiment uses Z-type flags and flag-conditioned recovery to target phase-error propagation in the encoded Trotter block. It improves logical-X performance, but logical-Z remains above the unencoded reference.

1. Biased Noise with Flags

  • The restricted noise assumption applies only to the encoded Trotter block, not to the following syndrome-extraction circuits.The latter retain the depolarizing model used in the memory benchmark.Source: §1 · p. 11
  • Two Z-type flags monitor phase-error propagation on the auxiliary parity qubit during parity computation and uncomputation.Each flag is prepared in |+⟩, coupled twice to the parity qubit, and measured in the X basis.Source: §1 · p. 11
  • When exactly one flag triggers, the procedure runs a noisy pass of five unflagged extraction circuits and decodes its syndrome with Table II; double-flag runs are discarded.Runs accepted by the rule receive the same ideal cleanup used in the preceding circuit-level simulations.Source: §1 · p. 11, Table II · p. 11
  • The restricted Z-biased model with flag-conditioned recovery yields a logical-X pseudo-threshold, but logical-Z remains above the unencoded reference over the sampled range.The Trotter block uses the restricted noise model, while subsequent syndrome extraction retains circuit-level depolarizing noise.Source: §1 · p. 11

2. Complete Single-Fault Analysis

Exhaustive single-fault analysis finds that flag outcomes and stabilizer syndromes can leave distinct logical cosets indistinguishable. The resulting ambiguity limits direct flagging, although a diagnostic protected limit recovers pseudo-threshold behavior in both sectors.

2. Complete Single-Fault Analysis

  • Distinct residual errors can share the same flags and stabilizer syndrome yet differ by a logical operator, so no recovery based only on that record can correct both.The lookup-table record is (fL, fR, s), with s denoting the stabilizer syndrome.Source: §2 · p. 12
  • For one trivial-syndrome record, mapping to Z2 corrects one fault class but introduces a logical operator when the residual data error is identity.Mapping instead to identity leaves an existing Z2 error uncorrected, and stabilizer measurements cannot distinguish errors differing by a logical operator.Source: §2 · pp. 12–13
  • Flag outcomes are not a one-to-one indicator of dangerous propagation: benign faults can trigger flags, while correlated or logical data errors can leave both flags untriggered.These behaviors correspond to false-positive flag events and missed detections in a noisy circuit.Source: Figure 9 · p. 12, §2 · p. 13
  • Adding complementary X-sensitive flags requires extra entangling gates and still does not make the flag and syndrome data uniquely determine every residual logical coset.The additional circuit overhead does not resolve the decoding ambiguity.Source: §2 · p. 13
  • The single-fault analysis identifies a structural limitation, but does not attribute the entire logical-Z curve to that mechanism; the simulation also includes noisy recovery and higher-order faults.Some single faults remain logically indistinguishable or undetected even with two flag outcomes and a full stabilizer syndrome.Source: Figure 10 · p. 12, §2 · p. 13
  • The diagnostic protected limit exhibits pseudo-threshold behavior in both logical sectors, with crossings on the same p ∼10^-3 scale as the memory benchmark.This is consistent with removing malignant first-order Trotter faults and with noisy recovery becoming the dominant remaining contribution.Source: §2 · p. 13

E. CliNR-based encoded Pauli rotations

CliNR verifies a resource state before gate teleportation, but in the tested encoded Pauli rotations it strongly suppresses one logical sector at a time rather than both. The asymmetry reverses with the rotation axis and can be amplified by final ideal cleanup.

E. CliNR-based encoded Pauli rotations

  • CliNR prepares and verifies a Clifford resource state offline, then consumes accepted states through gate teleportation and a classically controlled Pauli correction.A nontrivial selected-stabilizer outcome rejects the resource and restarts preparation before it interacts with the input.Source: E. CliNR-based encoded Pauli rotations · p. 13, Figure 11 · p. 14
  • For exp(−iπZ2 Z3/4), four Z-type checks reduce logical-X failures by at least about an order of magnitude, while logical-Z failures remain above the unencoded reference.The logical-Z rate is comparable in scale to the direct encoded Trotter implementation.Source: E. CliNR-based encoded Pauli rotations · p. 14, Figure 12 · p. 15
  • Acceptance probabilities differ only slightly between the two logical ensembles, so the observed channel asymmetry is not explained by substantially different postselection rates.For the Z-rotation experiment, acceptance decreases from nearly unity at p = 10−4 to approximately 0.89 at p = 10−2.Source: E. CliNR-based encoded Pauli rotations · pp. 14, 16, Figure 12 · p. 15
  • Final weight-one recovery can remove a correctable syndrome component while leaving a correlated error in a nontrivial logical coset, contributing to sector asymmetry.Without final ideal cleanup, the logical-X curve in the Z-rotation experiment does not exhibit a pseudo-threshold; cleanup is a simulation-boundary operation, not part of the noisy CliNR protocol.Source: E. CliNR-based encoded Pauli rotations · p. 15
  • For exp(−iπX1/4), four X-type checks reduce logical-Z failures by multiple orders of magnitude, while logical-X failures remain near the direct encoded result and above PL = p.The direct encoded baseline uses the same final ideal-cleanup convention.Source: E. CliNR-based encoded Pauli rotations · p. 16
  • Neither tested rotation’s CliNR configuration suppresses both logical sectors: Z-axis checks favor logical-X, while X-axis checks favor logical-Z.No tested set of four resource checks eliminated both complementary channels.Source: E. CliNR-based encoded Pauli rotations · pp. 14, 16, Figure 12 · p. 15
  • Matching resource checks to the rotation axis filters faults that anticommute with those checks, but leaves complementary axis-aligned faults comparatively weakly constrained.The tested r = 4 choices are constrained by the conjugation action of the rotation and noisy teleportation measurements can also alter the feedforward correction.Source: E. CliNR-based encoded Pauli rotations · pp. 15–16

F. Flagged postselection of encoded Pauli rotations

Flag postselection discards shots when either Trotter flag is raised, avoiding the decoding ambiguity of flag-conditioned recovery. It can strongly suppress the logical channel transverse to the rotation axis, but does not suppress both logical sectors simultaneously.

F. Flagged postselection of encoded Pauli rotations

  • A shot is accepted only when neither flag is raised; unlike flag-conditioned recovery, the procedure applies no lookup-table correction to a flagged shot.The rule avoids flag-conditioned decoding ambiguities but rejects benign and otherwise correctable events as well as damaging faults.Source: F. Flagged postselection of encoded… · pp. 16–17
  • The reported flag-postselection curves include final ideal cleanup, which remains a simulation-boundary operation rather than a hardware-realistic noisy protocol component.The flagged-shot rejection itself requires only classical discarding.Source: F. Flagged postselection of encoded… · p. 17
  • In the Z-rotation experiment, acceptance remains close to unity over most of the sampled range and is approximately 0.94 at p = 10−2, higher than the corresponding CliNR acceptance.The two logical ensembles have nearly overlapping acceptance probabilities.Source: F. Flagged postselection of encoded… · p. 18, Figure 15 · p. 19
  • Fault enumeration finds that postselection removes many first-order logical and correlated faults, but also rejects identity and correctable-error events that add overhead without directly raising conditional logical failure.Some accepted correlated errors are mapped by final weight-one recovery into a logical-Z-type representative.Source: F. Flagged postselection of encoded… · p. 18
  • For exp(−iπX1/4), logical-Z failures fall by multiple orders of magnitude relative to direct encoding, while logical-X failures remain near the direct encoded result and above PL = p.Compared with CliNR for this rotation, flag postselection yields only a modest further reduction in logical-Z failures.Source: F. Flagged postselection of encoded… · p. 18
  • For exp(−iπZ2 Z3/4), flag postselection drives logical-X failures about another order of magnitude below CliNR and below both the unencoded reference and PL = p, while logical-Z failures remain above the unencoded reference.The figure’s plotted range omits lower-noise points with zero observed logical-X failures.Source: F. Flagged postselection of encoded… · pp. 17–18, Figure 15 · p. 19
  • The X-type flag circuit uses two flag ancillas around the parity network, with Hadamards rotating the X support into and out of the Z basis.The same flag outcomes determine acceptance for the X-type experiment.Source: F. Flagged postselection of encoded… · p. 18, Figure 16 · p. 19
  • Across both rotations, flag postselection does not suppress both logical sectors simultaneously, despite strong suppression of the channel transverse to the rotation axis.Faults aligned with the high-weight rotation axis can remain unflagged, and final weight-one recovery can expose a nontrivial logical component.Source: F. Flagged postselection of encoded… · p. 19, Figure 15 · p. 19

G. Asymmetric gate-noise benchmarks and a diagnostic protected limit

Asymmetric gate-noise tests expose distinct CNOT- and phase-gate contributions to encoded Trotter failures. A diagnostic protected limit recovers pseudo-threshold behavior in both logical sectors, but only under tested idealizations.

G. Asymmetric gate-noise benchmarks and a diagnostic protected limit

  • With pCNOT = 10−5 and no noisy recovery round, logical-X failures remain near the CNOT-error scale, while logical-Z failures approach a similar floor at sufficiently small pphase.At larger pphase, the logical-Z rate is approximately 2pphase/3, consistent with phase-gate depolarizing errors propagating through the right CNOT ladder.Source: Figure 18 · p. 20, G. Asymmetric gate-noise benchmarks… · p. 20
  • Adding one noisy Chao–Reichardt recovery round raises logical failure rates relative to the no-recovery benchmark.All noisy recovery locations use pQEC = pphase, while encoded Trotter CNOTs remain fixed at pCNOT = 10−5.Source: G. Asymmetric gate-noise benchmarks… · p. 20, Figure 19 · p. 21
  • The diagnostic limit shifts flag windows away from the outermost parity-network CNOTs and uses branch-conditioned recovery, discarding double-flag events.The no-flag branch uses one noisy Chao–Reichardt round; a single-flag branch uses a noisy unflagged syndrome-extraction pass and flag-conditioned decoding.Source: G. Asymmetric gate-noise benchmarks… · p. 21, Figure 20 · p. 21
  • Both logical sectors show a diagnostic pseudo-threshold relative to PL = p when the phase gate and flag-gadget CNOTs are idealized and the remaining Trotter CNOTs use Z-biased noise.The curves cross the reference on the same p ∼ 10−3 scale as the circuit-level memory benchmark; the result is diagnostic, not a hardware-ready implementation.Source: Figure 21 · p. 21, G. Asymmetric gate-noise benchmarks… · p. 21, Figure 20 · p. 21
  • The tested both-sector threshold-like behavior depends on ideal phase and flag-gadget gates; relaxing those assumptions while retaining suppression remains an open circuit-design problem.Low-noise points have broad binomial intervals and are not used to extract a precise prefactor or scaling exponent.Source: G. Asymmetric gate-noise benchmarks… · p. 22

IV. IMPLEMENTATION IMPLICATIONS AND SMALL-CODE OVERHEAD

The implementation discussion treats inner-code protection as one possible route to lower CNOT error, not as a complete architecture proposal. Its resource estimates and comparisons are deliberately limited in scope.

IV. IMPLEMENTATION IMPLICATIONS AND SMALL-CODE OVERHEAD

  • Concatenating each of eight outer-code coordinates with a distance-three rotated surface-code patch gives a 72-data-qubit count, not a complete hardware footprint.The count excludes syndrome ancillas, outer-code correction ancillas, the Trotter parity ancilla, and flag qubits; encoding the parity target as a ninth patch would raise the inner-code data count to 81.Source: §IV · p. 22
  • The concatenated construction illustrates a possible route to the assumed pCNOT = 10−5 regime, but suppressing CNOT errors alone leaves first-order phase-gate faults and does not provide simultaneous protection for the full rotation.The actual logical-CNOT error rate depends on the extraction schedule, decoder, correction rounds, connectivity, and inter-patch CNOT implementation.Source: §IV · p. 22
  • The study does not make a direct space–time comparison with large-scale architectures; such a comparison would need to match accuracy, preparation cost, extraction depth, decoder latency, connectivity, and postselection overhead.Quantitative comparisons are restricted to the listed small-block benchmarks under common simulation conventions.Source: §IV · p. 22

V. DISCUSSION AND OPEN PROBLEMS

The discussion identifies fault propagation, dynamic recovery, and idealized preparation and cleanup as limits on the encoded Trotter circuit. It distinguishes diagnostic protection from a hardware-ready protocol and outlines requirements for more complete protection.

V. Discussion and open problems

  • A realistic terminal replacement requires noisy syndrome-extraction rounds and a spacetime decoder that accounts for the dynamic recovery branch selected by the measurement record.The dynamic procedure does not directly admit one conventional static detector error model, and whether proposed branch representations can remove ideal cleanup remains open.Source: §V · p. 23
  • The state-preparation and terminal-cleanup conventions are idealized, and the prescribed input-state procedure is not a fault-tolerant preparation protocol.Replacing ideal projection with noisy extraction and verification could accept an incorrect state or incur substantial rejection; a low-overhead preparation procedure for the logical ensembles remains undeveloped.Source: §V · pp. 22–23

d. First-order limitations of the encoded Trotter circuit

  • A parity-ancilla fault can propagate through uncomputation into an undetectable logical operator, giving the direct Trotter gadget circuit-level distance 1 in that sector.The operator has trivial stabilizer syndrome, so neither subsequent recovery nor final weight-one cleanup distinguishes it from identity.Source: §V · p. 24

e. Relation to pieceable fault tolerance

  • Pieceable fault tolerance is not a drop-in remedy because general-angle rotations transform anticommuting checks into non-Pauli operators that standard Pauli syndrome extraction cannot directly measure.At Clifford angles transformed checks remain Pauli, but a tailored construction must also protect the central rotation and final segment.Source: §V · p. 24

f. Limits of flag-conditioned recovery

  • Flag-conditioned recovery cannot resolve distinct residual logical cosets when they produce identical flag and syndrome records.In the trivial-syndrome example, choosing either the identity or Z2 recovery causes a logical error in one compatible case; probabilistic recovery cannot remove the first-order contribution.Source: §V · p. 24

g. Interpretation of the diagnostic protected limit

  • With ideal phase and flag-gadget CNOTs, both logical sectors show a diagnostic pseudo-threshold, with curves close to the circuit-level memory scale.In this restricted model, removing identified first-order Trotter faults leaves the noisy Chao–Reichardt memory circuit as the dominant failure source; the result is not hardware-ready.Source: §V · pp. 24–25

V. Discussion and open problems

  • The proposed hybrid direction pairs protected or teleported CNOTs for parity-network faults with phase-sensitive detection or verification for central-rotation faults.The authors also propose a branch-conditioned spacetime decoder combining flags, stabilizer outcomes, and terminal noisy measurements.Source: §V · p. 25

h. Axis dependence of CliNR and flag postselection

  • CliNR verification and flag postselection suppress faults according to rotation axis, but neither is established as a complete fault-tolerant replacement for direct execution.For a Z-type rotation, transverse faults can be suppressed while logical-Z components aligned with the axis survive; splitting CliNR across the two CNOT ladders performed worse than full-block CliNR.Source: §V · p. 25

VI. CONCLUSION AND OUTLOOK

The [[8, 3, 3]] code provides memory protection with a pseudo-threshold near 1.5×10^-3, but encoded Trotter circuits introduce a first-order ancilla fault that reduces circuit distance in one logical sector. The results identify joint protection of the parity network, rotation, flags, extraction schedule, and recovery as necessary to preserve fault-tolerant distance.

VI. CONCLUSION AND OUTLOOK

  • The [[8, 3, 3]] memory experiment exhibits a pseudo-threshold near 1.5×10^-3 under the stated noise and terminal-cleanup conventions.The study presents this as threshold-like suppression for the small, high-rate code used as a quantum memory.Source: §VI · p. 26
  • A single phase-containing fault on the shared parity ancilla can propagate through uncomputation into an undetectable logical-Z operator, giving that sector circuit-level distance 1 despite code distance 3.The logical sector aligned with the rotation remains more difficult even when CliNR and flag postselection suppress important subsets of propagated faults.Source: §VI · p. 26
  • At fixed pCNOT = 10^-5, low-noise behavior is limited by a CNOT-induced floor, while high-noise logical-Z failure scales approximately as 2pphase/3.A noisy Chao–Reichardt recovery round increases failure through its additional circuit locations. In the diagnostic protected limit, both sectors show pseudo-thresholds relative to PL = p and curves close to the memory benchmark; this is not a hardware-ready protocol.Source: §VI · p. 26
  • Preserving the logical Trotter pattern under encoding does not by itself preserve fault-tolerant distance; the parity geometry, rotation, flags, extraction schedule, and recovery must be designed jointly.The diagnostic limit also requires replacement of ideal phase operations, ideal flag couplings, terminal ideal cleanup, and online rejection with noisy fault-tolerant procedures.Source: §VI · p. 26
  • The [[8, 3, 3]] testbed enables explicit fault enumeration and syndrome-collision analysis, while finite-rate QLDPC studies may reveal how distance, redundant syndromes, and spacetime decoding change the balance of fault types.Proposed extensions include hybrid CNOT protection, phase-sensitive verification, static or branch-conditioned DEM decoding, and QLDPC scaling studies.Source: §VI · p. 26

Appendix A: Weight-one lookup table for the [[8, 3, 3]] code

The lookup tables map measured syndromes to Pauli recoveries for the [[8, 3, 3]] code; flagged extraction additionally supplies the identity of the triggered circuit to the decoder.

Appendix A: Weight-one lookup table for the [[8, 3, 3]] code

  • All 24 single-qubit Pauli errors have distinct nonzero syndromes, and the decoder applies the corresponding Pauli recovery.Pauli operators are self-inverse up to a physically irrelevant global phase.Source: Appendix A · p. 26

Appendix B: Flag-conditioned lookup tables

  • For flagged extraction, the triggered circuit identity supplements the complete syndrome as decoder input.The flag-conditioned lookup tables cover five flagged syndrome-extraction circuits.Source: Appendix B · p. 26, Table III · p. 27

Appendix A: Weight-one lookup table for the [[8, 3, 3]] code

  • Table III lists single-qubit Pauli syndromes with bits ordered as (g1, g2, g3, g4, g5), using the extraction generators defined in Eq. (22).The same syndrome convention is used in code-capacity, phenomenological-noise, and circuit-level simulations.Source: Appendix A · p. 26, Table III · p. 27

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