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Overcoming Kernel Redundancy for Scaling Logic Gate Networks

Sejin Park, Hongjae Lee, Changwoo Han, Seung-Won Jung

arXiv:2610.01069v1cs.CV

TL;DR

The paper investigates whether width scaling can improve logic gate networks, where scaling behavior is not yet well understood. It analyzes kernel redundancy and proposes input-dependent Boolean routing, reporting improved kernel diversity and performance under width scaling.

  • Problem

    How width scaling affects logic gate networks remains underexplored, including whether added kernels provide meaningful functional diversity.

    Source: §1 · p. 2, §2.2 · p. 3

  • Method

    The paper proposes dynamic logic kernels that route inputs to kernel groups using Boolean operations, with an early-stage variant targeting first-level groups.

    Source: §1 · p. 2, §4.1 · p. 5, §8 · p. 10

  • Results

    Naive width expansion leads to redundant kernels and performance saturation, while the proposed approach improves kernel diversity and model-capacity utilization under width scaling.

    Source: §1 · p. 2

  • Takeaways & Limitations

    The first gate level is the primary source of redundancy, motivating early-stage adaptation specific to logic gate networks.

    Source: §8 · p. 10

    Evaluation mainly focuses on image classification, leaving dense prediction tasks such as image restoration, semantic segmentation, and optical flow unexplored.

    Source: §6 · p. 10

Abstract

from arXiv · show

Differentiable logic gate networks, which operate using only logic gates, have recently attracted attention as an efficient alternative to conventional neural networks. However, despite their efficiency, the scaling behavior of logic gate networks remains underexplored. By contrast, scaling model capacity is a central design principle in deep neural networks and typically leads to improved performance. This discrepancy raises a key question: Can similar scaling benefits also be achieved in logic gate networks? In this work, we focus on width as a primary scaling axis and conduct a systematic analysis of its behavior in logic gate networks. We observe that naive width scaling often introduces redundancy among logic kernels, limiting the effective use of additional kernels and leading to performance saturation. To address this limitation, we propose a dynamic logic kernel framework that reorganizes kernel utilization by promoting specialization across kernel groups. This enables the network to better utilize increased width via input-dependent kernel routing, while ensuring that both routing and computation are implemented entirely with gate-level Boolean operations at inference time. We further find that kernel redundancy is most pronounced at the first gate level, motivating an early-stage dynamic logic kernel strategy that concentrates adaptation at this level. Experimental results demonstrate that our approach improves kernel utilization and increases kernel diversity, leading to higher accuracy with improved parameter efficiency.

1 Introduction

The paper asks whether increasing width meaningfully improves logic gate networks, where capacity scaling remains underexplored. It traces performance saturation to redundant kernels and proposes input-dependent Boolean routing, including adaptation at the first gate level.

1 Introduction

  • Efficiency-oriented deep-learning approaches include quantization and binary neural networks, while differentiable logic gate networks perform computations using logic gates.Prior work also explores logic-tree architectures and optimization methods such as continuous relaxation and reparameterization.Source: §1 · pp. 1–2
  • Width scaling can add redundant kernels and saturate performance, pointing to inefficient utilization rather than insufficient capacity.The paper frames kernel utilization as the limitation on gains from additional width.Source: §1 · p. 2
  • DLK selects kernel groups according to each input using Boolean routing, keeping routing within the logic-gate domain at inference.Specializing groups for different inputs is intended to use additional width more effectively.Source: §1 · p. 2
  • Redundancy is most pronounced at the first gate level, motivating EDLK to route first-level gate groups as logic components.The framework also examines where redundancy occurs in the kernel hierarchy.Source: §1 · p. 2
  • The paper reports that its approach improves kernel diversity and capacity utilization, leading to improved performance under width scaling.The contributions describe this as scalable efficiency and performance.Source: §1 · p. 2

2 Background

The background introduces differentiable logic gates and tree-structured logic kernels, then situates the paper among prior optimization and application work. It identifies width scaling and kernel utilization as unresolved questions.

2.1 Preliminaries

  • A differentiable logic gate uses continuous relaxations of Boolean operators during training and is discretized after training by selecting the highest-probability operator.The gate is parameterized over 16 relaxed binary logic operators.Source: §2.1 · p. 2
  • Logic gates can be composed into tree kernels that operate over local receptive fields like convolutional filters; increasing kernel count corresponds to width scaling.The tree’s internal nodes each take two inputs and produce one output.Source: §2.1 · pp. 2–3

2.2 Related Work

  • Prior work addresses optimization through relaxation and reparameterization and extends logic operations to other domains, but systematic study of width scaling and kernel utilization remains limited.Examples include LogicCBM, differentiable logic circuits, and LogicIR.Source: §2.2 · p. 3

3 Scaling Behavior in Logic Gate Networks

The section examines width scaling and kernel diversity in logic gate networks. It reports performance saturation as width increases and uses function-aware comparisons of aligned gates to analyze redundancy.

3 Scaling Behavior in Logic Gate Networks

  • Width scaling is underexplored in logic gate networks, and its benefits may differ from conventional neural networks’ expected gains from scaling capacity.The section evaluates width by varying kernel count while holding architecture and training settings fixed.Source: §3 · p. 3, §3.1 · p. 3

3.1 Effect of Width Scaling

  • The standard Logic Kernel baseline exhibits performance saturation as width increases, so simply adding kernels does not consistently improve performance.Figure 1 reports accuracy under width scaling on CIFAR-10.Source: §3.1 · pp. 3–4, Figure 1 · p. 3

3.2 Diversity of Logic Kernels

  • The function-aware gate distance counts mismatched outputs over input combinations, distinguishing, for example, XOR–OR distance 1 from XOR–AND distance 3.The metric is applied to aligned gates in trees with the same topology.Source: §3.2 · p. 4, Figure 2 · p. 4
  • Conventional kernel diversity remains low and decreases further as width grows, indicating increasingly redundant kernels.Table 1 reports diversity across widths using the function-aware TED-based metric.Source: §3.2 · pp. 4–5, Table 1 · p. 4
  • The observed redundancy motivates dynamic logic kernels intended to improve kernel utilization under width scaling.Figure 3 contrasts static utilization with dynamic and early-stage dynamic strategies.Source: §3.2 · p. 5, Figure 3 · p. 5

4 Dynamic Kernel Utilization for Scaling Logic Gate Networks

Input-dependent kernel selection is proposed to improve utilization under width scaling, where redundancy limits the benefit of additional kernels. A level-wise analysis motivates restricting adaptation to first-level gate groups.

4 Dynamic Kernel Utilization for Scaling Logic Gate Networks

  • DLK routes each input to a selected kernel group, reorganizing utilization so additional kernels can serve as adaptive candidates rather than being applied uniformly.The framework treats routing as a logical operation, avoiding real-valued gating at inference.Source: §4 · p. 5, §4.1 · pp. 5–6

4.1 Dynamic Logic Kernels

  • The router derives Boolean evidence for each group, aggregates routing bits into selection scores, and uses a softmax with temperature during training.At inference, routing scores are computed using bit-count and hard group selection.Source: §4.1 · p. 6
  • DLK maintains high kernel diversity while the conventional baseline has low diversity that decreases with matched width; classification performance also improves with diversity.The authors state this indicates more effective use of model capacity.Source: §4.1 · p. 6
  • The diversity gap between DLK and the static baseline is largest at the first gate level, identifying it as the primary redundancy bottleneck.Figure 4 decomposes pairwise TED by gate level.Source: §4.1 · p. 6, Figure 4 · p. 6

4.2 Early-stage Dynamic Logic Kernels

  • EDLK selects only first-level Boolean gate groups and shares the remaining kernel levels across groups.This localizes adaptation to the hierarchy level where the diversity gap is largest.Source: §4.1 · p. 6, §4.2 · p. 7

5 Experiments

Experiments show that EDLK benefits from added width where static logic-kernel methods saturate, and it achieves the best reported accuracy across the classification benchmarks. Further analyses examine routing, kernel diversity, parameter efficiency, hardware costs, and depth scaling.

5.1 Experimental Setup

  • Experiments span six image-classification datasets, use Top-1 accuracy, and average width-scaling results over ten seeds.Comparisons hold architecture constant and match total width; reported parameter counts include inference-time candidate groups and routers.Source: §5.1 · pp. 7–8

5.2 Results and Analysis

  • As total width increases, EDLK continues to benefit while conventional logic-kernel methods show diminishing returns and tend to saturate.The comparison fixes per-group width at K = 128 and increases the number of groups under matched total width.Source: §5.2 · p. 8
  • EDLK achieves the best Top-1 accuracy across the reported classification benchmarks at matched total width.The comparison uses (K, G) = (192, 3) for grouped methods.Source: Table 2 · p. 8, §5.2 · p. 8
  • Learned routing yields substantially larger gains than frozen random routing, and test-set routing is neither uniform nor dominated by one group.The routing analysis suggests the learned router avoids group collapse while supporting input-dependent specialization.Source: §5.2 · p. 8, Table 3 · p. 8, Figure 6 · p. 8
  • At width 256 on CIFAR-10, EDLK has substantially higher kernel diversity than static baselines and diversity comparable to DLK; across matched settings, it reduces parameters while maintaining comparable accuracy to DLK.The authors connect early-stage adaptation with preserving diversity induced by dynamic kernel utilization.Source: §5.2 · pp. 8–9, Table 4 · p. 9, Table 5 · p. 9
  • On MNIST, EDLK beats width-matched Logic Kernel in accuracy and has lower latency, energy, and area than wider Logic Kernel; it also outperforms compared efficient models on accuracy, BOPs, energy, and area.The hardware evaluation includes the full EDLK circuit, including candidate groups, shared upper gate levels, and the Boolean router.Source: §5.2 · p. 9, Table 6 · p. 9, Table 7 · p. 9
  • With width fixed at (K, G) = (128, 2), EDLK outperforms static baselines across depth settings, but increasing depth does not improve accuracy.Accuracy gradually saturates or slightly decreases for all methods; optimization and discretization challenges remain.Source: §5.2 · p. 10

6 Limitations

The study identifies limits in scale, task coverage, and predictive accuracy relative to mature architectures.

6 Limitations

  • Extending the gate-based formulation to substantially larger architectures remains challenging, and evaluation is mainly limited to image classification rather than dense prediction tasks.The paper names image restoration, semantic segmentation, and optical flow as unexplored tasks, and notes that logic gate networks still lag CNNs and Transformers in predictive accuracy.Source: §6 · p. 10

7 Future Work

The paper points to optimization, architecture, and representation as possible sources of kernel redundancy, motivating future work in all three areas.

7 Future Work

  • Redundancy may reflect unstable or imbalanced optimization, sparse local information propagation, or fixed binary encoding that restricts information available to later logic computations.Suggested directions are more stable training, improved input representations, and architectures that better exploit visual spatial structure.Source: §7 · p. 10

8 Conclusion

The study finds that naive width expansion can saturate through kernel redundancy, with redundancy concentrated at the first gate level. It proposes Boolean-routed dynamic kernels and early-stage adaptation, reporting improved accuracy and kernel utilization on standard benchmarks.

8 Conclusion

  • The conclusion frames scaling limits as an issue of how logical functions are structured and utilized, not simply insufficient capacity.The proposed framework uses Boolean routing and concentrates adaptation at the first gate level, identified as the primary source of redundancy.Source: §8 · p. 10

A.1 Network architectures

The appendix describes width-matched logic backbones across six benchmarks, with dynamic routing added only to selected high-width stages. It also specifies the training objective, optimization protocol, and dataset-use scope.

A.1 Network architectures

  • The matched width W equals K times G, where K is kernels per candidate group and G is the number of groups; later stages use fixed multiples of W.Dynamic stages partition kernels into G groups, while static baselines use the corresponding total number of kernels without input-dependent routing.Source: §A.1 · p. 14
  • Dynamic variants replace only the widest convolutional stages with routed kernel groups, while other stages remain standard; static baselines retain the same W-scaled stage structure.The subsequent Logic Layers are fixed across methods, and parameter counts include candidate groups, routers, and those layers.Source: §A.1 · p. 14

A.1.1 Tiny-ImageNet; A.1.2 Flowers-102

  • Tiny-ImageNet and Flowers-102 use five stages of widths W, 4W, 16W, 32W, and 32W, with dynamic layers at conv4–conv5.Tiny-ImageNet uses 127 thresholds per RGB channel and Flowers-102 uses 5; both use 64 × 64 inputs and depth-3 logic tree kernels.Source: §A.1.1 · p. 14, §A.1.2 · p. 15

A.1.3 CIFAR-100; A.1.4 CIFAR-10; A.1.5 SVHN

  • CIFAR-100, CIFAR-10, and SVHN use four stages of widths W, 4W, 16W, and 32W, with dynamic routing only at conv4.Their RGB threshold counts are 63, 31, and 2 per channel, respectively; CIFAR-100 also adds fixed low-level feature detectors.Source: §A.1.3 · p. 15, §A.1.4 · p. 15, §A.1.5 · p. 15

A.1.6 MNIST

  • MNIST uses a three-stage grayscale backbone with widths W, 3W, and 9W, and places dynamic kernels only in the final stage.Its input is threshold-encoded into one binary channel.Source: §A.1.6 · p. 16

A.2.1 Objective function

  • DLK and EDLK train with cross-entropy plus an auxiliary load-balancing loss averaged across dynamic layers; static baselines use cross-entropy.The balancing term is intended to discourage routing collapse, and λbal controls its strength.Source: §A.2.1 · p. 16

A.2.2 Optimization and hyperparameters

  • Unless stated otherwise, experiments use AdamW for 200,000 iterations, batch size 64, and initial learning rate 0.02.Dynamic routing bit-width is selected from 15 or 31 according to candidate-group count; experiments run on one NVIDIA RTX 4090 GPU.Source: §A.2.2 · p. 16

A.3 Existing assets

  • The six named datasets are used as public academic benchmarks, with original sources cited and available licenses or terms followed.The authors state they do not redistribute, repackage, or modify the datasets.Source: §A.3 · p. 16

B CNN precedents for dynamic kernel utilization

The appendix situates dynamic logic kernels among CNN approaches that adapt computation to inputs, then distinguishes DLK and EDLK by their logic-specific routing units. EDLK localizes adaptation to first-level gate groups while sharing upper levels.

CNN precedents

  • CNN precedents adapt different objects: filters or spatial support, candidate kernels or experts, and channels or groups.The cited examples include Dynamic Filter Networks and Deformable ConvNets; Selective Kernel Networks, CondConv, and Dynamic Convolution; and Squeeze-and-Excitation, Channel Gating, and Dynamic Group Convolution.Source: B CNN precedents for dynamic kernel… · p. 17

DLK formulation

  • DLK routes among groups of discretizable Boolean logic trees, using soft group combination during training and hard selection at inference.Its router and computation remain within the logic-gate-based inference formulation.Source: B CNN precedents for dynamic kernel… · p. 18

Selection granularity

  • Kernel-group selection is the middle ground between one shared layer-wide decision and independent gate-wise routing, preserving the kernel’s shared hierarchy.Different groups can specialize to different input patterns.Source: B CNN precedents for dynamic kernel… · p. 18

EDLK motivation

  • The level-wise TED analysis finds the largest diversity gap from the static baseline at the input-adjacent first gate level, motivating EDLK’s localized selection there.EDLK shares the remaining upper levels across groups.Source: B CNN precedents for dynamic kernel… · p. 18

EDLK formulation

  • EDLK selects among structured first-level gate groups, so input-dependent variation occurs where elementary Boolean primitives are formed while deeper gates remain shared.This preserves the compact, compositional structure of the upper circuit.Source: B CNN precedents for dynamic kernel… · p. 18

Logic gate network-specific dynamic routing

  • Unlike CNN methods that adapt real-valued filters, DLK and EDLK route over Boolean kernel groups or structured gate groups within an explicit gate hierarchy.The appendix characterizes this formulation as specific to logic gate networks.Source: B CNN precedents for dynamic kernel… · p. 18

C Tree Edit Distance

The appendix defines a function-aware tree edit distance for comparing logic kernels with identical topology. It aggregates Boolean-function discrepancies across aligned gates and uses pairwise distances to summarize kernel diversity overall and by tree level.

Distance definition

  • Function-aware TED compares aligned internal gates in two same-topology kernels by their assigned Boolean operators.Each gate is represented by its outputs over the four possible input pairs, and the node-wise cost counts differing outputs.Source: C Tree Edit Distance · p. 19

Functional cost

  • A gate-function discrepancy ranges from zero to four differing input cases; for example, XOR and OR differ on one case, while XOR and AND differ on three.This captures discrepancy degree rather than only whether two gates match.Source: C Tree Edit Distance · p. 19

Kernel diversity

  • Kernel diversity is the mean pairwise function-aware TED within a convolutional layer, averaged across the analyzed layers.The measurements use discretized gates after training.Source: C Tree Edit Distance · pp. 19–20

Level-wise analysis

  • Level-wise TED restricts the distance calculation to aligned gates at one tree level, ordered from input-adjacent gates to the output-adjacent root.For depth-3 kernels, level contributions differ because the levels contain different numbers of gates.Source: C Tree Edit Distance · pp. 19–20

Normalized analysis

  • Figure 8 reports per-gate normalized level-wise TED by dividing each level’s distance by its gate count; the first-level trend remains similar after normalization.The reported analysis averages the normalized values over kernel pairs.Source: Figure 8 · p. 20, C Tree Edit Distance · p. 20
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