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Spiking neural networks for streaming qubit readout

Barry M. Dillon, Aqib Javed, Jim Harkin, Patryk Dabkowski, Benjamin Lienhard

arXiv:2610.02129v1quant-phcs.NE

TL;DR

Conventional FPGA neural classifiers wait for the complete readout record, despite inference times around 50 ns. This work processes readout in chunks with SNNs, reaching Fgeom = 0.9085 versus 0.8960 for matched filtering and 0.9100 for ANN.

  • Problem

    Conventional FPGA neural classifiers wait for the full readout pulse, leaving pulse duration as the dominant latency bottleneck despite inference times around 50 ns.

    Source: §1 · p. 2

  • Method

    SNN discriminators process readout in successive chunks and update state assignments during acquisition, with quantisation-aware training and hls4ml synthesis for FPGA inference.

    Source: §1 · p. 3, §6 · p. 20

  • Results

    Fgeom is 0.9085 for the SNN, versus 0.8960 for matched filtering and 0.9100 for ANN; FPGA updates take 31−52 ns, below 100 ns chunks.

    Source: §6 · p. 20

  • Takeaways & Limitations

    Streaming assignments provide time-dependent readouts that a controller can use before the full measurement window has elapsed.

    Source: §6 · p. 19

    Hardware results are Vitis HLS estimates; full demodulation, feature construction, data transfer, and FPGA place-and-route remain future work.

    Source: §5 · p. 16

Abstract

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Fast and accurate qubit-state assignment is essential for feedback, calibration, and error correction in quantum processors. In superconducting platforms, frequency-multiplexed readout makes this task intrinsically multivariate as measured traces can encode crosstalk, qubit-state relaxation events, and other transient nonidealities that are not fully captured by conventional matched filtering. Here, we introduce spiking neural network (SNN) discriminators for superconducting qubit readout. By processing the measurement window in successive time chunks, the networks exploit temporal structure and update classification scores as data arrive, rather than waiting until the end of the readout window. The spiking networks outperform matched-filter discrimination and approach the accuracy of a full-trace artificial neural network. Beyond reaching the performance of artificial neural networks, the key advantage of SNNs is that they provide a streaming, time-resolved estimate of the qubit state that evolves as the readout signal is acquired. Using quantisation-aware training and hls4ml synthesis, we further demonstrate that each FPGA inference update can be completed before the next readout chunk arrives. These results establish spiking neural networks as a promising route to low-latency, real-time qubit readout on FPGA hardware, with broader implications for time-critical quantum-control and scientific-inference applications.

1 Introduction

The paper presents chunkwise spiking neural networks (SNNs) for streaming qubit-state assignment, updating predictions as readout data arrive. This targets the need for accurate, low-latency decisions in multiplexed readout and time-critical quantum workflows.

1 Introduction

  • Scaling quantum computation depends on suppressing and managing errors, and repeated high-fidelity readout supports quantum error correction and error mitigation [1].The introduction identifies readout as central to scalable quantum computation.Source: §1 · pp. 1–2
  • Fast, accurate assignment matters in feedback, calibration, and error-correction cycles, where decisions must arrive before encoded information changes.Readout accuracy and the latency between acquisition and classification are coupled objectives.Source: §1 · p. 2
  • Frequency-multiplexed readout is a multivariate, time-dependent inference task because traces can contain crosstalk, relaxation, and transient nonidealities.These measured-signal features complicate qubit-state assignment.Source: §1 · p. 2
  • Matched filtering typically waits for the full trace and can miss rare or time-localized events by reducing a record to a fixed template overlap.Its evaluation can also be computationally costly in latency-constrained settings, depending on preprocessing.Source: §1 · p. 2
  • FPGA neural-network inference can take about 50 ns, but conventional implementations still wait for the complete readout record, making pulse duration the dominant latency bottleneck.The conventional total latency includes both pulse duration and network inference.Source: §1 · p. 2
  • SNNs process readout traces in successive chunks, updating state assignments during acquisition while retaining sensitivity to transient structures.Their temporal state is used to process the stream and update predictions before the full readout window has elapsed.Source: §1 · p. 3

2 Superconducting Qubits

The section describes a five-qubit frequency-multiplexed readout dataset, its trace processing and metrics, and the matched-filter and machine-learning approaches used to frame the SNN method.

2 Superconducting Qubits

  • The benchmark uses five transmons with individual resonators on a shared feedline, labelled preparations of all 32 computational-basis states, and time-resolved IQ traces.The dataset captures simultaneous dispersive measurement and shared-path effects including inter-channel correlations and crosstalk.Source: §2 · pp. 3, 5

2.1 Qubit-State Readout Traces

  • Traces are restricted to the first 1 µs, sampled every 2 ns, then demodulated and smoothed; the averaged ground- and excited-state responses separate clearly in most channels, but less so for q2.The reported example-trace boxcar width is W = 5, while the matched-filter benchmark uses W = 25.Source: §2.1 · p. 5
  • The study uses state-assignment fidelity as its readout metric and a cross-fidelity matrix to diagnose how one qubit’s prepared state biases another’s assignment.The geometric mean of five single-qubit scores is the main multiqubit summary; off-diagonal cross-fidelity entries quantify inter-qubit bias.Source: §2.1 · pp. 5–6

2.2 Matched Filters

  • The matched-filter benchmark reaches Fgeom = 0.8960, with most of the loss coming from the second qubit.The filter uses demodulated, boxcar-smoothed I/Q traces, with templates estimated from training data and one threshold chosen per qubit.Source: §2.2 · p. 6

2.3 Readout Errors

  • Relaxation can move an excited-state trace toward the ground-state response, while multiplexed crosstalk makes joint readout distributions nonseparable across qubits.A full-window matched-filter score can place relaxation events between the main state distributions; time-resolved classifiers can identify their trajectories [17].Source: §2.3 · pp. 6–7

2.4 Machine-Learning Approaches

  • Machine-learning classifiers address nonlinear, temporal, and cross-channel structure; the proposed SNN retains these advantages while updating assignments sequentially for early classification.Prior work includes time-resolved models and multiqubit neural networks that learn channel correlations and reduce state-dependent crosstalk [21].Source: §2.4 · pp. 7–8

3 Spiking Neural Networks

Spiking neural networks use spike events and persistent internal state to process temporal data. This work uses that temporal state to update qubit-readout decisions in real time and translates trained SNNs into FPGA-oriented HLS code.

3 Spiking Neural Networks

  • SNNs replace continuous, stateless ANN activations with spike events and persistent dynamical state, supporting temporal processing of sparse, event-like data.The passage describes FPGA SNNs as digital, clock-driven systems that preserve neuron dynamics and temporal readout.Source: §3 · p. 8
  • SNN temporal state enables real-time processing and updating of qubit-readout decisions.The networks are clock-driven digital systems that preserve stateful neuron dynamics.Source: §3 · p. 8
  • A Leaky Integrate and Fire neuron accumulates input in its membrane potential, leaks potential over time, spikes above threshold, and then resets.The leakage rate is controlled by β; the spiking dynamics remain non-differentiable in the forward pass.Source: §3 · p. 8
  • Surrogate-gradient training uses a differentiable proxy for the spike derivative during backpropagation while retaining spiking dynamics in the forward pass.The paper trains its SNNs with snnTorch, which exposes spiking neurons as PyTorch modules.Source: §3 · pp. 8–9

3.1 Hardware Acceleration with hls4ml

  • hls4ml translates trained SNN models into HLS code for synthesis estimates targeting low-latency FPGA and ASIC applications.The paper obtains C-synthesis estimates with Vitis HLS.Source: §3.1 · p. 9

4 SNN-based Qubit Readout

This section presents chunked SNN readout using local and cumulative features, then compares its fidelity with matched-filter and ANN baselines. It also tests training the SNN for stronger intermediate-time assignments.

4 SNN-based Qubit Readout

  • The 2 ns trace is averaged into T=5 or 10 chunks (200 or 100 ns); SNN inputs use local L5 averages, optionally paired with cumulative C5 features.Comparisons of the 5- and 10-step features show that added timesteps resolve potentially useful structure, particularly in the L5 I traces.Source: §4 · p. 9

4.1 Network Architecture & Training

  • SNNs process one timestep at a time through a dense layer, an LIF hidden layer, and a five-bit readout; the ANN baseline flattens the full sequence.SNN hidden layers use 32, 64, or 128 neurons, and their readout produces five logits after each timestep.Source: §4.1 · pp. 10–11

4.2 Results

  • Adding C5 improves both T=5 and T=10 models, with T=10 L5+C5 giving the best SNN result; the authors attribute the gain to added model capacity, not unique C5 information.They selected SNN hyperparameters to meet real-time readout latency and resource requirements.Source: §4.2 · pp. 11–12
  • Among the compared T=10 L5+C5 models, the 64-dim SNN has the smallest largest off-diagonal magnitude (0.0130), versus 0.0159 for ANN and 0.0210 for 32-dim SNN.The ANN retains slightly larger diagonal contrast on most qubits, consistent with its marginally higher geometric-mean assignment fidelity.Source: §4.2 · p. 12, Figure 4 · p. 14

4.3 Mid-readout optimization

  • At 600 ns, auxiliary loss raises fidelity from 0.8881 to 0.8920 (T=5) and 0.8885 to 0.8939 (T=10), while final fidelity is essentially unchanged.At 1 µs, fidelity changes from 0.9070 to 0.9063 (T=5) and 0.9083 to 0.9076 (T=10); q5 and q3 plateau by 600 ns, while q4, q2, and q1 continue improving.Source: Figure 5 · p. 15, §4.3 · p. 15, Figure 6 · p. 16

5 FPGA Synthesis and Hardware Estimates

The section evaluates quantisation-aware training and FPGA synthesis for streaming SNN readout. The reported inference latencies fit between successive 100 ns readout chunks, while hardware resource use varies with model size and precision.

5 FPGA Synthesis and Hardware Estimates

  • The hardware results are Vitis high-level-synthesis estimates; full demodulation, feature construction, data transfer, and FPGA place-and-route remain for future work.The section’s latency figures therefore characterize the SNN inference kernel, not the complete readout pipeline.Source: §5 · p. 16, §5.2 · p. 18

5.1 Quantisation Aware Training

  • The 10-step L5 + C5 model loses only 5 × 10^-4 in Fgeom at 8-bit precision and saturates by 10 bits.Across the reported precision sweep, results approach saturation at 12 bits; the local-only feature set is consistently lower than L5 + C5.Source: §5.1 · pp. 16–17

5.2 Hardware Benchmarks

  • 31–52 ns per-timestep inference latency and an initiation interval of one let every tested SNN update before the next 100 ns chunk arrives.The latency is for the inference kernel only; demodulation, averaging, and data transfer are excluded.Source: §5 · p. 16, §5.2 · p. 18, Table 6 · p. 19
  • Larger hidden layers and doubled L5 + C5 inputs increase LUT and DSP requirements, while FF use stays below 1.3% across configurations.The additional cumulative features improve readout fidelity, making LUT-versus-DSP utilisation the dominant hardware trade-off.Source: §5.2 · pp. 17–18
  • The 8- and 10-bit configurations use no DSP blocks, while 16-bit models marginally exceed the 8 ns target clock estimate at 8.026 ns.At 12 and 16 bits, more arithmetic maps to DSP blocks, which can reduce LUT usage and, in several configurations, latency cycles.Source: §5.2 · pp. 18–19

6 Conclusions

The conclusions present streaming SNNs as a real-time approach to superconducting-qubit state assignment, updating predictions as readout chunks arrive. On the five-qubit dataset, the best full-precision SNN approaches the ANN benchmark, and FPGA estimates support updates within each chunk interval.

6 Conclusions

  • The SNN processes successive readout chunks in real time and maintains an internal temporal state, allowing assignment to begin before the full measurement window ends.The authors state that time-dependent readouts can be available to the controller before that window has elapsed.Source: §6 · p. 19
  • Fgeom = 0.9085 for the best full-precision SNN, compared with 0.8960 for matched filtering and 0.9100 for the ANN baseline on the five-qubit dataset.For the representative 64-dim SNN, the largest off-diagonal cross-fidelity magnitude is 0.0130, compared with 0.041 for matched filtering.Source: §6 · pp. 19–20
  • FPGA synthesis estimates give per-timestep latencies of 31–52 ns, below the 100 ns shortest chunk duration, and QAT preserves performance at synthesis precision.For the 64-dim L5 + C5 SNN, an 8-bit implementation reaches Fgeom = 0.9066; performance is effectively saturated by 10–12 bits.Source: §6 · p. 20
  • Scaling to larger multiplexed systems remains an open direction for testing how effectively the SNN exploits temporal and inter-channel correlations.The authors also identify confidence-based stopping, timestep-dependent training objectives, and improved spiking-neuron choices as possible improvements.Source: §6 · p. 20

A Readout traces

The appendix presents representative readout traces and average demodulated traces for the five qubits, including ground- and excited-state responses.

A Readout traces

  • Together, the figures provide trace examples for one qubit and average demodulated responses across the five-qubit set.Figure A.1 pairs digitally unmodulated and demodulated traces, while Figure A.2 distinguishes ground- and excited-state averages.Source: A Readout traces · p. 20, Figure A.1 · p. 21, Figure A.2 · p. 21
  • Figure A.1 shows a representative digitally unmodulated and demodulated readout trace.The accompanying text identifies the trace as belonging to the first qubit.Source: A Readout traces · p. 20, Figure A.1 · p. 21
  • Figure A.2 shows average demodulated ground- and excited-state traces for the five qubits.The figure is described as covering the average demodulated traces for all five qubits.Source: A Readout traces · p. 20, Figure A.2 · p. 21

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