A Composable AI-Accelerated Iterative Solver for 3D-IC Thermal Modeling

I. INTRODUCTION

• Minutes to hours for a complex multi-die package can make repeated full-package thermal evaluation impractical during iterative design.High-fidelity FEM and FVM solver costs also grow with mesh resolution, material heterogeneity, and system size.Source: §I · p. 1
• Monolithic models are tied to the full package topology, impede scaling across different component counts or interface regions, and leave interface continuity and flux balance implicit.Consequently, those interface quantities cannot be monitored or controlled during inference.Source: §I · p. 1
• Existing learning-based domain decomposition mainly targets canonical PDE partitions and geometry generalization, rather than modular assembly of heterogeneous, strongly coupled thermal blocks.A unified framework must handle interface coupling and combine blocks with different materials, internal structures, and modeling requirements.Source: §I · p. 2
• DAIST formulates package analysis compositionally, representing physical components as independent predictors that can be flexibly composed into larger assemblies.Its interface-iterative scheme exchanges temperature and heat-flux boundary conditions, allowing iteration budgets to trade solution accuracy against runtime while enforcing continuity and flux balance.Source: §I · p. 2

A. Thermal Problem Formulation

• The formulation considers steady-state heat conduction over a global thermal domain composed of physically connected blocks.Source: A. Thermal Problem Formulation · p. 2
• The global domain is partitioned into non-overlapping blocks that correspond to physical components such as dies, HBM stacks, and interposers.The decomposition follows package assembly structure rather than artificial computational partitions.Source: A. Thermal Problem Formulation · p. 2
• At shared interfaces, neighboring blocks must satisfy temperature continuity and heat-flux balance for global thermal consistency.Standard external boundaries may use Dirichlet, Neumann, or Robin conditions.Source: A. Thermal Problem Formulation · p. 2

B. Block Decomposition and Interface Coupling

• Each neighboring block passes its interface temperature as a Dirichlet condition, and the receiving block returns the corresponding interface heat flux for the next iteration.Source: B. Block Decomposition and Interface… · p. 2

C. Interface-Iterative Thermal Solver

• At each interface iteration, blocks solve boundary-level subproblems using the latest interface conditions, exchange updated surface temperatures and heat fluxes, and apply relaxation.The interface loop repeats until the mean temperature change across interfaces meets the user-specified tolerance.Source: C. Interface-Iterative Thermal Solver · pp. 2–3
• The two-phase procedure iterates on interface quantities until convergence, then runs one volume-level forward pass per block to produce the full three-layer temperature field.The block fields are assembled into the global solution; restricting repeated evaluation to interfaces keeps the loop inexpensive.Source: Figure 1 · p. 3, C. Interface-Iterative Thermal Solver · p. 3

D. Local Block Solvers

• Each physical block is solved independently using a local solver, instantiated in this work as an AI-based surrogate.Source: D. Local Block Solvers · p. 3
• Local solver inputs include the block's power distribution, neighboring interface boundary conditions, and block-specific geometry and material parameters.The solver returns updated interface temperature or heat flux.Source: D. Local Block Solvers · p. 3
• The implementation uses U-NO to map block inputs to interface responses, but the framework also permits other surrogate architectures.CNN-based models and physics-informed networks are cited as alternatives.Source: D. Local Block Solvers · p. 3

E. Block Representation

• A three-layer substrate, device, and interconnect representation aggregates BEOL metal and via layers into one effective layer while capturing dominant vertical thermal resistance.The simplification keeps the learned solver's input dimensionality manageable.Source: E. Block Representation · p. 3

F. Solver Interpretation

• The discretized thermal system is partitioned into block-diagonal internal operators and off-diagonal coupling that is nonzero only at shared interface nodes.Each block's equation uses its neighbors' interface contributions, allowing local solves once those contributions are known.Source: F. Solver Interpretation · p. 3
• Because the block-diagonal inverse decouples into independent local solves, blocks can be solved in parallel.With exact block solvers, the iteration recovers classical non-overlapping domain decomposition; the iterative update is relaxed block Jacobi.Source: F. Solver Interpretation · p. 3
• Learned block surrogates make the iteration inexact, with convergence preserved when per-block surrogate error remains small relative to the interface residual.Source: F. Solver Interpretation · p. 3

• The multi-chiplet assembly places SoC and HBM stacks on a shared interposer, with SoC counts sampled from 1–3 and HBM counts from 1–10.The advanced-packaging assembly places molding compound face-down over the interposer region of interest and TIM above it.Source: A. Experimental Setup · p. 3, Figure 2 · p. 4
• Each layer uses a 50 × 50 in-plane discretization; exterior lateral faces are adiabatic, while top and bottom surfaces use h = 100 W/(m2·K), except the interposer top, with ambient T∞ = 298.15 K.Internal block-to-block interfaces use iterative Dirichlet/Neumann exchange without separate contact resistances.Source: A. Experimental Setup · p. 4
• Five block-specific datasets contain 5,000 samples each, with power sources and maps sampled by block type and ground-truth fields generated using Celsius.Footprints, layer thicknesses, conductivities, and external boundary conditions are fixed; power, internal interface conditions, and topology are the primary variations.Source: A. Experimental Setup · p. 4
• Each block model trains for 1,000 epochs on four NVIDIA A100 GPUs in about 3 hours, for 15 hours across five block types, and is reused across topologies without retraining.The monolithic predictor instead requires a full training run for each new package configuration.Source: A. Experimental Setup · p. 4
• DAIST is compared with the Celsius Thermal Solver and a monolithic U-NO predictor using the same architecture and hyperparameters as DAIST's per-block models.The monolithic predictor serves as the neural baseline for full-package thermal prediction.Source: A. Experimental Setup · p. 4

B. Multi-Chiplet System: Accuracy and Runtime

• DAIST closely matches the Celsius temperature field: over 70% of pointwise errors are below 0.2 K, and the largest errors occur at steep die–interposer gradients.For the illustrated stackup of 2 SoC and 8 HBM blocks, both methods capture the same hotspot locations and magnitudes.Source: B. Multi-Chiplet System: Accuracy and… · p. 4, Figure 3 · p. 5
• 0.82 s per case end-to-end compares with 146 s for Celsius, using 5.2 boundary iterations on average and one final full-field reconstruction.The 0.82 s includes data-transfer and convergence-check overhead.Source: B. Multi-Chiplet System: Accuracy and… · p. 4
• 178× speedup over the full-package Celsius solve accompanies an MAE of 0.253 K, RMSE of 0.341 K, MAPE of 6.79 × 10−4, and average per-case maximum error of 1.135 K.The comparison uses 100 held-out multi-chiplet test cases and Celsius as ground truth.Source: B. Multi-Chiplet System: Accuracy and… · p. 4, Table II · p. 5
• Same-type blocks are batched into one GPU call, making per-package latency largely independent of block count.The batching applies to inferences of the same block type within a package.Source: B. Multi-Chiplet System: Accuracy and… · p. 5
• Mean MAE falls sharply through the first four fixed iterations and saturates by iteration six, making iteration count a practical accuracy–runtime control.The fixed-iteration evaluation uses the 100-case multi-chiplet test set and extends through seven iterations.Source: B. Multi-Chiplet System: Accuracy and… · p. 5, Table III · p. 5
• The 0.1% interface-residual tolerance is reached in approximately 5 multi-chiplet iterations, versus approximately 15 for advanced packaging, whose sequential chain needs multiple passes for thermal information to propagate.The residual measures change between consecutive iterations, not error against the ground-truth solution; both cases show stable, monotonic convergence with appropriate relaxation.Source: B. Multi-Chiplet System: Accuracy and… · pp. 5–6, Figure 4 · p. 6

C. Comparison with Monolithic Neural Predictor

• DAIST’s MAE rises from 0.282 K to 0.351 K, while the monolithic predictor’s MAE rises from 0.433 K to 26.264 K, a 60× increase, on variable-topology tests.The variable-topology comparison is shown in Table IV; the test cases vary SoC and HBM counts, and neither method was retrained on them.Source: C. Comparison with Monolithic Neural… · p. 6, Table IV · p. 7
• DAIST preserves fixed-topology accuracy at the cost of slower inference: its MAE is 0.282 K versus 0.433 K, while runtime is 0.82 s versus 0.12 s for the monolithic predictor.The monolithic predictor’s lower latency comes from not requiring iterative interface coupling.Source: C. Comparison with Monolithic Neural… · p. 6
• DAIST’s block models receive local power maps and interface conditions, enabling reuse across die counts and arrangements that change the monolithic model’s input structure.The interposer model can respond to flux from contacting blocks regardless of their count or arrangement.Source: C. Comparison with Monolithic Neural… · pp. 6–7
• On a representative unseen topology, DAIST stays within ±0.5 K across most of the field, while the monolithic prediction overestimates absolute temperature by approximately 24 K.Both predictions capture hotspot locations, but the monolithic model fails to resolve the unseen topology’s effective thermal resistance.Source: C. Comparison with Monolithic Neural… · p. 7, Figure 5 · p. 7
• When a new topology is introduced, DAIST requires training only novel block types and reuses existing block models at no additional cost.The interposer model is frozen and transferred for the advanced-packaging configuration.Source: C. Comparison with Monolithic Neural… · p. 7, Table V · p. 7

D. Cross-Topology Validation: Interposer–MC–TIM

• The frozen interposer model is reused from multi-chiplet training without fine-tuning, while MC and TIM models are trained independently on separate 5,000-case datasets.The interposer model is evaluated on a stack configuration unseen during its training.Source: D. Cross-Topology Validation:… · p. 7
• DAIST captures the advanced-packaging hotspots, but its interposer gradient is under 1 K rather than the reference’s approximately 2 K and it misses the interposer–MC temperature discontinuity.Errors reach up to ±2 K and are concentrated in the interposer layer.Source: D. Cross-Topology Validation:… · pp. 7–8, Figure 6 · p. 8
• The frozen interposer model encountered distributed chiplet loads during training but concentrated heat in 1–4 MC regions during testing, a flux-distribution shift linked to the gradient and interface discrepancies.Lightweight fine-tuning on a small number of advanced-packaging samples is proposed as a future direction.Source: D. Cross-Topology Validation:… · p. 8
• The sequential interposer→MC→TIM chain takes an average of 15.3 interface iterations to converge, compared with 5.2 for the multi-chiplet system’s parallel coupling.In the chain, each pass propagates information only one hop farther because the interposer does not directly interface with TIM.Source: D. Cross-Topology Validation:… · p. 8
• DAIST achieves 1.056 K MAE on 100 held-out MC–TIM cases, and converges in about 2 s versus a 197 s reference solve, a 99× speedup.The transferred interposer model had no exposure to MC–TIM training data; the reported result reflects a different stack configuration.Source: D. Cross-Topology Validation:… · p. 8

IV. CONCLUSION

• DAIST decomposes heterogeneous 2.5D/3D-IC packages into modular blocks, substitutes neural operators for subdomain solvers, and iteratively exchanges interface temperature and heat flux.The conclusion identifies the multi-chiplet and advanced-packaging systems as the evaluation settings.Source: §IV · p. 8
• DAIST achieves up to 178× speedup over Celsius, with mean temperature errors of 0.068% and 0.323% on the multi-chiplet and advanced-packaging systems, respectively.The advanced-packaging result uses a frozen interposer model transferred from the multi-chiplet system without retraining.Source: §IV · p. 8
• Frozen block-level model reuse across the two structurally distinct systems demonstrates cross-topology reuse without retraining.Future work includes transfer learning, more complex 3D-IC packages, and thermal-aware design optimization.Source: §IV · p. 8