Symmetry and AI-assisted discovery of magic-state factories

I. INTRODUCTION

• Noisy T states are the focus because they are easiest to encode in most practical codes, while the target set spans all diagonal third-level magic states.The outputs include T, CS, and CCZ combinations; third-level gates have trivial gate-teleportation circuits.Source: §I · p. 1
• Prior approaches include binary triorthogonal matrices for pure-T factories, extensions to CS and CCZ outputs, and exhaustive classifications at small sizes.Existing searches also use specified code families, borrowed identities, satisfiability, and integer programming.Source: §I · p. 2
• The landscape beyond n ≤54 is uncharted for distance-three-or-higher factories, although large algorithms demand these distances.The introduction identifies factories with tens to hundreds of inputs as the search regime.Source: §I · p. 2
• Distance at least three is equivalent to nonzero, pairwise-distinct input syndromes, allowing syndrome-set selection to precede compatible-output enumeration.The syndrome set is called a parent; enumerating compatible output rows for each parent determines its supported factories.Source: §I · p. 2
• Group actions reduce parent choices to syndrome orbits in the symmetry slot ansatz, while AI agents propose heuristic groups or starting parents for deterministic verification.The LLM proposes candidate structures, and a deterministic verifier checks the resulting circuits.Source: §I · p. 2
• The protocols are postselected diagonal CSS circuits with independent Z faults, pure-X checks, and rejection on any nonzero outcome; distance d gives output-error scaling O(p^d).A factory consumes n noisy inputs and measures r parity checks; distance is the smallest number of faulty inputs that pass every check and corrupt an output.Source: §I · pp. 1–2

II. RESULTS

• 699 factory classes were found, including 564 new classes spanning n = 55 to 1715.The reported comparisons are within postselected diagonal CSS protocols; classes identify outputs up to the stated basis and Clifford equivalences.Source: §II · pp. 2–3
• The distance-three catalog up to n = 127 contains 294 drawn classes: 225 are new, 65 lie within the n ≤54 band, and four were already known.The band marks the range classified exhaustively by the companion paper; the methods here independently found the classes shown inside it.Source: Figure 1 · p. 3
• At n ≤1000, the searches achieve the lowest-known pure-T overhead exponents at each tabulated distance; [[850, 128, 6]] reaches γ = 1.057.The punctured Reed–Muller comparison reports γ = 1.161 for Haah and Hastings’ [[887, 137, 5]] factory; the paper reports lower exponents at every compared distance.Source: Table III · p. 4, §II · p. 4
• At distances four and five, the catalog shows 97 classes from n = 48 to 1683, of which 78 are new.Pure-T factories at each n are represented by their highest-k member.Source: Figure 2 · p. 4
• At n ≤100, [[63, 11, 3]] has the lowest-known pure-T exponent, γ = 1.589, using 63 inputs versus 109 for a similar input-per-output ratio.The comparison is with [[109, 19, 3]]: approximately 5.74 inputs per output versus 5.73 for [[63, 11, 3]].Source: §II · p. 4

• Each matrix column specifies a parity rotation in the factory.Source: §III · p. 4
• Read as a code, the matrix is a triorthogonal code or a generalization; read as a circuit, it lists parity rotations.Source: §III · p. 4
• The search chooses the check part first and the output part second, using a syndrome-first formulation.Source: §III · p. 4

• A reduced circuit uses distinct nonzero binary columns for parity rotations, and a selection vector records which possible columns appear.The design searches for a selection satisfying the target and distance constraints; minimizing its weight minimizes the input count n.Source: A. The matrix and the design problem · pp. 4–5
• In the [[8, 3, 2]] CCZ example, the triple {1, 2, 3} has odd column count, and the check detects single faults but not pairs.Distinct columns make the accepted two-fault sets differ on outputs, yielding distance two.Source: Figure 3 · p. 5
• The selected columns must match the target gate's required moments, whose odd parities specify T, CS, and CCZ content.The target vector sets the required parities for indices of size at most three, with entries involving check wires set to zero.Source: A. The matrix and the design problem · p. 5
• A fault set is accepted when its syndromes cancel and harmful when its output labels do not, so circuit distance is the smallest such fault-set size.The circuit design imposes R_N y = D together with d(G_y) ≥ d.Source: A. The matrix and the design problem · p. 5
• For a reduced circuit, distance at least three holds exactly when all input syndromes are nonzero and pairwise distinct.This makes distance three a condition on the syndromes alone; the parent records which syndromes occur, while the labeling assigns their output effects.Source: A. The matrix and the design problem · pp. 5–6
• For distance at least four, the labeling must be additive on every triple of syndromes summing to zero, and the syndrome formulation avoids enumerating fault sets.Source: A. The matrix and the design problem · p. 6

• The check-row space gives the CSS code's X stabilizers, and the full matrix's orthogonal complement gives its Z stabilizers.Source: B. Reading it as a code · p. 6
• When the check matrix has rank r and the full matrix has rank r + k, the corresponding code encodes k logical qubits.The row-by-row target equation prescribes the moments; for T^k this is triorthogonality, generalized for other diagonal and entangled outputs.Source: B. Reading it as a code · p. 6
• The factory distance is the code's Z-distance, since input faults are Z faults and the inner code handles the other faults.A Z operator commutes with checks when its support is orthogonal to the check rows and is a stabilizer when it is also orthogonal to the full matrix.Source: B. Reading it as a code · p. 6

C. Reading it as a circuit

• Each row represents a wire, each column an input and possible fault, and a selection y implements target D when RNy = D.The direct circuit search looks for the selection y.Source: C. Reading it as a circuit · p. 6
• The SAT perspective uses selection bits, target linear equations, and clauses forbidding accepted harmful low-weight faults.The distance clauses are the costly part, and Theorem 1 removes that cost up to d = 3.Source: C. Reading it as a circuit · p. 6
• Borrowed-identity search deletes output-only target columns from an identity, leaving check-touching columns and distance at least two.The identity may leave a diagonal Clifford; requiring only RNh = 0 is more general than a strict borrowed identity.Source: C. Reading it as a circuit · p. 6
• Strict borrowed identities limit outputs to the deleted output-only columns and require single-, pair-, and triple-column parities divisible by 8, 4, and 2.These constraints express a global phase on every basis state.Source: C. Reading it as a circuit · p. 6
• Selections with equal RNy implement the same gate up to diagonal Clifford and global phase, and target solutions form the coset y0 + KN.The map h ↦ y0 + h bijects the kernel KN with all selections implementing D.Source: C. Reading it as a circuit · pp. 6–7
• The code, direct-circuit, and borrowed-identity views describe one matrix object, with different coordinates on the solution coset.The borrowed-identity view searches the kernel of RN, while direct search uses y.Source: C. Reading it as a circuit · pp. 6–7, Table IV · p. 7

IV. PARENT EVALUATION

• Output rows must avoid leaking a non-Clifford phase onto checks, coexist through pairwise compatibility, and be distinct modulo the check-row space.These conditions define the legal output directions as a quotient space.Source: §IV · p. 7
• The Schur square of the check space spans coordinatewise products of check rows, and its orthogonal complement helps define the compatible output space.The target condition ensures the check space lies within the orthogonal complement of its Schur square.Source: §IV · p. 7
• A valid output frame comprises independent elements of V(S) satisfying pairwise overlap conditions, and its overlap parities determine the output gate.The parent capacity κ controls the size of the frame space.Source: §IV · p. 7
• An incomplete enumeration at n = 63 found 418,281 distance-three factories inequivalent up to an output-basis change.Full enumeration returns compatible product, controlled-phase, and entangled gates without specifying a target in advance.Source: §IV · p. 7
• For a specified target, partial frames can be extended by solving affine overlap conditions, but ruling it out requires exhausting relevant partial frames.This provides a target-specific alternative when full enumeration is infeasible.Source: §IV · p. 7

V. SYMMETRY SLOTS

• Each parent is a union of orbits, with a common output label assigned to each selected orbit and columns formed from every syndrome in it.The solver jointly selects orbits and labels to realize the target gate.Source: §V · pp. 7–8
• Because orbits are disjoint and each receives at most one label, selected columns have distinct nonzero syndromes and distance three is built in.The slot formulation is a SAT problem; nontrivial groups compress the search but narrow its scope.Source: §V · p. 8
• At r = 7 and k = 4, the order-three group gives 752 slot variables instead of 2,032 in the unrestricted instance.The group has 47 orbits: seven fixed points and 40 orbits of size three.Source: §V · p. 8, Figure 4 · p. 8
• A symmetry-slot search found pure-T factories [[28, 2, 3]], [[44, 4, 3]], [[51, 5, 3]], and [[85, 1, 5]], plus [[47, 4, 3]] and a [[63, 4, 3]] CS⊗2 factory.The reported factories include both pure-T and controlled-phase outputs.Source: §V · p. 8
• The group reduces the parent search by a factor of 280 compared with 2,127 candidates.The slot search organizes syndromes into group orbits.Source: §V · pp. 7–8

VI. AGENT-DRIVEN SEARCH

• Proposer agents suggest groups, parents, puncture sets, or explicit circuits, while a deterministic engine runs named solvers and an independent verifier checks returned circuits.A reviewer reads outcomes and writes direction for the next round.Source: §VI · p. 8, Figure 5 · p. 9
• Puncturing deletes coordinates from a fixed code, turning them into outputs; this approach found the largest catalog factories and its lowest overhead exponents.Deleting j independent coordinates from a length-ℓ code leaves ℓ−j inputs and j additional outputs.Source: §VI · p. 8
• The verifier re-derives gates and check parities, proves the claimed distance bound, checks exact-distance witnesses, and excludes dependent or spectator outputs.The catalog is reverified as a whole after circuits enter it.Source: §VI · p. 9
• A solver timeout leaves an instance unresolved, while UNSAT rules out solutions only within the specified constraints.In one puncture campaign, narrowing the neighborhood after repeated timeouts led to a completed search and an improved factory.Source: §VI · p. 9
• Campaigns vary reviewer and proposer counts, models, and rounds, and their complete catalog is available in the public database.A campaign ends after its assigned rounds or when stopped by the authors.Source: §VI · p. 9

VII. OUTLOOK

• The search extends beyond the classified range by combining symmetry reductions with language-model agents that propose groups, parents, and puncture sets from prior outcomes.The earlier classification reached n ≤54 at distance three and above.Source: §VII · p. 9
• The searches produce pure-T factories and entangled outputs combining T, CS, and CCZ gates, and the authors describe the catalog as a starting point for varied search goals.The catalog can be expanded by varying search goals and constraints.Source: §VII · p. 10
• Architectural savings remain to be assessed using acceptance probabilities, leading error coefficients, consuming Clifford circuits, and— for entangled outputs—the compiled algorithm’s gate mix.The catalog’s explicit circuits provide a basis for these comparisons and for searches guided by complete-computation cost.Source: §VII · p. 10
• Distance-four-and-above searches can add output-label constraints; level-four outputs such as CCCZ require π/16 rotations and degree-four phase polynomials.The paper also identifies catalytic and Hadamard-assisted protocols as possible extensions, with verifiers adapted to check them directly.Source: §VII · p. 10
• The authors release the catalog, circuits, search engine, verifiers, and context directory to support community-led agent briefings and an open-source repository of verified circuits.The directory collects the mathematical framework, search techniques, prior campaign lessons, and open directions.Source: §VII · p. 10

Appendix A: Pruning and extension rules used in the search

• Parity lift appends an all-ones check row to raise odd distance by at least one while preserving the target; a reported extension maps [[99, 12, 3]] to [[100, 12, 4]].For odd n, the construction first appends a column supported only on the new check wire.Source: Appendix A · p. 13
• Free-row appending solves affine parity constraints for a prescribed output’s moments, then adds an independent row to increase the logical-qubit count while retaining distance at least three.The extension is required to avoid idle output directions.Source: Appendix A · p. 13

Appendix B: Puncture searches

• The RM(3, 10) search varies deleted coordinates from a base code and retains puncture sets only when a verifier certifies the required distance lower bound.Each independent puncture converts one input into one output.Source: Appendix B · p. 14
• Downward closure means distance-preserving punctures remain distance-preserving when reduced; it prunes puncture extensions before the compatibility-graph audit.The audit found 25 admissible size-seven sets and none larger, certifying k ≤144 within the [[887, 137, 5]] descendant family; [[880, 144, 5]] attains the bound at γ = 1.125.Source: Appendix A · p. 13, Appendix B · p. 14
• The puncture search’s ruin-and-recreate move yields [[1715, 287, 6]] at γ = 0.998, the smallest explicit pure-T factory with an exponent below one that the authors know of.The search also uses logical-pair checks and paired-column contractions to reduce inputs while preserving verified output count and distance.Source: Appendix B · p. 15

Appendix C: A worked round

• In one campaign round, 84 geometries produced six record-beating geometries and opened one previously empty cell in four more; the CCZ entry [[64, 3, 4]] improved on [[66, 3, 4]].The round also returned [[60, 2, 4]] for T⊗2 and [[48, 2, 4]] for CS; all three records were found under a cap, not proved minimal.Source: Appendix C · p. 15
• Forty-five geometries returned UNSAT in seconds, whereas the previous round’s hundred-plus distance-three runs had returned UNKNOWN at the time limit; reviewers then restricted the next round to distance four and above.A geometry specifies an output count, ordered check blocks, and a permutation group; a cell records a best-known input count for an output-count, gate, and distance combination.Source: Appendix C · p. 15

Appendix D: Full catalog

• The catalog contains 699 classes, with repeated discoveries represented once by the circuit using the fewest wires.Tables V and VI order the reported factories by input count.Source: Appendix D · p. 15
• Of the 699 classes, 414 have pure-T⊗k outputs and 285 have other outputs; Table V prints 220 pure-T representatives.For pure-T entries, the table gives [[n, k, d]] and width N, and lists only the highest k at each n and d.Source: Appendix D · p. 15, Table V · p. 17
• The output phase polynomial encodes the delivered gate up to Clifford corrections: one-wire, two-wire, and three-wire factors denote T, CS, and CCZ gates, respectively.For example, 0 1 2 denotes CCZ012, while 0+1 denotes T0T1.Source: Appendix D · p. 15
• The tables report width N and output T-count; a distance marked ≥d is a proved lower bound, and a dash marks an output wider than the k = 6 minimization range.For nine polynomials with dozens to thousands of factors, the table records the factor count and the gate is stored in the database.Source: Appendix D · p. 15
• Table VI covers other outputs and is deduplicated up to CNOT+S output equivalence.Its entries include output phase polynomials except where summarized elsewhere.Source: Appendix D · p. 15, Table VI · p. 19