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A Single-Inductor N:1 Resonant Switched-Capacitor Ladder Converter with Efficient Continuous Voltage Conversion Capability
Sandeep Reddy Kukunuru, M Mahmudul Hasan Sajeeb, Rohit Reddy Karnaty, Loai G. Salem
TL;DR
Efficient conversion from 48 V buses to lower voltages such as 9 V remains challenging. This paper proposes a single-inductor N:1 resonant SC ladder with diode-operated bottom switches for continuous output regulation below its native ratio. A 4:1 prototype achieves 97% peak efficiency at 30 Ω and greater than 90% efficiency across 40–60 V input, with measured efficiency within 0.63% of model predictions.
Problem
Efficient conversion from 48 V power-distribution buses to lower voltages such as 9 V remains a critical challenge.
Source: §I · p. 1Method
The paper proposes an N:1 resonant SC ladder that uses a single inductor and diode-operated bottom switches to keep switching in phase with inductor current.
Source: §II · p. 2, §III · p. 3Results
97% peak efficiency at a 30 Ω load and greater than 90% efficiency across 40–60 V input were measured for 9 V output, with efficiency predictions matching within 0.63%.
Source: §VI · p. 11Takeaways & Limitations
Diode-operated bottom switches support efficient wide-range voltage regulation below the native resonant ratio by avoiding circulating currents under frequency control.
Source: §II · p. 2, §VI · p. 11At very low quality factors, the series-resonant model’s conversion-ratio prediction deviates by up to 15.1%.
Source: A. Series-Resonant dc-dc Converter… · p. 5
Abstract
from arXiv · showhide
This paper presents an N:1 resonant switched-capacitor (ReSC) ladder converter of an output voltage that can be regulated continuously below the native N:1 resonant ratio while maintaining high efficiency. The topology can be generalized to any N-to-1 dc-dc conversion application while requiring only a single inductor. Efficient wide-range voltage regulation is realized by operating the bottom stack of the ReSC switches as diodes to maintain their switching always in phase with the inductor current, and hence, circumvent circulating currents that increase the inductor RMS current and ohmic losses under frequency control. A theoretical model has been developed to predict the output voltage and efficiency of the converter, with simulation results confirming its accuracy for N = 1, 2, and 4. A hardware prototype on a printed circuit board is developed to validate the performance of the proposed frequency-controlled regulation scheme. The prototype achieves a peak efficiency of 97% (94.3%) with a load of 30Ohms (resp. 6Ohms) and an efficiency >90% while generating a 9V USB-compatible voltage from a 40V-to-60V input. The measurement results match the model predictions within 0.63% accuracy.
I. INTRODUCTION
Data-center power distribution has shifted toward 48 V buses, but efficient conversion to lower voltages such as 9 V remains challenging. The paper proposes an N:1 resonant SC ladder with diode-operated bottom switches and a model for predicting conversion ratio and efficiency.
I. INTRODUCTION
- 48 V power distribution reduces conduction losses, yet efficient conversion from the 48 V bus to lower voltages such as 9 V remains a critical challenge.The paper also notes that efficiency affects energy use and thermal-cooling costs.Source: §I · p. 1
- Resonant converters handle power sinusoidally, facilitating soft switching and reducing switching losses and noise; resonant SC converters add inductors to soft-charge and discharge flying capacitors.Source: §I · p. 1
- The proposed N:1 resonant SC ladder uses diode-operated bottom switches to support efficient output regulation below the native ratio, and a theoretical model predicts conversion ratio and efficiency.The switches keep the bottom half-bridge voltage switching in phase with the resonant inductor current.Source: §I · p. 1
- Prior resonant ladder work addressed step-down conversion, but regulating below Vin/N with frequency variation incurred circulating-current conduction losses; the paper’s sections cover prior techniques, the proposal, modeling, and experiments.Source: §I · p. 1
II. PRIOR N:1 RESONANT SC CONVERTERS VOLTAGE REGULATION TECHNIQUES
Prior 2:1 ReSC converters regulate output voltage through phase-shift control or switching-frequency control near resonance. With frequency control, a fixed phase relationship can misalign bottom-half-bridge switching and inductor current, producing circulating currents and higher ohmic losses.
II. PRIOR N:1 RESONANT SC CONVERTERS VOLTAGE REGULATION TECHNIQUES
- Phase-shift control varies the phase difference between the two half-bridge clocks, whereas frequency control varies switching frequency around resonance while keeping their phase shift constant.Source: §II · p. 2
- Under either control technique, a phase difference between inductor current and bottom-half-bridge voltage makes the load’s equivalent impedance complex, causing reactive power and circulating currents that increase inductor RMS current and ohmic loss.Source: §II · p. 2
- The proposed response is to operate the bottom two switches as diodes, keeping Vsense and inductor current in phase under frequency control so the load’s equivalent impedance has no imaginary part.Source: §II · p. 2
III. PROPOSED DIODE-OPERATED SWITCHES FOR AUTOMATIC OPTIMAL PHASE-SHIFT TRACKING
The proposed N:1 ladder extends diode-operated bottom switches to enable continuous conversion below the native ratio using a single inductor. The switches track inductor-current phase, while the stacked resonant ladder preserves a two-phase sequence and constant resonant frequency across phases.
III. PROPOSED DIODE-OPERATED SWITCHES FOR AUTOMATIC OPTIMAL PHASE-SHIFT TRACKING
- A 2:1 ReSC can be viewed as a series-resonant converter stacked on a half-wave rectifier, with the stack dividing inverter voltage swing and allowing both current polarities to reach the output.Source: §III · p. 2
- Operating the bottom switches as diodes makes their switching track the inductor-current phase as frequency rises above resonance, avoiding circulating currents and keeping efficiency high as output voltage falls.With fixed clock phase, increasing frequency increases the inductor-current lag behind the top switching voltage, which otherwise raises current amplitude and ohmic loss.Source: §III · pp. 2–3
- The N:1 ladder resonates all N−1 flying capacitors with one series inductor in a two-phase sequence while maintaining constant fo across phases.Earlier ladder work covered step-up and step-down conversion, but did not use the diode-operated bottom switches for efficient continuous conversion.Source: §III · p. 3
- The proposed series-tank connection differs from prior output-side inductor arrangements, where switches between the inductor and capacitors experience high voltage swings.Source: §III · p. 3
- The ladder splits the series-resonant inverter and tank capacitance into N−1 stacked parts, connects the bottom half-bridge ground to Vout, and balances stacked inverter voltages at (Vin−Vout)/(N−1).Connecting the bottom half bridge to Vout provides full-wave rectification, and frequency control enables continuous conversion below the native 1/N ratio.Source: §III · p. 3
- As N increases, the second-half-cycle current decreases and the benefit of full-wave rectification diminishes; tank parasitics can shift resonance, which can be offset by tuning operating frequency.A second resonant cell operated 180° out of phase can provide continuous input current.Source: §III · p. 3
IV. STEADY-STATE SINUSOIDAL ANALYSIS
The analysis represents MOSFET and passive losses as series resistance in the resonant tank. It relates conduction loss to the tank current’s RMS value and the total series resistance.
IV. STEADY-STATE SINUSOIDAL ANALYSIS
- Each MOSFET is modeled as an ideal switch in series with on-resistance, with equal switch resistances and intrinsic body diodes excluded.At any instant one switch is on, allowing the two on-resistances to be represented as one tank resistance.Source: §IV · pp. 3–4
- In the 2:1 ReSC model, four MOSFET on-resistances are lumped into 2rON in series with the flying LC tank.The total series resistance is R = 2rON + r, where r includes the inductor and flying-capacitor ESR.Source: §IV · p. 4
- The 2:1 ReSC converter’s total conduction loss is proportional to I_L,RMS^2 multiplied by the total series resistance.The total series resistance is 2rON + r.Source: §IV · p. 4
A. Series-Resonant dc-dc Converter Loss Analysis
The section models series-resonant conversion using tank-current and rectifier-equivalent representations, then compares diode and controlled rectification. Its predictions agree closely with simulation at higher quality factors, while low-Q behavior departs from the sinusoidal assumption.
A. Series-Resonant dc-dc Converter Loss Analysis
- At high Q, the input half bridge is modeled as a sinusoidal source, and the diode rectifier voltage is in phase with the tank current.The diode rectifier presents a real load to the tank, eliminating the equivalent impedance’s imaginary part.Source: A. Series-Resonant dc-dc Converter… · p. 4
- The conversion-ratio model uses both tank-current representations, which yield identical expressions and help validate the derivation.The output voltage is derived from the average rectifier output current multiplied by the dc load resistance.Source: A. Series-Resonant dc-dc Converter… · p. 4
- Increasing switching frequency above resonance regulates output below Vin by reducing tank-current magnitude; above resonance, additional states appear while the rectifier current remains in phase with its input voltage.The relation between output voltage and tank-current magnitude remains unchanged in those additional states.Source: A. Series-Resonant dc-dc Converter… · p. 4, Figure 7 · p. 4
- A clock-controlled rectifier develops a phase difference from tank current above resonance, presenting a reactive impedance with an imaginary part.As phase lag increases, equivalent-impedance magnitude decreases, increasing tank current and conduction loss for the same load.Source: A. Series-Resonant dc-dc Converter… · p. 5
- 3.7% model-to-simulation deviation at Rload = 6 Ω, rON = 6 mΩ, and Q = 2.6; deviation reaches 15.1% at very low Q and falls to 0.1% at high Q.At Rload = 30 Ω and 60 Ω, lower Q values of 0.52 and 0.26 produce deviations as higher-order harmonics appear; Fig. 9 compares conversion ratios and efficiency.Source: Figure 9 · p. 5, A. Series-Resonant dc-dc Converter… · p. 5
B. Loss Analysis of a 2:1 ReSC dc-dc Converter
The 2:1 ReSC analysis models output regulation and losses for diode-operated and clock-controlled rectifiers. Diode operation keeps the rectifier node in phase with inductor current, eliminating reactive impedance and minimizing conduction loss.
B. Loss Analysis of a 2:1 ReSC dc-dc Converter
- Operating the bottom switches as diodes keeps the switching node in phase with inductor current, eliminating reactive impedance and minimizing conduction loss.The rectifier delivers charge throughout the clock cycle, providing full-wave rectification.Source: B. Loss Analysis of a 2:1 ReSC dc-dc… · p. 6
- Above resonance, phase-dependent extra states reduce charge delivered per cycle and make output voltage depend on phase lag.These states either short the tank or connect it across Vin.Source: B. Loss Analysis of a 2:1 ReSC dc-dc… · p. 6
- Unlike a conventional series-resonant converter, 2:1 ReSC efficiency is a weak function of phase lag under fixed load and resistance.Source: B. Loss Analysis of a 2:1 ReSC dc-dc… · p. 7
- The diode-rectifier and controlled-rectifier analytical conversion-ratio models are within 1% of simulation results at Rload = 6 Ω.The comparison uses the 2:1 ReSC converter.Source: B. Loss Analysis of a 2:1 ReSC dc-dc… · p. 7
C. Loss Analysis of an N:1 ReSC Ladder Converter
The analysis extends the 2:1 ReSC model to N:1 ladder converters with diode or clock-controlled bottom rectifiers, for N ≥ 2. It models conversion ratio and efficiency and compares predictions with simulation.
C. Loss Analysis of an N:1 ReSC Ladder Converter
- The N:1 analysis applies for N ≥ 2 and represents the upper half-bridges and flying capacitors with a lumped resistance and capacitance.The model uses total series resistance R = r + 2rON.Source: C. Loss Analysis of an N:1 ReSC Ladder… · pp. 7–8
- As N increases at higher Vin, charge delivered during state 4 decreases, approaching half the charge of a 2:1 ReSC converter.This comparison maintains the half-bridge voltage swing of the N:1 converter equal to that of the 2:1 converter.Source: C. Loss Analysis of an N:1 ReSC Ladder… · p. 8
- The N:1 model derives conversion ratio and efficiency for both diode and clock-controlled bottom rectifiers.It uses two tank-current expressions for the diode-rectifier case, which yield identical conversion-ratio results.Source: C. Loss Analysis of an N:1 ReSC Ladder… · p. 8
- For the N:1 converter, analytical predictions are within 1.68% of simulation results at Rload = 6 Ω.The comparison covers conversion ratio and efficiency expressions; Fig. 17 also compares conversion ratio across loads of 6 Ω, 30 Ω, and 60 Ω.Source: C. Loss Analysis of an N:1 ReSC Ladder… · p. 8, Figure 17 · p. 9
V. HARDWARE DESIGN AND IMPLEMENTATION
A 4:1 ReSC ladder prototype was built to validate the diode-operated bottom-switch topology. Its PCB design uses a single resonant inductor and components selected for voltage sharing, matching, and efficient rectification.
V. HARDWARE DESIGN AND IMPLEMENTATION
- The prototype is a 4:1 ReSC ladder converter designed for 40–60 V input and a constant 9 V output.It uses a standard, low-cost, two-layer PCB with 2 oz copper and 0.6 mm thickness.Source: §V · p. 9
- A single 1 µH inductor and three 33 nF C0G capacitors form the resonant tank, with a resonant frequency of 506 kHz.The inductor has 1.06 mΩ DCR.Source: §V · pp. 9–10
- C0G flying capacitors were chosen for component matching and near-zero voltage coefficients as their DC levels rise along the ladder.The paper notes that voltage-dependent capacitance reduction in Class II dielectrics would make capacitances decrease progressively from C1 to C3.Source: §V · p. 10
- Eight 25 V MOSFETs with 6 mΩ on-resistance are used, and a synchronous rectifier controller operates the bottom switches as diodes.Ladder voltage division lets each switch block only a fraction of the input voltage, (Vin − Vout)/(N − 1).Source: §V · p. 10
- The PCB layout supports higher conversion ratios by adding ladder steps with minimal increase in routing or structural complexity.The prototype layout prioritizes experimental validation over compact component placement.Source: §V · p. 10
VI. EXPERIMENTAL VERIFICATION
The prototype maintains high efficiency across a wide input range, and its measured efficiency closely matches the model. Diode-operated rectifier switches keep the converter phase-aligned above resonance, while the ladder implementation improves efficiency over the compared converter topologies.
VI. EXPERIMENTAL VERIFICATION
- Above resonance, rectifier switches S1,2 operate as diodes, keeping Vsense in phase with inductor current and minimizing conduction loss.The measured turn-on and turn-off delays are approximately 35 ns and 12 ns; simulation indicates negligible efficiency impact from the 35 ns delay.Source: §VI · pp. 10–11, Figure 20 · p. 11
- 97% peak efficiency at 30 Ω, with efficiency above 90% from 40 to 60 V at both 6 Ω and 30 Ω loads.For 9 V output, measured efficiency matches model predictions within 0.63%.Source: §VI · p. 11, Figure 21 · p. 12
- The proposed ladder ReSC topology achieves up to 16.3% and 9.4% higher efficiency than a controlled-rectifier ladder ReSC, and up to 9.3% and 22.4% higher than a traditional series-resonant converter, at Rload 6 Ω and 30 Ω, respectively.Fig. 21 compares measured prototype efficiency against input voltage for 6 Ω and 30 Ω loads.Source: §VI · p. 11, Figure 21 · p. 12
- The ladder connects FETs in parallel in the AC sense, reducing their on-resistance to rON/3 versus 4rON for the series-resonant inverter.The paper attributes the efficiency improvement over the conventional resonant converter to this lower inverter resistance.Source: §VI · p. 12
VII. COMPARISON TO EXISTING METHODS FOR HIGH STEP-DOWN VOLTAGE CONVERSION
The 5:1 proof-of-concept uses diode-operated bottom switches for output regulation and is compared with prior approaches for steep voltage conversion. It achieves the highest peak efficiency and power density among the compared solutions, with simulated efficiency and closed-loop tracking results also reported.
VII. COMPARISON TO EXISTING METHODS FOR HIGH STEP-DOWN VOLTAGE CONVERSION
- The 0.18 µm 5:1 proof-of-concept uses ten thin-oxide NMOS transistors and operates the bottom switches as diodes for lossless output-voltage regulation.The top eight transistors vary duty cycle; analog comparators generate the bottom-half-bridge rectifier clocks.Source: §VII · p. 12, Figure 22 · p. 12
- The 5:1 resonant converter achieves the highest peak efficiency and power density among the compared existing solutions.Table IV compares the proposed converter with prior art.Source: Table IV · p. 13, §VII · p. 13
- 96.56% simulated peak efficiency occurs at 0.25 A load; efficiency is 85.2% at the maximum 3.3 A load with a 1.5 V output.The converter is evaluated with a 9 V input across 0.8–1.5 V outputs and 50 mA–3.3 A loads.Source: §VII · pp. 12–13
- Closed-loop reference tracking error is −0.5% to 1.5%; a 1.1-to-1.2 V reference step at 1.65 A produces 70 mV overshoot and 20 mV undershoot.For 1-to-3 A load transients within 0.1 µs, undershoot and overshoot remain below 130 mV and 120 mV, respectively.Source: Figure 23 · p. 12, §VII · p. 13
VIII. CONCLUSION
The paper presents a single-inductor N:1 resonant switched-capacitor ladder converter for continuous voltage conversion. Diode-operated bottom switches enable automatic phase-shift tracking, and simulations and prototype measurements validate the model and demonstrate 48 V-to-9 V conversion.
VIII. CONCLUSION
- The proposed resonant switched-capacitor ladder converter provides continuous voltage conversion with a single inductor for N:1 conversion.Source: §VIII · p. 13
- Diode-operated bottom-half-bridge switches automatically track the optimal phase shift between inductor current and the half-bridge switching clock.Source: §VIII · p. 13
- The model predicts conversion ratio and efficiency, with accuracy validated in simulations for N = 1, 2, and 4 and in prototype measurements for 48 V-to-9 V conversion.Measured efficiency deviations from model predictions are below 0.53% at 30 Ω and 0.63% at 6 Ω.Source: §VIII · p. 13