Source-linked AI summary
RFChipAgent: Multi-Agentic AI Flow for Analog/RF Chip Design
Awani Khodkumbhe, Yunfei Feng, Raj Rangarajan, Kevin Wang, Kamal Sahota
TL;DR
Analog/RF circuit design remains labor-intensive, and a trustworthy end-to-end multi-agent flow integrating design knowledge, circuit generation, and verified simulation-driven optimization has been lacking. RFChipAgent coordinates agents across that flow and validates the approach on GF22FDSOI 60 GHz wideband LNAs. The authors report that it meets target performance in around two hours at an estimated cost of $156.20, a considerable improvement over manual design.
Problem
Analog/RF design is labor-intensive, and an end-to-end multi-agent flow integrating knowledge, topology synthesis, simulation-driven optimization, and continual learning remains unrealized.
Source: §1 · p. 1Method
RFChipAgent coordinates knowledge retrieval, topology and schematic/testbench agents, simulator-in-the-loop TPE/CMA-ES optimization, and trust-scored accumulation of verified design data.
Source: §1 · p. 1, §3.4 · p. 4Results
On a GF22FDSOI 60 GHz wideband LNA, RFChipAgent meets target performance in around 2 hours at $156.20, a considerable improvement over manual design.
Source: §5 · p. 5Takeaways & Limitations
The authors present RFChipAgent as a practical path toward AI-native analog/RFIC design automation.
Source: §5 · p. 5
Abstract
from arXiv · showhide
Analog/RF circuits remain the critical interface between digital computation and the physical world, and emerging standards from Wi-Fi 7 to 6G place stringent demands on them, yet analog/RF design remains one of the most labor-intensive steps in chip development. We present RFChipAgent, a first-of-its-kind multi-agent flow of large language model (LLM) agents for end-to-end analog/RF circuit design automation, in which AI agents collaboratively orchestrate the complete design flow under human supervision. RFChipAgent is built around four technical pillars. First, a multimodal retrieval-augmented generation (RAG) subsystem with private per-document FAISS indexing extracts design knowledge from existing engineering documentation. Second, a topology agent drives topology selection, and a schematic and testbench agent automates circuit and testbench assembly. Third, a closed-loop hybrid circuit-sizing engine combines Tree-structured Parzen Estimator (TPE) and CMA-ES optimization, evaluating every candidate in a simulator-in-the-loop framework. Fourth, a trust-scored simulation database accumulates verified performance data and builds an adaptive optimization model that informs subsequent trials. We validate RFChipAgent on a family of GF22FDSOI 60 GHz wideband mm-wave low-noise amplifier (LNA) topologies, demonstrating automated topology generation, specification-driven design-space exploration, and simulator-guided optimization. Experimental results show substantial reductions in design effort while maintaining signoff-quality verification. This work establishes a foundation for LLM-driven multi-agent electronic design automation (EDA) for analog/RF circuits.
1 Introduction
Analog/RF design remains labor-intensive because topology, sizing, biasing, and passive-network choices are tightly coupled. RFChipAgent proposes an end-to-end multi-agent flow integrating design knowledge, circuit generation, simulation-driven optimization, and verified knowledge accumulation.
1 Introduction
- The coupled choices in analog/RF design make the process lengthy and laborious, while changes such as transformer resonance or transistor finger count can substantially alter LNA performance.Source: §1 · p. 1
- RFChipAgent coordinates topology selection, schematic and testbench generation, simulator-in-the-loop optimization, and trust-scored knowledge accumulation under a superagent.Source: §1 · p. 1
- The proposed flow combines per-document FAISS retrieval, physics-aware topology selection, pre-evaluation validity gates, and a database of verified evaluations to improve later optimization iterations.Source: §1 · p. 1
2 Preliminaries
Prior work explores generative topology discovery, multi-agent synthesis, optimization, and reasoning, but the cited approaches do not span the complete design flow.
2.1 Generative Analog/RF Design
- Generative topology approaches predict device-pin connections or separate topology generation from inverse design, but do not cover knowledge ingestion, schematic generation, simulation-driven optimization, and trusted knowledge accumulation.Source: §2.1 · p. 2
2.2 Optimization and Reasoning
- RoSE combines Bayesian optimization and reinforcement learning for analog optimization under PVT variation, while reasoning-based LLM hardware work uses structured revision and compiler feedback to improve RTL correctness and reduce generation errors.Source: §2.2 · p. 2
3 Proposed RFChipAgent Flow
RFChipAgent coordinates specialized agents and a trust-scored database to automate analog/RF design, from document-grounded topology choices through circuit assembly and simulator-guided sizing. Its workflow uses staged validation and accumulated verified trials to inform later campaigns.
3 Proposed RFChipAgent Flow
- A superagent coordinates knowledge ingestion, topology selection, schematic and testbench generation, sizing optimization, and a trust-scored database that uses accumulated simulations to inform later campaigns.Source: §3 · p. 2
3.1 Knowledge Ingestion Agent
- Private per-document FAISS indexes preserve source identity through retrieval, while the LNA knowledge base supplies priors such as transformer matching for wideband 60 GHz operation and extra emphasis on gain-limiting output stages.Source: §3.1 · pp. 2–3
3.2 Topology Agent
- For the LNA, topology decisions are ordered from power-budget-based stage count to active-device selection and then matching-network choice; a 15 mW budget favors two stages before escalation is considered.Source: §3.2 · p. 3
3.3 Schematic and Testbench Generation Agent
- Cell validation, topology-consistent schematic generation, and template-based testbench assembly are separate auditable stages, with failed checks or missing artifacts handled before optimization.Source: §3.3 · p. 3
3.4 Sizing Optimizer
- The sizing optimizer maps specifications to normalized quality scores, combines them with a harmonic mean, explores mixed variables with TPE, refines continuous parameters with CMA-ES, and rejects physically invalid trials before scoring.Source: §3.4 · p. 4
3.5 Trust-Score Gated Database
- The database fits good- and bad-trial densities to prefer regions with better historical outcomes, admits trials only above a trust threshold, and supports diagnostics between campaigns.Source: §3.5 · pp. 4–5
4 Experiments and Evaluations
RFChipAgent was evaluated on a GF22FDSOI two-stage LNA targeting 60 GHz wideband operation, with Trial #174 meeting every specification. The campaign took approximately two hours and cost $156.20, which the paper describes as a substantial improvement over manual design.
4.1 Experimental Setup
- The evaluation used a GF22FDSOI two-stage LNA targeting 60 GHz wideband operation and the campaign’s trials were simulator-evaluated and passed physical-validity and trust-threshold checks.The target specifications were S21 min ≥25 dB, NF max ≤4.5 dB, S11 max ≤−10 dB, in-band ripple ≤3.5 dB, and PDC ≤15 mW.Source: §4.1 · p. 5
4.2 Performance Results
- Trial #174 meets every specification, and Figure 4 shows the top five candidates’ S21, S11, and NF traces across the full 60 GHz band.Table 1 compares the five highest-ranked trials retained by the trust-gated database with the specifications.Source: §4.2 · p. 5, Figure 4 · p. 5
4.3 Efficiency and Computational Cost
- The campaign completed in approximately 2 hours at an estimated cost of $156.20, a substantial improvement over manual labor-intensive circuit design.The reported cost and duration cover the flow end to end.Source: §4.3 · p. 5
5 Conclusion
RFChipAgent automates analog/RF circuit design from topology selection through optimization and records verified trials in a database. On a GF22FDSOI 60 GHz wideband LNA, it met the provided target performance in around two hours at a computation cost of $156.20.
5 Conclusion
- RFChipAgent automates topology selection, schematic generation, testbench assembly, circuit optimization, trial verification, and result recording.A private FAISS-based RAG subsystem supports knowledge ingestion.Source: §5 · p. 5
- On a GF22FDSOI 60 GHz wideband LNA, the flow met its target performance in around 2 hours at a computation cost of $156.20.The conclusion characterizes this as a considerable improvement over manual design.Source: §5 · p. 5
- The paper presents RFChipAgent as a practical path toward AI-native analog/RFIC design automation.Source: §5 · p. 5