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Stability Enhancement of Cascaded DC Systems via Source Output-Impedance Reshaping Using Model-Free Control

Wanrong Li, Shuhan Hu, Hengping Xiong, Runnan Wang, Huawei Yuan, Jianguo Zhu, Sinan Li

arXiv:2610.32076v1eess.SYcs.SY

TL;DR

Cascaded DC systems can become unstable through source–load impedance interactions even when their converters are individually stable. This paper adds source-side model-free feedback to reshape impedance while preserving nominal source dynamics. Impedance analysis predicts a 47.7% increase in maximum stable load power, and switched-model simulations confirm the stability improvement.

  • Problem

    Source–load impedance interaction can destabilize cascaded DC systems despite the local stability of their constituent converters.

    Source: §I · p. 1

  • Method

    The source-side MFC reuses bus-voltage feedback and nominal source-loop information to reshape output impedance while preserving nominal reference-to-output dynamics, without load models or load-side measurements.

    Source: §I · p. 1, CONCLUSIONS · p. 5

  • Results

    47.7% improvement in predicted maximum stable load power, from 172.63 W to 254.92 W; switched-model results agree with averaged predictions within 3.6%.

    Source: B. Output-Impedance Reshaping · p. 4, C. Switched-Model Verification of… · p. 4

  • Takeaways & Limitations

    The MFC-controlled system settles at 176 W while the baseline exhibits sustained oscillations under the same load step.

    Source: D. Large-Signal Regulated-Load… · p. 4

Abstract

from arXiv · show

Cascaded DC systems may become unstable through source-load impedance interactions even when their constituent converters are locally stable. This paper proposes a source-side model-free control (MFC) method that reuses bus-voltage feedback to reshape the source output impedance while preserving nominal reference-to-output dynamics. The controller uses only nominal source-loop information and requires neither a load-converter model nor load-side measurements. A current-controlled buck source supplying a regulated buck-resistor load that exhibits constant-power load (CPL) behaviour at low frequencies is used as the case study. Impedance analysis predicts that the proposed MFC increases the maximum stable load power by approximately 50%, thereby improving the stability margin of the cascaded system. Switched-model simulations confirm preservation of the nominal reference-to-output response and show that the MFC-controlled system remains stable at load levels for which the baseline system becomes unstable.

I. INTRODUCTION

Cascaded converters can destabilize the dc bus through source–load impedance interaction even when each converter is stable alone. The proposed source-side MFC reshapes impedance while preserving nominal reference-to-output dynamics.

I. INTRODUCTION

  • Low-frequency negative incremental input impedance at a regulated load can destabilize the dc bus; |Zs(jω)|<|ZL(jω)| is a conservative sufficient stability condition for stable isolated converters.The impedance minor-loop gain is Lm=Zs/ZL.Source: §I · p. 1
  • Prior source-side damping methods may require load-side information or fail to guarantee preservation of the baseline source reference-to-output dynamics.Preserving those dynamics permits source-impedance reshaping without changing the pre-tuned voltage-command response.Source: §I · p. 1
  • The proposed MFC adds local bus-voltage feedback using nominal source-loop information, without a load-converter model or load-side measurements.It is evaluated in a cascaded Buck system with a regulated Buck load exhibiting CPL behavior at low frequencies.Source: §I · p. 1

II. SOURCE-SIDE IMPEDANCE RESHAPING

  • Where |1+T(jω)|>1, the MFC reduces source output impedance and the source–load minor-loop magnitude; at frequencies well above loop bandwidth, impedance converges to baseline.The added path reuses the bus voltage already measured by the baseline controller and needs no online load-power estimation or added voltage sensing.Source: §II · pp. 2–3

III. CASCADED BUCK SYSTEM AND IMPEDANCE MODELING

The case study compares baseline and MFC control in a cascaded Buck system with a regulated Buck load feeding a resistive load.

III. CASCADED BUCK SYSTEM AND IMPEDANCE MODELING

  • The 48-to-24-V Buck source supplies a regulated Buck converter feeding a resistive load, with the source stage and baseline controllers held identical across baseline and MFC cases.The downstream regulated Buck converter feeding the resistor realizes the CPL behavior.Source: §III · p. 3

A. Closed-Loop Output Impedance of the Source Converter

The source converter’s nominal response is built from an inner current loop and an outer voltage loop, with the bus RC shunt setting the open-loop output impedance.

A. Closed-Loop Output Impedance of the Source Converter

  • Under continuous-conduction-mode operation, the source-side Buck converter is described by averaged large-signal dynamics.The supplied passage introduces equation (7) but does not state its full form in readable text.Source: A. Closed-Loop Output Impedance of the… · p. 3
  • With bus-voltage feedforward, a proportional inner current controller yields Gi(s)=1/(1+sτi) from iref to iL, where τi=L/(VinKpc).The outer-loop plant is Gi(s)Zo(s), with Zo(s)=R/(1+sRC) set by the bus RC shunt; the PI zero cancels the RC pole.Source: A. Closed-Loop Output Impedance of the… · p. 3
  • The nominal outer-loop crossover frequency is ωc=KivR=Kpv/C, and the MFC adds only the Co(s) block to the baseline controller.Source: A. Closed-Loop Output Impedance of the… · p. 3

B. Closed-Loop Input Impedance of the Load Converter

This section derives the regulated Buck load’s closed-loop input impedance from its bus-side current relation and characterizes its low-frequency behavior.

A. Reference-Response Preservation

The baseline and MFC controllers preserve the nominal source command response: their analytical traces coincide, and their switched responses closely follow the analytical transfer-function responses.

B. Output-Impedance Reshaping

MFC reshapes source output impedance over the frequency range where the source-loop gain supports reduction, raising the predicted stable-load-power limit.

C. Switched-Model Verification of Stability Improvement

Switched-model tests show MFC remains stable beyond the baseline stability boundary, with the boundary checks supporting an approximately 50% increase in maximum stable load power.

D. Large-Signal Regulated-Load Power-Step Responses

A 100-to-176 W load-power step exceeds the baseline stability limit but remains below the MFC limit: the baseline oscillates, while MFC restores the bus voltage to 24 V.

D. Large-Signal Regulated-Load Power-Step Responses

CONCLUSIONS

The conclusion presents MFC as source-side impedance shaping that preserves nominal reference-to-output dynamics; frequency-domain analysis and switched-model simulations verify the reshaping and associated stability enhancement.

CONCLUSIONS

  • MFC preserves the nominal reference-to-output transfer function while applying 1/[1+T(s)] to the source output impedance and source-load minor loop.Source: CONCLUSIONS · p. 5
  • The paper presents the MFC outer loop as a source-side output-impedance-shaping mechanism for cascaded dc systems.Source: CONCLUSIONS · p. 5
  • Frequency-domain analysis and switched-model simulations of the Buck-CPL case verify the predicted impedance reshaping and associated stability enhancement.Source: CONCLUSIONS · p. 5
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