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High-performance syndrome extraction circuits for quantum codes

Armands Strikis, Dan E. Browne, Michael E. Beverland

arXiv:2603.05481v2quant-ph

TL;DR

Low-depth syndrome extraction for arbitrary CSS codes must manage overlapping checks and hook errors without invalid CNOT interleaving. The paper generalizes left–right circuits and ranks schedules using residual-error distances, reporting improved logical performance and a gross-code distance-11 circuit conjecture.

  • Problem

    Designing low-depth SECs for arbitrary CSS codes requires parallelizing overlapping checks without invalid CNOT interleaving, while avoiding hook errors that can reduce circuit distance.

    Source: §I · p. 1

  • Method

    The framework generalizes left–right circuits to arbitrary CSS codes and ranks CNOT schedules using residual-error sets and distance measures to identify schedules with less harmful hook errors.

    Source: §I · p. 2

  • Results

    Across distinct LDPC code classes, optimized left–right circuits consistently improve logical performance, with logical error-rate improvements of up to an order of magnitude.

    Source: §I · p. 2, §VII · p. 13

  • Takeaways & Limitations

    For the gross code, no non-interleaved circuit reaches distance 12, while an explicit non-uniform left–right circuit is conjectured to achieve distance 11.

    Source: §I · p. 2

    Residual-distance profiles do not account for interactions between residual errors arising from different checks, and one optimal unstructured FB126 circuit was an outlier.

    Source: §2 · p. 19

Abstract

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We present a fast and effective framework for analysing and designing syndrome extraction circuits (SECs). Our approach is based on left--right circuits, a general SEC design that maintains low depth and avoids gate interleaving constraints by staggering $X$ and $Z$ stabiliser checks. Initially proposed for specific classes of codes, we generalise this construction to arbitrary CSS codes and optimise the circuit structure to achieve low qubit idling time, large effective distance, and reduced minimum-weight failure mechanisms. A key component of our framework is the formal notion of residual errors and their associated distance metrics, which form lightweight proxies for capturing error propagation and quantifying the potential harm of circuit-level errors. Applying our automated framework to diverse classes of codes, we observe consistent improvements in logical performance of up to an order of magnitude compared to existing single-ancilla SEC designs. Moreover, by directly applying these proxies, we prove that no non-interleaving SEC can achieve circuit distance $12$ for the gross code, and we identify an explicit circuit that we conjecture achieves distance $11$, exceeding previously known constructions.

I. MOTIVATION AND SUMMARY OF RESULTS

The paper generalizes left–right circuits to arbitrary CSS codes and uses residual-error distances to guide circuit construction. It reports improved logical performance and proves bounds on circuit distance for the gross code.

I. MOTIVATION AND SUMMARY OF RESULTS

  • Low-depth SEC design must parallelize overlapping checks without invalid interleaving of non-commuting CNOTs, while avoiding hook errors that can reduce circuit distance.Left–right circuits partition data qubits and stagger X- and Z-type checks, generalizing a construction previously proposed for specific codes.Source: §I · pp. 1–2
  • Residual-error sets record data-qubit supports reached by hook errors; residual distance gauges additional errors to a logical operator, while extended-code distance treats sets jointly and helps bound circuit distance.These distances are cheaper to compute or upper-bound than circuit distance and support rapid circuit screening.Source: §I · p. 2
  • For the gross code, no non-interleaved circuit reaches circuit distance 12, no uniformly tiled one reaches 11, and an explicit non-uniform left–right circuit is conjectured to achieve 11.The conjectured circuit matches the standard circuit’s depth when amortized over many rounds.Source: §I · p. 2
  • Across diverse quantum LDPC codes, optimized left–right circuits reduce circuit depth and logical failure rates, with logical error-rate improvements of up to an order of magnitude.Figure 2 compares circuits for quantum Tanner, hypergraph product, Haah’s cubic, and fiber bundle codes.Source: §I · p. 2, Figure 2 · p. 3

A. Syndrome extraction circuits

  • Tanner graphs represent code checks and data qubits; an SEC measures each check with a dedicated ancilla, while non-interleaved schedules order overlapping X- and Z-type CNOTs in blocks.For multiple rounds, a new round may begin before the previous one ends.Source: A. Syndrome extraction circuits · p. 3

B. Depth bounds

The section defines circuit depth and describes how circuit-level logical error rates are estimated. It also introduces left–right circuits as a general construction for arbitrary CSS codes.

B. Depth bounds

  • Circuit depth is defined through the time required for multiple syndrome-extraction rounds, allowing disjoint operations from different rounds to overlap.The stated depth bound accounts for the maximum CNOT participation of data and ancilla qubits.Source: B. Depth bounds · p. 3

C. Noise model and logical error rate estimation

  • Logical error rates are estimated from noisy memory experiments using detector error models and a decoder, with per-round rate reported for d rounds.The procedure samples error configurations, decodes their syndromes, and tests whether the correction matches the error’s syndrome and logical action.Source: C. Noise model and logical error rate… · p. 4
  • Circuit distance is the minimum number of error mechanisms causing an undetected logical failure, while low depth reduces idling and shortens the logical clock cycle.In the small-p limit with optimal decoding, circuit distance determines the leading-order scaling of logical failure probability.Source: C. Noise model and logical error rate… · p. 4

III. LEFT–RIGHT CIRCUITS

  • Left–right circuits generalise a low-depth, non-interleaving syndrome-extraction design from specific code classes to arbitrary CSS codes.The design staggers X- and Z-check operations.Source: §III · p. 4, Figure 3 · p. 4

A. Circuit structure

Left–right circuits partition data qubits and schedule coloured CNOTs in two staggered stages. For hypergraph product codes, minimal-colouring circuits have depth close to the lower bound, and are optimal when the stated degree condition holds.

A. Circuit structure

  • A left–right circuit partitions data qubits into left and right sets and edge-colours four Tanner subgraphs to schedule CNOTs.The LX and RZ operations run in parallel first, followed by LZ and RX.Source: A. Circuit structure · pp. 4–5
  • Staggered ancilla preparation and measurement ensure all Z-check CNOTs precede same-round X-check CNOTs, making the circuit non-interleaved.The design also accommodates ancilla preparation and measurement operations longer than one time step.Source: A. Circuit structure · p. 5

B. Low depth LRCs

  • For any HGP code defined by A and B, a minimal-colouring left–right circuit has depth δ(A) + δ(B) + 2, within 2 of the lower bound.When r(HXZ) ≥ c(HXZ), the minimal-colouring circuit saturates the depth bound and is optimal.Source: B. Low depth LRCs · p. 5
  • The depth of an HGP minimal-colouring circuit is close to the lower bound δ(A) + δ(B).The construction uses the natural tensor-product partition and minimal edge-colourings for its four subgraphs.Source: B. Low depth LRCs · p. 5
  • Different edge-colourings can give circuits with identical depth but different hook-error propagation, circuit distance, and minimum-weight failure multiplicity.Thus, depth alone does not determine the other cited performance properties.Source: B. Low depth LRCs · p. 6

IV. RESIDUAL ERRORS AND CIRCUIT DISTANCE BOUNDS

The section develops residual-error distance metrics to analyse hook-error effects and rapidly bound circuit distance. Residual distance evaluates individual errors, while extended-code distance evaluates sets of them through an augmented code.

IV. RESIDUAL ERRORS AND CIRCUIT DISTANCE BOUNDS

  • The section applies its analytical methods to bound circuit distance and to construct a gross-code circuit whose distance the authors believe optimal.The supplied passage does not state the resulting bound or distance value.Source: §IV · p. 6

A. Residual errors

  • A residual error records the data-qubit support reachable from a weight-1 hook error on a check ancilla; such errors may overlap logical operators and reduce effective distance.The analysis focuses on Z-checks, with the X-check case obtained by exchanging X and Z.Source: A. Residual errors · p. 6
  • Residual distance Δ(E) is the fewest additional data-qubit errors needed to complete a residual error E into a non-trivial logical operator.It quantifies potential harm: values below code distance indicate a potentially distance-reducing hook error, while values above it can indicate less harm than a weight-1 error.Source: A. Residual errors · p. 6
  • Extended-code distance treats selected residual errors as additional single-qubit errors by appending columns to the check and logical-operator matrices.The construction can include residual sets for individual checks or the full X- and Z-type sets.Source: A. Residual errors · pp. 6–7
  • Residual distance modifies constraints in the code-distance search, whereas extended-code distance adds variables; both can be estimated faster than full circuit distance.Computing an individual residual distance is computationally equivalent in size to estimating the original code distance.Source: A. Residual errors · p. 7

B. Circuit distance bounds

The section establishes residual-error and extended-code bounds for evaluating syndrome-extraction circuit distance. It shows how these bounds support circuit screening and explains why non-interleaving makes the extended-code bound tight.

B. Circuit distance bounds

  • A circuit and its non-interleaved counterpart, preserving within-check CNOT order, share the same residual-error set.Source: B. Circuit distance bounds · p. 7
  • Each residual error E upper-bounds non-interleaved circuit distance by its residual distance Δ(E).The proof constructs a detector-free logical error within one check-type partition.Source: B. Circuit distance bounds · p. 7
  • The proof assumes a perfect final syndrome-extraction round, so logical errors are characterized by their final data-qubit support.Source: B. Circuit distance bounds · p. 8
  • Extended-code columns represent either single data-qubit errors or residual errors, allowing bounds to be computed for residual subsets.The model captures circuit error mechanisms through their final support on data qubits.Source: B. Circuit distance bounds · pp. 7–8
  • The bounds are inequalities because propagated errors may be detected before combining into an undetectable logical operator; non-interleaving can avoid that detection.Source: B. Circuit distance bounds · p. 8
  • For non-interleaved circuits, the extended-code distance using the full residual set equals the bounded circuit distance, enabling efficient distance analysis.The bounds for residual subsets provide upper bounds; the full set makes the extended-code bound tight.Source: B. Circuit distance bounds · pp. 7, 9

C. Application to the gross code

For the gross code, the analysis rules out circuit distance 12 for non-interleaved SECs and distance 11 for uniformly tiled ones. It identifies a depth-8 circuit conjectured to attain distance 11, while the proof does not cover interleaved circuits.

C. Application to the gross code

  • No non-interleaved gross-code SEC reaches circuit distance 12, and no uniformly tiled one reaches distance 11; an explicit depth-8 circuit is conjectured to achieve distance 11.The depth is shown to be minimal and matches the original circuit in Ref. [7].Source: C. Application to the gross code · p. 9
  • The search enumerates 90 residual-error sets from a single weight-six check, then uses extended-code bounds to eliminate candidates.Each check contributes three residual errors of weight greater than one, determined by its CNOT ordering.Source: C. Application to the gross code · p. 9
  • In 45 of the 90 cases, the extended-code search finds a logical operator of weight at most 10, implying circuit distance at most 10.Source: C. Application to the gross code · pp. 9–10
  • The distance-12 exclusion applies to non-interleaved circuits, including left–right circuits, but does not address interleaved circuits.Whether an interleaved circuit can attain distance 12 remains open.Source: C. Application to the gross code · p. 10

V. CIRCUIT DESIGN FRAMEWORK

This section outlines the framework workflow for constructing high-performance left–right circuits, then develops how candidate circuits are ranked.

V. CIRCUIT DESIGN FRAMEWORK

  • The framework first outlines each construction stage, then details the methodology for ranking candidate left–right circuits.Source: §V · p. 10

A. Framework workflow

The framework takes CSS-code parity-check matrices and produces an optimized left–right circuit or ranked candidates. It first chooses a partition, generates candidate schedules, then ranks them using residual-distance and ancilla-idling metrics.

A. Framework workflow

  • The workflow outputs an optimized left–right circuit or ranked circuit list from CSS-code parity-check matrices, with an optional supplied partition.If no partition is supplied, it searches for one before generating and ranking candidates.Source: A. Framework workflow · p. 10
  • For each partition, the framework precomputes relevant residual-distance estimates and generates candidate schedules by permuting edge-colouring labels without changing circuit depth.The permutation space may grow factorially with the number of colours, so large instances may require limiting the search.Source: A. Framework workflow · p. 10
  • Candidate circuits are first ranked with fast metrics, with optional re-ranking of promising candidates using the more expensive extended-code distance.Residual distances for a circuit are obtained by lookup from precomputed estimates.Source: A. Framework workflow · p. 10, B. Ranking candidate circuits · pp. 10–11

B. Ranking candidate circuits

  • Ancilla idling varies with CNOT ordering and can be reduced by delaying preparation or advancing measurement, whereas data-qubit idling is fixed for candidates of equal depth.Idles between CNOT gates generally cannot be removed without modifying the circuit.Source: B. Ranking candidate circuits · p. 11, Figure 7 · p. 11
  • The ranking prioritizes larger minimum residual distance, then lower ancilla idle count, then a lexicographically smaller residual-distance profile.A fixed ordering breaks any remaining ties.Source: B. Ranking candidate circuits · p. 11
  • The minimum residual distance upper-bounds circuit distance, while fewer ancilla idles reduce noise exposure and the residual-distance profile tracks multiplicities of potentially harmful hook errors.The profile can be truncated because the lowest residual distances are most influential; extended-code distance captures interactions missed by these metrics but is slower to evaluate.Source: B. Ranking candidate circuits · p. 11

VI. EXAMPLE APPLICATIONS

Across several LDPC code classes, the framework produces circuits with consistent logical-performance improvements over existing constructors. Comparisons show trade-offs among depth, idling, circuit distance, and performance, while the discussion also reports bounds on circuit distance.

VI. EXAMPLE APPLICATIONS

  • The examples span HGP625, Tanner200, Haah128, and FB126; Tanner200's searched partition gives depth 18, versus an optimal depth of 12 and a naive depth of 21.The other three codes use their natural two-block partitions, yielding near-optimal depth.Source: §VI · p. 12

A. Comparison to other SEC constructors

  • LRCs have lower depth than alternative circuits in all tested examples, usually with substantially lower overall qubit-idling error rates, but Tanner200 shows only marginal idling improvement.For Tanner200, LRC depth is comparable to the LDPC circuit, whose alternating-XZ structure overlaps initialization and measurement with the other check type's CNOTs.Source: A. Comparison to other SEC constructors · p. 12
  • Non-exhaustive tests find lower circuit distance for LDPC circuits than LRCs on Haah128 and FB126, but equal distance for Tanner200's LDPC and FB126's QUITS circuits.All HGP625 circuits have circuit distance equal to the code distance, d = 8.Source: A. Comparison to other SEC constructors · p. 12
  • The QUITS circuit for FB126 has a worse X-check residual-distance profile than the other constructions; the authors believe this explains its high Z-logical observable error rate.Source: A. Comparison to other SEC constructors · p. 12
  • In representative same-code comparisons, PropHunt circuits have more than threefold LRC depth and AlphaSyndrome circuits more than twice the corresponding LRC depth, with substantial logical-performance drops.The compared PropHunt circuit had larger circuit distance; the authors describe these methods as more accurate but much more computationally costly.Source: A. Comparison to other SEC constructors · pp. 12–13

VII. DISCUSSION

  • The framework yields consistent logical-performance improvements over existing SEC construction approaches across several distinct LDPC code classes.Its circuits target low depth, large circuit distance, reduced qubit idling, and lower minimum-weight failure multiplicity.Source: §VII · p. 13
  • The paper establishes circuit-distance bounds for different settings and computational trade-offs, including that interleaving cannot decrease circuit distance.Source: §VII · p. 13

Appendix A: LRC depth for lifted-product codes

The appendix extends left–right depth arguments to lifted-product codes using their protograph structure and weight enumeration. It then describes the fibre-bundle construction and the FB126 instance used in the paper.

Appendix A: LRC depth for lifted-product codes

  • For lifted-product codes, the left–right partition follows the block structure of the protographs, and the depth argument uses their associated row and column weights.The appendix states that the depth result is optimal up to constants.Source: Appendix A · p. 15
  • The lifted-product depth argument relies on each binary representation having constant row and column weight; without constant row weights, the proof would not generally hold.Source: Appendix A · p. 15
  • Bivariate bicycle codes are special cases of lifted-product codes, so the same left–right depth arguments apply to them.Source: Appendix A · p. 15

Appendix B: Construction of fibre bundle codes

  • Fibre-bundle codes are related to hypergraph-product codes and add a twisting mechanism that can increase code distance; the construction uses a base, fibre, and connection.Commuting checks are ensured when each permutation in the connection commutes with the fibre code.Source: Appendix B · p. 15
  • The paper's FB126 instance has parameters [[126, 8, 9]], using a redundant Hamming-code parity-check matrix as its base and a length-9 repetition code as its fibre.Its twists are powers of a cyclic permutation.Source: Appendix B · pp. 15–16

Appendix C: Mapping FB codes to QC-LP codes

The appendix maps the fibre-bundle instance to a quasi-cyclic lifted-product code for use with QUITS. It also describes randomized procedures that produce upper bounds on residual or extended-code distances.

Appendix C: Mapping FB codes to QC-LP codes

  • The circular twists in the fibre-bundle construction allow it to be mapped to an equivalent quasi-cyclic lifted-product code for applying QUITS.The mapping represents each base entry with its twist as a ring element and uses a 1 × 1 protograph for D.Source: Appendix C · p. 16

Appendix D: Numerical distance estimation and upper bounds

  • Randomized procedures upper-bound residual or extended-code distance by finding bitstrings satisfying the stated parity and nonzero constraints, then using their weight as an upper bound.The two settings correspond to residual distance for a residual error or extended-code distance for a residual-error set.Source: Appendix D · p. 16

1. Simple distance estimator

  • The simple estimator repeatedly extends the parity-check matrix randomly and solves a decoding instance with BPOSD to estimate residual distances for the example codes.The procedure follows [7].Source: §1 · p. 16
  • The estimator returns the smallest found bitstring weight as an upper bound; with a provable minimum-weight decoder it can be modified to find the distance exactly, potentially at prohibitive cost.The reported rapid-estimation settings use 200 maximum BP iterations and 100 trials per code.Source: §1 · p. 16

2. Adaptive-prior distance estimator

For difficult gross-code instances, an adaptive-prior estimator searches for low-weight candidates using random extensions of H. Circuit simulations estimate logical error rates separately for X- and Z-type observables and approximate the total by their sum.

2. Adaptive-prior distance estimator

  • For difficult gross-code instances, the estimator perturbs decoder priors while sampling random extensions of H and decoding the syndrome for each appended row.The procedure returns the best observed weight as an upper bound on l_min.Source: §2 · pp. 16–17

Appendix E: Circuit simulation details

  • Logical error rates are estimated separately for X- and Z-type observables, then approximated by their sum using Stim circuits and BPOSD decoding.Data qubits are initialized and measured in the corresponding basis to reconstruct a perfect syndrome-extraction round.Source: Appendix E · p. 17
  • Table III lists the BPOSD parameters used in the circuit simulations.Other simulation parameters were set to their defaults.Source: Table III · p. 17, Appendix E · p. 17

Appendix F: Comparison with AlphaSyndrome and PropHunt

The paper compares its circuits with AlphaSyndrome and PropHunt, then tests whether residual-distance profiles reflect circuit-level logical performance. The profiles generally track relative performance at low error rates, with one reported outlier.

Appendix F: Comparison with AlphaSyndrome and PropHunt

  • Under the same noise model and simulation settings, increased circuit depth offsets potential circuit-distance gains for AlphaSyndrome and PropHunt circuits at realistic error rates.The comparison covers the [[61, 1, 9]] colour code and [[108, 18, 4]] random quantum Tanner code.Source: Figure 8 · p. 17, Appendix F · p. 17

Appendix G: Residual profile analysis

  • Residual-distance profiling is used as a fast, inexpensive way to rank CNOT schedules and assess whether profiles correspond to circuit distance and min-weight failure multiplicity.The analysis relates profiles to circuit distance and failure multiplicity in the low-p regime.Source: Appendix G · p. 17, §2 · pp. 18–19

1. Residual distance profile distribution

  • The optimal left–right sequence has a profile at least as good as the 90th-percentile unstructured sequence across the sampled codes.The figure compares representative 10th-, 50th-, and 90th-percentile profiles with optimal profiles for each code and sequence class.Source: Figure 9 · p. 18, §1 · p. 18

2. Logical performance

  • Residual-distance profiles reliably indicate relative circuit logical performance at low p except for the optimal unstructured FB126 circuit, whose estimated circuit distance is lower than several alternatives.Table IV reports estimated circuit distance and min-weight failure multiplicity for optimal and 50th-percentile representatives.Source: Table IV · p. 18, §2 · p. 19

3. Syndrome weight

The gross-code analysis rules out circuit distance 12 for non-interleaved circuits and narrows three-coloured tilings to a few candidates. An explicit depth-8 schedule is conjectured to attain distance 11; left–right circuits also incur decoding-time costs for some codes.

3. Syndrome weight

  • For FB126 and HGP625, left–right circuits increase check-matrix density by about 8.4% and 14%, and BPOSD decoding time by about ×1.3 and ×2, respectively.The comparisons are against corresponding unstructured circuits for the two-round SECs.Source: §3 · p. 19
  • The authors speculate that overlapping ancilla detection regions improve detection of harmful hook errors but raise detection-event counts, leaving the trade-off for future study.The discussion identifies this as a proposed explanation rather than a settled mechanism.Source: §3 · p. 19

1. Eliminating gross-code circuits

  • No non-interleaved gross-code SEC can reach circuit distance 12, and uniformly tiled circuits have circuit distance at most 10.The uniformly tiled bound follows from extended-code distance upper bounds for all 90 residual-error sets.Source: §1 · p. 19
  • Three-colour check tilings allow at most three relative orderings per check type that could reach distance 11, equivalent up to cyclic colour permutation.The gross-code Tanner graph has a natural three-colouring in which checks sharing support have distinct colours.Source: §1 · p. 19, Figure 10 · p. 20
  • Only three three-coloured residual-error tilings retain an extended-code distance upper bound of 11; the other tilings are bounded by 10 or less.The screening narrows 45 single-check residual sets to four candidates, then leaves only three of 64 colour-set combinations.Source: §1 · p. 20

2. An explicit 3-coloured circuit

  • The explicit depth-8 schedule is conjectured to have circuit distance 11, with no sub-11 minimum-weight logical operator found after 10,000 search loops.Its extended-code distance is upper-bounded by 11; the schedule matches the original gross-code circuit depth.Source: §2 · p. 20, Figure 12 · p. 21
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