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LLMs in Digital EDA: A perspective on shifting roles from Generation to Orchestration

Matthew Youngman, Cristian Sestito, Themis Prodromakis

arXiv:2608.27184v1cs.ARcs.AIcs.SE

TL;DR

Current LLM-based EDA systems largely address isolated design stages, with limited understanding of downstream consequences. This Perspective distinguishes Generator, Agent, and Orchestrator roles by how they produce designs, refine outputs, or control the pipeline. It argues that capability gains arise from integration with tools and design context, not model improvements alone.

  • Problem

    Current LLM-EDA systems largely address isolated design stages, while cross-layer understanding linking design decisions to downstream outcomes remains limited.

    Source: §2 · p. 4

  • Method

    The Perspective distinguishes Generator, Agent, and physically aware Orchestrator roles through design production, iterative repair, and adaptive control of the EDA pipeline.

    Source: §1 · p. 2

  • Results

    The authors attribute capability gains to architectural integration with tools and design context, rather than model improvements alone.

    Source: §1 · p. 2

  • Takeaways & Limitations

    Persistent cross-stage tool feedback could let physical findings from synthesis and implementation guide upstream specifications and RTL generation rather than appear only at fixed checkpoints.

    Source: §4 · p. 6

    The proposed accessibility gains remain bounded by proprietary PDKs and large-scale design data held by incumbents.

    Source: §5 · p. 8

Abstract

from arXiv · show

Electronic design automation (EDA) has advanced engineering productivity through successive generations of tooling that progressively automate synthesis, optimisation, and verification. Large language models (LLMs) extend this trajectory by enabling direct translation from design intent to hardware implementations. In most of the EDA literature, LLM-based solutions are typically assisting siloed design stages or tasks, however this obscured the drivers by which capability emerges and systems scale. In this Perspective, we instead define three hierarchical roles that reveal how capability accumulates: a Generator that produces design artifacts in a single pass, an Agent that refines outputs through iterative tool feedback, and an Orchestrator that coordinates decisions across EDA-stages. Across published systems, this reveals a syntax trap in which models are trained to produce plausible code rather than physically correct hardware, compounded by fragmented tools and loss of design context that obscure how decisions affect later stages. Comparisons across the three roles show that current approaches struggle to scale to industrial designs, motivating a shift towards a standardised, physics-aware orchestrator that connects tools and agents across the EDA flow for more reliable and accessible hardware design.

1 Introduction

The paper frames LLM capability in digital EDA as a progression from single-pass Generators to feedback-driven Agents, and proposes physically-aware Orchestrators with adaptive, cross-stage pipeline control. This shift addresses limitations in physical realisability, fragmented reasoning, retained design context, and decision transparency.

1 Introduction

  • $1 trillion is the semiconductor-market size projected to be exceeded by 2030 1, while growing chip complexity and shorter development windows intensify productivity pressures 2,3.Products integrate billions of transistors, increasingly diverse architectures, and tighter physical constraints 2. EDA tools address design construction and refinement through deterministic, physics-based methods.Source: §1 · p. 1
  • Translating engineering intent into correct, optimised hardware remains a manual, iterative bottleneck dependent on scarce, difficult-to-scale domain expertise 5,6.Existing EDA tools improve design execution at scale, but intent translation remains dependent on specialised engineers.Source: §1 · p. 1
  • LLMs can translate natural-language design intent into structured hardware artifacts because digital designs already use textual HDL, specifications, scripts, and constraints 7,8.Software productivity gains 9 suggest a similar hardware opportunity, but hardware validation remains expensive and physics-driven.Source: §1 · p. 1
  • Generators produce artifacts in one pass with engineer-directed iteration; Agents automate repair and optimisation through tool feedback within fixed pipelines.Both roles still face challenges ensuring physically realisable designs, reasoning across isolated EDA stages, and maintaining transparent decisions as autonomy and design scale increase.Source: §1 · p. 2
  • The proposed physically-aware Orchestrator adaptively controls tool selection and sequencing using persistent cross-stage design state, rather than merely generating or repairing artifacts.Coordination provides end-to-end decision provenance. The authors argue that standardised orchestration—not model improvements alone—is needed to address hardware’s syntax trap, stage fragmentation, context statelessness, and explainability defects.Source: §1 · p. 2

2 The Misalignment of LLMs in the Digital Design Flow

LLMs’ next-token training rewards linguistic plausibility rather than physical correctness, creating a syntax trap in digital hardware design. Tool-feedback loops and structural representations offer improvements, but remain largely stage-local rather than connecting design decisions to downstream physical consequences.

2 The Misalignment of LLMs in the Digital Design Flow

  • Language-mediated front-end stages suit LLM assistance, whereas physics-enforced back-end stages tolerate no approximation and largely restrict LLM contributions to textual tasks.Successive abstractions improve productivity by hiding implementation complexity, but reduce visibility and control over lower-level physical behaviour 4,24–26. Back-end contributions include tool-script generation 15,34, report interpretation 31,35, and RTL-based PPA estimation 36.Source: §2 · p. 3
  • The syntax trap arises because next-token prediction rewards linguistic plausibility without training physical correctness, allowing apparently valid designs to fail deeper validation.A Verilog module can compile and pass simulation while retaining subtle timing errors 30. Undetected errors can lead to silicon re-spins costing millions of dollars and multi-month delays 3,32.Source: §2 · p. 3
  • 44.2% of testbench-passing designs fail formal equivalence checking 37; functionally correct designs can incur 1.11-1.38× area overhead relative to human-optimised designs 38.At the syntax level, 55% of LLM-generated Verilog is amenable to automated repairs 16. The dominant early metric, pass@k, measures compilation or simulation success while excluding physical correctness 22,38,39.Source: §2 · p. 3
  • Less than 0.1% of public code corpora is HDL 12,25; physics-grounded training data are costly and scarce, and HDL-to-physical-outcome relationships are complex.Proprietary IP restrictions and application diversity limit HDL availability, while synthesis, timing, and implementation data are orders of magnitude scarcer than conventional training corpora 3,21. Small code changes can produce large, uncertain PPA effects that are difficult to infer from text.Source: §2 · p. 3
  • Closed-loop Agents replace single-pass generation with repeated EDA-tool checks and feedback-driven revision, creating a neuro-symbolic loop that delegates physical correctness to tools 19,35,40.Complementary representations include ASTs for structural code analysis 41,42 and DFGs for signal-level physical reasoning 43,44. Tracing failing signals through parsed syntax trees raised VerilogCoder’s debugging-agent pass rates by more than 25 percentage points 45.Source: §2 · pp. 3–4
  • Agent feedback remains task-local, while intermediate representations capture structure rather than downstream physical consequences, motivating cross-layer understanding across the entire EDA pipeline 7.Both approaches remain largely confined to individual tasks and stages, leaving decisions at one abstraction level disconnected from their effects elsewhere.Source: §2 · p. 4

3 Current Applications of LLMs in EDA

Current LLM-EDA systems increasingly use tool-integrated Agents but remain concentrated on RTL generation and functional correctness. Limited explainability, statelessness, and fragmented interfaces constrain scaling and motivate shared architectures with persistent state and decision traceability.

3 Current Applications of LLMs in EDA

  • 46 surveyed LLM-EDA systems favor RTL generation, tool-and-context integration over training 8,46,47, and Agents over Generators, with sparse physical-stage deployments and few Orchestrators.Orchestrators appear mainly in design-space exploration and feedback loops, often using multi-agent decomposition 11,15,18,35,40. Fixed roles and static handoffs primarily increase parallel execution rather than adapt workflows to global design state 8.Source: §3 · pp. 4–5
  • Reinforcement learning targets the syntax trap through compilation, correctness, synthesis, and PPA rewards, but fixed reference sets leave gains distribution-bound and cross-stage generalisation weak.Adaptation progresses from ICL/RAG at the Generation tier through domain-adapted SFT to tool-reward RL at the Agent frontier 20,41,48. Rewards tied to gold-standard designs 41, testbench coverage 20, or benchmark-specific baselines 48 improve isolated tasks without resolving deeper RTL-to-physical relationships.Source: §3 · p. 5
  • 8.8% per year autonomy growth outpaces 5.8% per year explainability growth on qualitative, axes-normalised rankings, widening the gap between decision-making independence and traceability.Systems consequently make more consequential decisions while their reasoning becomes less accessible. This divergence impedes adoption because formal sign-off requires verifiable links between design choices and physical outcomes amid extreme re-spin costs 8,32.Source: §3 · p. 5
  • Over 95% pass@k on modular RTLLM 38 and VerilogEval 39 tasks 49,49,50 contrasts with production-like pass rates of roughly 3% to at most 34% 30.Production-like tasks include assertion writing, testbench construction, and multi-step agentic design. Evaluation focus advances at 6.9% per year but remains concentrated on functional correctness rather than the PPA properties central to industrial competitiveness.Source: §3 · p. 5
  • Beyond roughly 3,500 lines of code, complete failure is reported 37; finite-context Agents repeatedly reconstruct design state, losing information as designs scale 51,52.This statelessness disrupts continuity across stages and becomes increasingly unreliable as module interactions, timing dependencies, and implementation constraints increase context-retention and reasoning demands.Source: §3 · p. 5
  • Fragmented toolchains and incompatible representations prevent reuse 34, leaving system-specific remedies isolated and motivating common interfaces, persistent state, and inherent decision traceability.HDLxGraph’s syntax–DFGs for retrieval 43 and CROP’s summary-derived dense embeddings 53 exemplify incompatible representations. AutoSilicon and ACE-RTL retain knowledge across sessions 51,54, RTLSquad logs decisions 55, ChipSeek-R1 exposes reasoning 48, and MCP4EDA provides typed tool interfaces 47, but these fixes remain isolated.Source: §3 · p. 5

4 The Standardised Orchestrator

The standardised Orchestrator reorganises control across EDA stages through shared interfaces, persistent design context, and auditable tool interactions. Cross-stage coordination carries physical feedback into subsequent decisions and supports more robust system-scale design.

4 The Standardised Orchestrator

  • Orchestrator control authority coordinates decomposed tasks across agents, using standardised interfaces, persistent design state, and auditable interactions to address fragmentation, context loss, and provenance.Generator, Agent, and Orchestrator reasoning spans individual tasks, workflows, and multi-stage EDA coordination, respectively.Source: §4 · p. 6
  • MCP and A2A frameworks 56 replace bespoke tool wrappers and natural-language log parsing with typed, protocol-agnostic interfaces, allowing improvements to compose across systems 34.Orchestration becomes valuable only once Agent-tier systems are sufficiently mature: tool feedback cannot compensate for a weak Generator 31,46.Source: §4 · p. 6
  • 15–30% timing and 10–20% area improvements are reported for a cross-flow layer that closes the back-end feedback loop and enables cross-layer understanding 47.Structured tool use also makes provenance a byproduct rather than a post-hoc reconstruction.Source: §4 · p. 6
  • Deterministic EDA tools enforce correctness, while orchestration preserves their outputs as context so downstream physical consequences can reshape upstream specifications or RTL and gate stage progression.This extends neuro-symbolic feedback beyond isolated optimisation loops rather than restricting physical feedback to fixed checkpoints.Source: §4 · p. 6
  • Below 2% power prediction error and more than a 6× speedup are reported for estimators 57, supporting LCMs as fast physical surrogates 3,26.These surrogates can eliminate poor candidates before tool use to reduce verification cost and accelerate design-space exploration.Source: §4 · p. 6
  • Below 20% correctness characterises system-scale Generator and Agent workflows, while Orchestrators remain comparatively robust and begin exceeding human baselines in PPA efficiency.At modular scale, Generators and Agents approach human-level correctness with faster time-to-solution but weaker verification integrity; Orchestrators largely close this gap at approximately six times the cost. These comparisons aggregate heterogeneous models, prompting strategies, benchmarks, and evaluation methods across five dimensions.Source: Figure 3 · p. 7, Figure 3d

5 Outlook on the Industrialized LLM

Industrial EDA vendors are converging on standardised orchestration for workflow automation, parallel PPA exploration, and closed-loop experimentation. Greater autonomy also introduces security risks, motivating defensive checks and coordinated, verified design flows.

Industrial convergence

  • Major EDA vendors are converging on orchestration built around persistent state, typed coordination, and verification gating.Cadence’s ChipStack 58 delegates to specialised workers behind persistent IR; Synopsys’s AgentEngineer 59 uses a reason–plan–execute–orchestrate loop; Siemens’ Aprisa 60 embeds auditable, in-flow coordination.Source: §5 · p. 8

Smart Lab

  • The Smart Lab envisions orchestrated agents directing experiments, receiving measured feedback, and returning verified candidates for engineer oversight.Early forms include closed-loop back-end optimisation 42,47 and digital, analogue, and RF refinement 61. Physical prototyping through reconfigurable logic is proposed as the next step towards closing the Sim-to-Silicon gap 8.Source: §5 · p. 8, Figure 4 · p. 9

Workflow automation

  • 87–90% Universal Verification Methodology (UVM) coverage is achieved by closed-loop systems 63, placing verification at the forefront of near-term workflow automation.Verification accounts for roughly 47% of engineering effort 62; one industrial example reduces generation of 500+ lined RTL from 1 week to 1 hour with 28% lower area 25. Engineers increasingly specify intent, define objectives, and oversee signoff, expanding achievable scope rather than eliminating the need for expertise.Source: §5 · p. 8

PPA-driven design-space exploration

  • Parallel specialised agents compress PPA-driven optimisation cycles 10,64, lowering HDL and scripting barriers while access remains constrained by proprietary fabrication resources.Software-centric researchers and small teams gain accessibility, but advanced fabrication still requires proprietary PDKs, incumbent-held design data, and fabrication infrastructure. Open ecosystems can replicate incumbent resources while enabling interoperability, portability, and innovation above the fabrication layer.Source: §5 · p. 8

Security risks

  • Over 90% reported attack success contrasts with only 25–35% defensive detection 65, highlighting the dual-use risks of greater autonomy.Risks include prompt-injection-driven Trojan insertion, intellectual-property exposure through cloud inference, and silent functional or side-channel flaws propagating without formal checking.Source: §5 · p. 8

Defensive orchestration

  • Defensive orchestration can combine information-flow tracking, adversarial fuzzing, and provenance in standardised, gated flows to expose vulnerabilities and resist hidden modification 8.As chiplets and 3D integration multiply interactions, richer IRs and emerging world models may improve individual agents’ physical reasoning, but dependable silicon increasingly requires coordination across the design flow.Source: §5 · p. 8

Supplementary Information

The supplement combines a manually coded 2023–2026 LLM-for-EDA taxonomy with specification-to-RTL comparisons across roles and human baselines. System-tier estimates cover PPA, verification integrity, runtime, and API cost, with some entries explicitly projected.

Taxonomy

  • 8.8%, 5.8%, and 6.9% of full scale per year are fitted growth rates for autonomy, explainability, and evaluation focus, respectively.The 2023–2026 taxonomy manually assigns each paper one best-fitting level for categorical function, method, and role dimensions and ordinal capability dimensions. Rates use least-squares regression against first-public-release dates, normalized by each ordinal axis span.Source: Table 1 · p. 18

Role comparison

Comparison methodology

  • The comparison covers specification-to-RTL only, separating component modules (≤150 lines of code) from system modules (>200 lines) and pooling multi-source central estimates.Correctness uses median func@1 or pass@1; the caption defines PPA through median geometric means of normalized area-power ratios against human baselines. Cells without reported evidence are flagged as projected.Source: Table 2 · p. 20

Role comparison

  • 87.1% and 80.0% are system verification-integrity estimates for Generator and Agent, respectively, while Orchestrator’s 90% is projected.Verification integrity measures functionally validated designs relative to syntactically correct designs. The human row estimates 80%, attributing limited coverage to complexity.Source: Table 2 · p. 20, Supplementary Information · p. 21
  • 13.4 s, 138 s, and 300 s are system time-to-solution estimates for Generator, Orchestrator, and Agent, respectively.Generator and Orchestrator estimates come from AutoSilicon 51; Agent estimates come from MCP4EDA 47. The estimated human conservative lower bound is 300 s.Source: Table 2 · p. 20, Supplementary Information · p. 21
  • $0.055 and $0.587 are system API costs per design for Generator and Orchestrator, respectively; Agent’s $0.21 is projected.Generator and Orchestrator estimates come from AutoSilicon 51. The human row records $0.000 by definition because it incurs no API cost.Source: Table 2 · p. 20, Supplementary Information · p. 21

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